summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* blk: set log2blksz in blk_create_device()Heinrich Schuchardt2019-10-301-0/+1
| | | | | | | | | | | The ext4 file system requires log2blksz to be set. So when setting the block size on the block descriptor we should fill this field too. This fixes a problem with EFI block devices providing ext4 partitions, cf. https://lists.denx.de/pipermail/u-boot/2019-October/387702.html. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsTom Rini2019-10-2526-436/+1812
|\ | | | | | | | | | | | | | | | | - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs - bmips: various small fixes - mtmips: add new drivers for clock, reset-controller and pinctrl - mtmips: add support for high speed UART - mtmips: update/enhance drivers for SPI and ethernet - mtmips: add support for MMC
| * mmc: mtk-sd: add a dts property cd-active-high for builtin-cd modeWeijie Gao2019-10-251-1/+5
| | | | | | | | | | | | | | This patch adds a dts property cd-active-high for builtin-cd mode to make it configurable instead of using hardcoded active-low. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCsWeijie Gao2019-10-252-4/+21
| | | | | | | | | | | | This patch adds mmc support for MediaTek MT7620/MT7628 SoCs. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: add support to isolate LAN/WAN portsWeijie Gao2019-10-251-0/+32
| | | | | | | | | | | | | | This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to prevent LAN devices from getting IP address from WAN. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: free rx descriptor on receiving failureWeijie Gao2019-10-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When received a packet with an invalid length recorded in rx descriptor, we should free this rx descriptor to allow us to continue to receive following packets. Without doing so, u-boot will stuck in a dead loop trying to process this invalid rx descriptor. This patch adds a call to mt7628_eth_free_pkt() after received an invalid packet length. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: make phy link up detection optional via DTWeijie Gao2019-10-252-29/+31
| | | | | | | | | | | | | | | | | | | | | | | | The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port). Although in IOT mode only port0 is usable, the phy0 is still connected to the switch, not the ethernet gmac directly. This patch rewrites it and makes it optional. It can be turned on by adding mediatek,poll-link-phy = <?> explicitly into the eth node. By default the driver is switch mode with all 5 phy ports working without link detection. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy resetWeijie Gao2019-10-251-37/+8
| | | | | | | | | | | | | | | | | | This patch removes hardcoded gpio settings as they have been replaced by pinctrl in dts, and also replaces regmap-based phy reset with a more generic reset controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 partWeijie Gao2019-10-252-68/+158
| | | | | | | | | | | | | | | | This patch adds slew rate calibration for mt76x8-usb-phy, removes code which belongs to mt7620, and gets rid of using syscon and regmap by using clock driver and reset controller. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * reset: add reset controller driver for MediaTek MIPS platformWeijie Gao2019-10-253-0/+90
| | | | | | | | | | | | | | This patch adds reset controller driver for MediaTek MIPS platform and header file for mt7628. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * pinctrl: add support for MediaTek MT7628Weijie Gao2019-10-257-0/+747
| | | | | | | | | | | | | | This patch adds pinctrl support for mt7628, with a file for common pinmux functions and a file for mt7628 which has additional support for pinconf. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: restore default register value after each xferWeijie Gao2019-10-251-13/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently this driver uses a different way to implement the spi xfer, by modifying some fields of two registers, which is incompatible with the MTK's original SDK linux driver. This will cause the flash data being damaged by the SDK driver. This patch lets the mt7621_spi_set_cs() restore the original register fields after cs deactivated. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: remove data cache and rewrite its xfer functionWeijie Gao2019-10-251-106/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mt7621 spi controller supports continuous generic half-duplex spi transaction. There is no need to cache xfer data at all. To achieve this goal, the OPADDR register must be used as the first data to be sent. And follows the eight generic DIDO registers. But one thing different between OPADDR and DIDO registers is OPADDR has a reversed byte order. With this patch, any amount of data can be read/written in a single xfer function call. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: use clock frequency from clk driverWeijie Gao2019-10-251-7/+13
| | | | | | | | | | | | | | This patch lets the spi driver to use clock provided by the clk driver since the new clk-mt7628 driver provides accurate sys clock frequency. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * clk: add clock driver for MediaTek MT76x8 platformWeijie Gao2019-10-253-0/+162
| | | | | | | | | | | | | | | | This patch adds a clock driver for MediaTek MT7628/7688 SoC. It provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * serial: serial_mtk: add non-DM version for SPLWeijie Gao2019-10-252-17/+187
| | | | | | | | | | | | | | | | This patch adds non-DM version for mtk hsuart driver and makes it compatible with ns16550a driver in configuration. This is needed in SPL with CONFIG_SPL_DM disabled for reducing size. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * serial: serial_mtk: enable FIFO and disable flow controlWeijie Gao2019-10-251-0/+21
| | | | | | | | | | | | | | This patch adds codes to enable FIFO and disable flow control taken from ns16550 driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * drivers: nand: brcmnand: fix nand_chip ecc layout structureWilliam Zhang2019-10-251-156/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current brcmnand driver is based on 4.18 linux kernel which uses mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from old kernel which does not use this new API and expect nand_chip.ecc.layout structure to be set. This cause nand_scan_tail function running into a bug check if the device has a different oob size than the default ones. This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7 that supports the ecc layout struture and replaces the mtd_set_ooblayout method Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
| * nand: brcm: add BCM6368 supportÁlvaro Fernández Rojas2019-10-253-0/+124
| | | | | | | | | | | | | | This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch '2019-10-24-ti-imports'Tom Rini2019-10-2523-12/+32384
|\ \ | | | | | | | | | | | | - Enable DFU on dra7xx boards - Further Keystone 3 platform improvements
| * | ram: k3-j721e: Add support for J721E DDR controllerKevin Scholz2019-10-2521-0/+32102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper logic to integrate these blocks in the device. The DDR subsystem is used to provide an interface to external SDRAM devices which can be utilized for storing program or data. Introduce support for the DDR controller and DDR phy within the DDR subsystem. Signed-off-by: Kevin Scholz <k-scholz@ti.com Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ram: k3-am654: Do not rely on default values for certain DDR registerJames Doublesin2019-10-252-7/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ram: k3-am654: add support for LPDDR4 and DDR3L DDRsJames Doublesin2019-10-251-11/+230
| |/ | | | | | | | | | | | | | | Added training support for LPDDR4 and DDR3L DDRs. Also added/changed some register configuration to support all 3 DDR types Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2019-10-2522-1538/+282
|\ \ | | | | | | | | | | | | - DWC3 improvements - i.MX7 EHCI bugfix
| * | ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULPYe Li2019-10-242-16/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ULP has two USB controllers. These two controllers have similar NC registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY to work. This patch only supports OTG0 with UTMI PHY. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
| * | usb: ehci-mx6: Fix bus enumeration for iMX7 SoCsIgor Opaniuk2019-10-241-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the issues with calculation of controller indexes in ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't placed next to each other, and their addresses incremented by 0x10000. Example of USB nodes for iMX7S/D: usbotg1: usb@30b10000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; reg = <0x30b10000 0x200>; ^^^^^^^^^^ .... usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; reg = <0x30b20000 0x200>; ^^^^^^^^^^ .... usbh: usb@30b30000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; reg = <0x30b30000 0x200>; ^^^^^^^^^^ .... Which was leading to usb enumeration issues: Colibri iMX7 # usb start starting USB... Bus usb@30b10000: USB EHCI 1.00 Bus usb@30b20000: probe failed, error -22 scanning bus usb@30b10000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * | phy: keystone-usb: handle the transition of the USB power domainJean-Jacques Hiblot2019-10-241-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no proper power domain support for the keystone platforms. However we need to turn off the USB domains before jumping to linux or it fail to boot (observed with k2e and k2l platforms). This can be done in the PHY driver as it is dedicated only to the keystone platforms and matches the required on/off sequence. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3: Kconfig: get rid of obsolete mode selectionJean-Jacques Hiblot2019-10-242-18/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mode selection for the DWC3 is kind of obsolete. The driver does not have to be host only or gadget only. This choice is confusing. All the remaining callers of dwc3_uboot_init() explicitly set dr_mode before calling the function, so none rely on a default behavior. Remove the choice menu and keep only the USB_DWC3_GADGET option. Enable it by default if USB_GADGET and USB_DWC3 are enabled. It must be disabled for the evb-rk3328 as it uses DWC2 for the gadget and DWC3 for the host. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3: Add dwc3_of_parse() to get quirks information from DTJean-Jacques Hiblot2019-10-243-1/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new function that read quirk and configuration information from the DT. The goal is to allow platforms using their own version of DWC3 driver to migrate to the generic DWC3 driver. The function is adapted from the function dwc3_get_properties() in the linux dwc3 driver introduced in commit c5ac6116db35d. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3-generic: if no max speed is specified in DT, assume super speedJean-Jacques Hiblot2019-10-241-2/+2
| | | | | | | | | | | | | | | | | | | | | There is no need to fail if the maximum speed is not specified. If the speed is not specified, do the same as linux and assume super speed. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3-generic: add a new host driver that uses the dwc3 coreJean-Jacques Hiblot2019-10-242-2/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the host driver used by dwc3-generic is "xhci-dwc3". This is a functional driver but it doesn't use the dwc3 core and, in particular, it lacks some bits that may be important. For example on the k2 platforms, it is important that the phy are properly suspended when the USB is not used anymore. The dwc3 core also has a partial support for quirks. The new driver can be used as a drop-in replacement for "xhci-dwc3". In terms of implementation, it may seem strange that 2 private structures dwc3_generic_host_priv and dwc3_generic_priv) are used. The reason for this is simply that the xhci layer expects a struct xhci_ctrl at the beginning of the private data and it seemed wasteful to include it also for the peripheral case. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3-generic: factorize codeJean-Jacques Hiblot2019-10-241-20/+35
| | | | | | | | | | | | | | | | | | | | | Factor code for re-usability. This is another step toward adding host support. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3-generic: use platdataJean-Jacques Hiblot2019-10-241-14/+23
| | | | | | | | | | | | | | | | | | | | | Separate platform data from the private data. This is one step toward adding host support. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3: always use the inlined version of dwc3_host_init/dwc3_host_exitJean-Jacques Hiblot2019-10-241-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | No one is actually implementing those functions. We could remove calls to these altogether, but it does not really hurt to keep the empty inlined version at the moment and it satisfies a symmetry with the gadget mode. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: xhci: move xhci.h to include usbJean-Jacques Hiblot2019-10-2413-1304/+12
| | | | | | | | | | | | | | | | | | | | | | | | The xhci.h header file is currently located under drivers/usb/xhci Move it to the include/usb folder to make it available to drivers that are not under drivers/usb/xhci Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: dwc3: switch to peripheral mode when exitingJean-Jacques Hiblot2019-10-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | This allow the phy to enter idle and then suspend. the K2 platforms require the PHY to be suspended before the USB domain clock can be turned off. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | usb: host: remove the xhci-zynqmp driverJean-Jacques Hiblot2019-10-243-154/+0
| | | | | | | | | | | | | | | | | | This driver is not used anymore. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* | | Merge tag 'u-boot-atmel-2020.01-b' of ↵Tom Rini2019-10-253-0/+74
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features and fixes for 2020.01 cycle This feature set includes Eugen's work on a new tiny flexcom driver and eeprom mac retrieval for the sam9x60-ek board.
| * | | misc: microchip_flexcom: introduce microchip_flexcom driverEugen Hristev2019-10-243-0/+74
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Microchip Flexcom is just a wrapper which embeds a SPI controller, an I2C controller and an USART. Only one function can be used at a time and is chosen at boot time according to the device tree. The bindings are kept as in Linux. The driver registers to MISC_UCLASS. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* | | Merge tag 'xilinx-for-v2020.01-part2' of ↵Tom Rini2019-10-259-25/+104
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.01 part 2 common: - Fix manual relocation for repeatable commands arm: - Also clean up generated dtbos microblaze: - Add support for Manual relocation in crypto framework - Tune and align architecture bootm support zynq: - DT sync ups - Some defconfig updates - Remove empty board_early_init_f() zynqmp: - Clean firmware handing via drivers/firmware/ - DT/defconfig name alignments - DT cleanups with using firmware based clock driver - Some defconfig updates - Add IIO ina226 DT description - Tune zynqmp_psu_init_minimalize.sh script - Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216 versal: - Clean firmware handing via drivers/firmware/ - Add gpio support - Enable DT overlay/USB/CLK/FPGA - DT updates - Tune mini configuration spi: - gqspi - Remove unused headers
| * | arm64: zynqmp: Switch to xlnx-zynqmp-clk headerMichal Simek2019-10-241-1/+0
| | | | | | | | | | | | | | | | | | Use prepared header instead of hardcoded values. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()T Karthik Reddy2019-10-241-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds manual relocation for Modular Exponentiation if CONFIG_NEEDS_MANUAL_RELOC is enabled. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | spi: zynqmp: Remove unused platform headersMichal Simek2019-10-241-2/+0
| | | | | | | | | | | | | | | | | | | | | There is no reason to include clk.h and hardware.h headers. Driver doesn't require them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | gpio: zynq: Add gpio driver support for PMC gpioShubhrajyoti Datta2019-10-241-0/+19
| | | | | | | | | | | | | | | | | | | | | This patch adds support for gpio driver for pmc gpio. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | gpio: zynq: Add gpio driver support for VersalAshok Reddy Soma2019-10-242-1/+16
| | | | | | | | | | | | | | | | | | | | | This patch adds support for gpio driver for versal platform Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | firmware: zynqmp: Clean up zynqmp_power_probeMichal Simek2019-10-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix error debug messages to be more accurate and aligned with debug message style in the whole file. And do not initialize ret variable because it is initialized later on and it is just additional step. Fixes: 1327d1678bd2 ("firmware: zynqmp: Add zynqmp-power support") Reported-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
| * | firmware: zynqmp: Report error when xilinx_pm_request called from EL3Michal Simek2019-10-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Function should report error when called in EL3 context. Also report it as error instead 0 (success). Reported-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
| * | arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()Michal Simek2019-10-242-18/+13
| | | | | | | | | | | | | | | | | | | | | Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to xilinx_pm_request() which do calculation with PM_SIP_SVC already. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: versal: Rename versal_pm_request to xilinx_pm_requestMichal Simek2019-10-243-9/+9
| | | | | | | | | | | | | | | | | | | | | Use generic name instead of Versal specific because this should be also used on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: xilinx: Move firmware functions from platform to driverMichal Simek2019-10-242-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | versal_pm_request() and invoke_smc() are almost the same. Only one difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id. The patch is moving platform implementation to firmware driver code for synchronization. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
generated by cgit (git 2.34.1) at 2024-10-05 20:08:55 +0000