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* | Drop the pdsp188x driverSimon Glass2017-04-302-46/+0
| | | | | | | | | | | | This is not used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Convert CONFIG_SYS_WHITE_ON_BLACK to KconfigSimon Glass2017-04-301-0/+9
| | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_SYS_WHITE_ON_BLACK Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Make this default y on various SoCs] Signed-off-by: Tom Rini <trini@konsulko.com>
* | power: Convert CONFIG_PMIC_AS3722 to KconfigSimon Glass2017-04-301-0/+8
| | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_PMIC_AS3722 Signed-off-by: Simon Glass <sjg@chromium.org>
* | power: Move as3722 pmic to pmic/ directorySimon Glass2017-04-303-1/+1
| | | | | | | | | | | | | | Most of the PMICs are in the drivers/power/pmic/ directory. Move this one there. Signed-off-by: Simon Glass <sjg@chromium.org>
* | power: Rename CONFIG_AS3722_POWER to CONFIG_PMIC_AS3722Simon Glass2017-04-301-1/+1
| | | | | | | | | | | | Before converting this to Kconfig, rename it to match the other PMICs. Signed-off-by: Simon Glass <sjg@chromium.org>
* | pinctrl: Kconfig: sort pinctrl config options to prevent future clutterPhilipp Tomsich2017-04-274-84/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This originally started out as "pinctrl: Kconfig: reorder to keep Rockchip options together" and tried to keep the Rockchip-related config options together. However, we now rewrite all chip-specific driver selections to start with CONFIG_PINCTRL_ (with the inadvertent changes to related Makefiles) and sort those alphabetically. And as this already means touching most of the file, we also reformat the help text to not exceed 80 characters (but make full use of those 80 characters). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: sandbox: pwm: Add a basic pwm testSimon Glass2017-04-273-0/+84
| | | | | | | | | | | | | | | | | | | | | | Unfortunately a test for the PWM uclass was not included when it was submitted. This was noticed when trying to add more functionality: http://patchwork.ozlabs.org/patch/748172/ Add a simple test to get us started. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-04-258-183/+301
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| * sunxi: fix the default value of CONS_INDEX on non-A23/A33 SUN8IIcenowy Zheng2017-04-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other chips the default value is 1 like other Allwinner SoCs. Fix this default value. The original wrong value has lead to wrong console on H3 Orange Pi boards. Fixes: 7095f8641863 ("sunxi: Convert CONS_INDEX to Kconfig") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Add clock support for DE2/HDMI/TCON on newer SoCsJernej Skrabec2017-04-201-0/+4
| | | | | | | | | | | | | | | | This is needed for HDMI, which will be added later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: video: Convert lcdc to use struct display_timingJernej Skrabec2017-04-202-35/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Video driver for older Allwinner SoCs uses cfb console framework which in turn uses struct ctfb_res_modes to hold timing informations. However, DM video framework uses different structure - struct display_timing. It makes more sense to convert lcdc to use new timing structure because all new drivers should use DM video framework and older drivers might be rewritten to use new framework too. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: video: Split out TCON codeJernej Skrabec2017-04-204-182/+234
| | | | | | | | | | | | | | | | | | TCON unit has similar layout and functionality also on newer SoCs. This commit splits out TCON code for easier reuse later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * gpio: sunxi: Add compatible string for R40 PIOChen-Yu Tsai2017-04-201-0/+1
| | | | | | | | | | | | | | | | | | The PIO on the R40 SoC is mostly compatible with the A20. Only a few pin functions for mmc2 were added to the PC pingroup, to support 8 bit eMMCs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Enable AXP221s in I2C mode with the R40 SoCChen-Yu Tsai2017-04-201-6/+10
| | | | | | | | | | | | | | | | | | | | The R40 SoC uses the AXP221s in I2C mode to supply power. Some regulator's common usages have changed, and also the recommended voltage for existing usages have changed. Update the defaults to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Convert CONS_INDEX to KconfigMylène Josserand2017-04-201-0/+11
| | | | | | | | | | | | | | | | | | | | | | Convert the CONS_INDEX configuration to Kconfig. Update sunxi's defconfigs to remove SYS_EXTRA_OPTIONS variable not needed anymore. Default value is 1 except for sun5i (equals 2) and sun8i (equals 5). Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> [Maxime: Added a depends on ARCH_SUNXI to avoid build breakages] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Convert CONFIG_RGMII to KconfigMylène Josserand2017-04-201-0/+6
| | | | | | | | | | | | | | | | | | Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to update defconfig files of SYS_EXTRA_OPTIONS accordingly and remove it when it is possible. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Convert SUNXI_EMAC to KconfigMylène Josserand2017-04-201-0/+6
| | | | | | | | | | | | | | | | | | Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it with SUN8I_EMAC. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Move SUNXI_GMAC to KconfigMylène Josserand2017-04-201-0/+5
| | | | | | | | | | | | | | | | Move the SUNXI_GMAC config option to Kconfig, remove it from SYS_EXTRA_OPTIONS and rename it into SUN7I_GMAC. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ehci-ppc4xx: Prepare for usage of readl()/writel() accessorsAlexey Brodkin2017-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to have opencoded ehci_readl()/writel() which required no external functions to be called. Now with attempt to switch to generic readl()/writel() accessors we see a missing declaration of those accessors in ehci-ppc4xx. Something like that happens if applied http://patchwork.ozlabs.org/patch/726714/: ---------------->8--------------- CC drivers/usb/host/ehci-ppc4xx.o drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init': drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration] HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); ^ ---------------->8--------------- Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@konsulko.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* | usb: musb: avoid out of bound access in udc_setup_epHeinrich Schuchardt2017-04-251-2/+2
| | | | | | | | | | | | | | | | | | | | For id = 15 an out of bound access occurs in udc_setup_ep(). Increase the size of epinfo[] from 30 to 32 to encompass ids 0..15. The problem was highlighted by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | musb: properly detect failed initialization of controllerHeinrich Schuchardt2017-04-251-1/+1
| | | | | | | | | | | | | | We want to check the result of musb_init_controller and not the address were the result is stored. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-04-188-55/+56
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| * | armv7: ls1021a: Drop macro CONFIG_LS102XAYork Sun2017-04-173-5/+5
| | | | | | | | | | | | | | | | | | Use CONFIG_ARCH_LS1021A instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043a: Drop macro CONFIG_LS1043AYork Sun2017-04-171-1/+1
| | | | | | | | | | | | | | | | | | Use CONFIG_ARCH_LS1043A instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Drop macro CONFIG_LS2080AYork Sun2017-04-172-2/+2
| | | | | | | | | | | | | | | | | | Use CONFIG_ARCH_LS2080A instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | arm: ls1046ardb: Add SD secure boot targetRuchika Gupta2017-04-172-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer2017-04-171-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: York Sun <york.sun@nxp.com>
* | | drivers/crypto/fsl: remove redundant logical contraintxypron.glpk@gmx.de2017-04-181-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'A || (!A && B)' is equivalent to 'A || B'. Let's reduce the complexity of the statement in start_jr0(). The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | fsl/sata: correctly identify failed mallocxypron.glpk@gmx.de2017-04-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After allocating sata->cmd_hdr_tbl_offset we have to check this variable and not variable sata. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de2017-04-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40) is always true. We should use && here. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | FPGA: drivers/fpga/ivm_core.c: incorrect printfxypron.glpk@gmx.de2017-04-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of arguments for printf does not match the format string. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | usbtty: avoid potential NULL pointer dereferencexypron.glpk@gmx.de2017-04-181-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | If current_urb is NULL it should not be dereferenced. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | sysreset: psci: support system reset in a generic way with PSCIMasahiro Yamada2017-04-189-2/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the system is running PSCI firmware, the System Reset function (func ID: 0x80000009) is supposed to be handled by PSCI, that is, the SoC/board specific reset implementation should be moved to PSCI. U-Boot should call the PSCI service according to the arm-smccc manner. The arm-smccc is supported on ARMv7 or later. Especially, ARMv8 generation SoCs are likely to run ARM Trusted Firmware BL31. In this case, U-Boot is a non-secure world boot loader, so it should not be able to reset the system directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | drivers: remove Blackfin specific driversMasahiro Yamada2017-04-1814-2817/+0
| |/ |/| | | | | | | | | | | | | | | | | These drivers have no user since commit ea3310e8aafa ("Blackfin: Remove"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2017-04-162-0/+16
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| * | rockchip: i2c: Enable i2c for rk3399eric.gao@rock-chips.com2017-04-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | To enable mipi display, we need to enable pmic rk808 first for lcd3v3 power,which use i2c0 to communicate with soc. So enable i2c0. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | rockchip: sysreset: rk3188: Make sure remap is off on warm-resetsHeiko Stübner2017-04-151-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The warm-reset of rk3188 socs keeps the remap setting as it was, so if it was enabled, the cpu would start from address 0x0 of the sram instead of address 0x0 of the bootrom, thus making the reset hang. Therefore make sure the remap is disabled before attempting a warm reset. Cold reset is not affected by this at all. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2017-04-163-10/+71
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| * | dm: led: Add support for blinking LEDsSimon Glass2017-04-142-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | Allow LEDs to be blinked if the driver supports it. Enable this for sandbox so that the tests run. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
| * | dm: led: Support toggling LEDsSimon Glass2017-04-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add support for toggling an LED into the uclass interface. This can be efficiently implemented by the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
| * | dm: led: Add support for getting the state of an LEDSimon Glass2017-04-142-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to read the LED as well as write it. Add this to the uclass and update the GPIO driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
| * | dm: led: Adjust the LED uclassSimon Glass2017-04-142-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | At present this is very simple, supporting only on and off. We want to also support toggling and blinking. As a first step, change the name of the main method and use an enum to indicate the state. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
| * | dm: led: Rename struct led_uclass_platSimon Glass2017-04-142-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | These structures are normally named with 'uc' instead of 'uclass'. Change this one for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
| * | dm: led: Add a missing blank line in the Kconfig fileSimon Glass2017-04-141-0/+1
| |/ | | | | | | | | | | | | There should be a blank line between each option. Add one before LED_GPIO. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2017-04-145-86/+542
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| * video: Fix crash when scroll screeneric.gao@rock-chips.com2017-04-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After enabling log printing to lcd, when the screen starts scrolling, system crashes. Log is shown as bellow: "Synchronous Abort" handler, esr 0x96000045 "Synchronous Abort" handler, esr 0x96000045 Checking the source code, we found that the variable "pixels" gets a wrong value: int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length; "pixels" here means the value of pixels for a character, rather than the bytes for a character. So the variable "pixels" is 4 times bigger than it's exact value, which will cause the memory overflow when the cpu runs the following code: for (i = 0; i < pixels; i++) *dst++ = clr; <<---- Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
| * at91: video: Support driver-model for the HLCD driverSongjun Wu2017-04-142-71/+417
| | | | | | | | | | | | Add driver-model support to this driver. Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
| * video: fsl_dcu_fb: add additional modes for DCUStefan Agner2017-04-141-2/+59
| | | | | | | | | | | | | | | | Add common widescreen modes 800x480 and 1024x600. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
| * video: fsl_dcu_fb: Fix DCU_MODE_BLEND_ITER settingStefan Agner2017-04-141-1/+1
| | | | | | | | | | | | | | | | | | DCU_LAYER_MAX_NUM is currently used for DCU_MODE_BLEND_ITER and it actually overflows the maximum value of BLEND_ITER for Vybrid and LS102XA. Fix this by using a default value of 2. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
| * video: fsl_dcu_fb: Enable pixel clock after initializationStefan Agner2017-04-141-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling the DCU and pixel clock, the test mode is activated since this is the reset configuration. The test mode immediately shows a red screen on a LCD. A moment later, the DCU gets initialized properly. This patch enables the pixel clock after initialization of the DCU control register. This avoids this initial flicker on LCD screens. While at it change the polarity of pixel clock to display samples data on the rising edge. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
generated by cgit (git 2.34.1) at 2024-09-30 20:25:52 +0000