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* gpio: zynq: Add gpio driver support for VersalAshok Reddy Soma2019-10-242-1/+16
| | | | | | | This patch adds support for gpio driver for versal platform Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* firmware: zynqmp: Clean up zynqmp_power_probeMichal Simek2019-10-241-3/+3
| | | | | | | | | | | | Fix error debug messages to be more accurate and aligned with debug message style in the whole file. And do not initialize ret variable because it is initialized later on and it is just additional step. Fixes: 1327d1678bd2 ("firmware: zynqmp: Add zynqmp-power support") Reported-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
* firmware: zynqmp: Report error when xilinx_pm_request called from EL3Michal Simek2019-10-241-2/+4
| | | | | | | | | Function should report error when called in EL3 context. Also report it as error instead 0 (success). Reported-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
* arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()Michal Simek2019-10-242-18/+13
| | | | | | | Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to xilinx_pm_request() which do calculation with PM_SIP_SVC already. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: versal: Rename versal_pm_request to xilinx_pm_requestMichal Simek2019-10-243-9/+9
| | | | | | | Use generic name instead of Versal specific because this should be also used on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: xilinx: Move firmware functions from platform to driverMichal Simek2019-10-242-1/+38
| | | | | | | | | | versal_pm_request() and invoke_smc() are almost the same. Only one difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id. The patch is moving platform implementation to firmware driver code for synchronization. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
* arm64: versal: Clean pm_api_id usageMichal Simek2019-10-241-0/+1
| | | | | | | Copy enum values from platform code to firmware code. IDs are shared between ZynqMP and Versal. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* dm: pinctrl: fix for introduce PINCONF_RECURSIVE optionPatrick Delaunay2019-10-211-3/+1
| | | | | | | | | | | | | | | | | | | | Correct the name of the define used CONFIG_IS_ENABLED which is not aligned with Kconfig name: CONFIG_$(SPL_)PINCONF_RECURSIVE. The recursive calls is conditional only for UCLASS_PINCONFIG "pinconfig" driver. It is always needed to call pinctrl_post_bind for UCLASS_PINCTRL "pinctrl", the test CONFIG_IS_ENABLED(PINCONF_RECURSIVE) need to be removed for this driver. This correct a regression introduced because the same patch is applied twice times in u-boot-dm branch: - commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") - commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* pinctrl: Kconfig: remove duplicated nodesPatrick Delaunay2019-10-211-25/+0
| | | | | | | | | | | Remove the duplicated configs introduced when the same patch is applied twice times: - commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") - commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE option") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* Merge tag 'u-boot-amlogic-20191018' of ↵Tom Rini2019-10-1814-197/+2169
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - document alternative libretech-cc installation methods, including upstream TF-A and opensource tools - add HDMI/CVBS display support for Amlogic G12A SoCs and SEI510 board - add support for Amlogic A311D based Khadas VIM3 - add support for Amlogic S905X3 based SEI610 board, targeting Android support like SEI510
| * power: domain: add Amlogic Everything-Else power domain driverNeil Armstrong2019-10-183-0/+438
| | | | | | | | | | | | | | | | | | | | Based on the 54ecb8f7028c ("Linux 5.4-rc1") Everything-Else power domain driver for Amlogic SoCs. This driver handles the VPU Power domain and other domains from the Everything-Else part of the SM1 and G12A SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * clk: meson-sm1: add compatibleNeil Armstrong2019-10-181-0/+1
| | | | | | | | | | | | | | The SM1 clock controller is almost identical to the G12A and so far the differences don't matter. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * mmc: meson-gx: add support for mmc-pwrseq-emmcNeil Armstrong2019-10-181-0/+51
| | | | | | | | | | | | | | Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support enabling the eMMC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * video: meson: add compatible for Amlogic G12ANeil Armstrong2019-10-181-0/+1
| | | | | | | | | | | | | | Finally add the Amlogic G12A SoC compatible for the VPU driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * video: meson: sync with linux drm-misc treeNeil Armstrong2019-10-187-160/+930
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize the Amlogic Meson Video driver back with the latest DRM misc tree, adding G12A platform support, from the latest commit: 528a25d040bc ("drm: meson: use match data to detect vpu compatibility") The sync includes the following changes from Linux adapted to U-Boot: - Add support for VIC alternate timings - Switch PLL to 5.94GHz base for 297Mhz pixel clock - Add registers for G12A SoC - Add G12A Support for VPP setup - Add G12A Support for VIU setup - Add G12A support for OSD1 Plane - Add G12A support for plane handling in CRTC driver - Add G12A support for CVBS Encoder - Add G12A Video Clock setup - Add G12A support for the DW-HDMI Glue - fix G12A HDMI PLL settings for 4K60 1000/1001 variations - fix primary plane disabling - fix G12A primary plane disabling - mask value when writing bits relaxed - crtc: drv: vpp: viu: venc: use proper macros instead of magic constants - global clean-up - add macro used to enable HDMI PLL - venc: set the correct macrovision max amplitude value Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * video: meson: remove power domain getNeil Armstrong2019-10-181-10/+0
| | | | | | | | | | | | | | | | Remove getting and enabling the node power domain since it's now handled by the dm core directly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * clk: meson: g12a: add support for VPU/HDMI clocksNeil Armstrong2019-10-181-17/+603
| | | | | | | | | | | | | | | | Add necessary clock support to set up clock for the VPU and HDMI support. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * power: domain: meson-gx-pwrc: add G12A supportNeil Armstrong2019-10-181-10/+145
| | | | | | | | | | | | | | | | Add Amlogic G12A support for the gx-pwrc driver, aligned on the Linux v5.2 driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | gpio: sifive: add support for DM based gpio driver for FU540-SoCSagar Shrikant Kadam2019-10-183-0/+185
|/ | | | | | | | | | | | | | | | | This patch adds a DM based driver model for gpio controller present in FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and GPIO15 are routed to the J1 header on the board. This implementation is ported from linux based gpio driver submitted for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra <atish.patra@wdc.com> (many thanks !!). The linux driver can be referred here [1] [1]: https://lkml.org/lkml/2018/10/9/1103 Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge tag 'for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-ubiTom Rini2019-10-176-1/+27
|\ | | | | | | | | | | | | ubi enhancements for 2020.01 - provide a way for skipping crc checks ported from linux, and add an U-Boot command to set this flag on already installed systems. - fix redundand environment management
| * ubi: Print skip_check in ubi_dump_vol_info()Stefan Roese2019-10-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | It might be interesting, if "skip_check" is set or not, so lets print this flag in ubi_dump_vol_info() as well. hs: fix typo in commit message Signed-off-by: Stefan Roese <sr@denx.de> Cc: Quentin Schulz <quentin.schulz@bootlin.com> Cc: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
| * ubi: provide a way to skip CRC checksQuentin Schulz2019-10-165-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some users of static UBI volumes implement their own integrity check, thus making the volume CRC check done at open time useless. For instance, this is the case when one use the ubiblock + dm-verity + squashfs combination, where dm-verity already checks integrity of the block device but this time at the block granularity instead of verifying the whole volume. Skipping this test drastically improves the boot-time. Adapted to U-Boot by Stefan Roese. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> Cc: Quentin Schulz <quentin.schulz@bootlin.com> Cc: Boris Brezillon <boris.brezillon@bootlin.com>
* | dm: Tidy up dump output when there are many devicesPatrick Delaunay2019-10-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the 'Index' column of 'dm tree' assumes there is two digits, this patch increase it to 3 digits. It also aligns output of 'dm uclass', assuming the same 3 digits index. The boards with CONFIG_PINCTRL_FULL activated have one pinconfig by pin configuration, so they can have more than 100 devices pinconfig (for example with stm32mp157c-ev1 board we have 106 pinconfig node). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: pinctrl: introduce PINCONF_RECURSIVE optionPatrick Delaunay2019-10-152-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Linux pinctrl binding, the pin configuration nodes don't need to be direct children of the pin controller device (may be grandchildren for example). This behavior is managed with the pinconfig u-class which recursively bind all the sub-node of the pin controller. But for some binding (when pin configuration is only children of pin controller) that is not necessary. U-Boot can save memory and reduce the number of pinconf instance when this feature is deactivated (for arch stm32mp for example for SPL). This patch allows to control this feature with a new option CONFIG_PINCONF_RECURSIVE when it is possible for each individual pin controller device. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Fixed CONFIG_IF_ENABLED() condition, added __maybe_unused: Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: device: switch off power domain after device removalAnatolij Gustschin2019-10-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power domain associated with a device is enabled when probing, but currently the domain remains enabled when the device is removed. Some boards started to disable power domains for selected devices via custom board_quiesce_devices(), but it doesn't work in many cases, i. e. because devices still can be accessed later in .remove() callback on behalf of dm_remove_devices_flags(). Utilize the DM core to power off the device power domain, but add a device flag to be able to selectively let the power domain enabled after device removal. This might be required for devices that must remain enabled when booting OS, i. e. serial console for debug output, etc. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | power: domain: Introduce dev_power_domain_offLokesh Vutla2019-10-151-7/+28
| | | | | | | | | | | | | | | | Add dev_power_domain_off() api to disable all the power-domains corresponding to a device Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | remoteproc: k3_arm64: Enable DM_FLAG_DEFAULT_PD_CTRL_OFFLokesh Vutla2019-10-151-0/+1
| | | | | | | | | | | | | | | | Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that pd can be enabled after loading the image. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: core: Allow for not controlling the power-domain by DM frameworkLokesh Vutla2019-10-151-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In some remoteproc cases, enabling the power domain of the core will start running the core. In such cases image should be loaded before enabling the power domain. But the current DM framework enables the power-domain by default during probe. This is causing the remotecore to start and crash as there is no valid image loaded. In order to avoid this introduce a DM flag that doesn't allow for enabling/disabling the power-domain by DM framework. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: pinctrl: Skip not associated gpio phandle and rise a warning messageMichael Trimarchi2019-10-151-4/+10
| | | | | | | | | | | | | | | | | | | | | | Skip not associated gpio phandle let register the other gpios on a group. We need anyway to send out a warning to the user to fix their uboot-board.dtsi. Thhe handle id can be found inside the decompiled dtb dtc -I dtb -O dts -o devicetree.dts spl/u-boot-spl.dtb Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | core: device: use dev_power_domain_onPeng Fan2019-10-151-3/+3
| | | | | | | | | | | | | | When multiple power domains attached to a device, need power on them all, so use dev_power_domain_on to do that. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | power: domain: add dev_power_domain_onPeng Fan2019-10-151-0/+21
| | | | | | | | | | | | | | | | | | | | Add this new API to power on multiple domains attached to a device. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Changed to static inline and added a condition into C file: Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: spi: Do not assume first SPI busThomas Fitzsimmons2019-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed before device_bind_common assigned request numbers sequentially in the absence of aliases. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
* | dm: device: Request next sequence numberThomas Fitzsimmons2019-10-152-1/+8
| | | | | | | | | | | | | | | | | | | | | | For CONFIG_OF_PRIOR_STAGE, in the absence of a device tree alias for a given device, use the next request number for that type of device. This allows aliases to be used when they're available, while still allowing unaliased devices to be probed. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
* | tpm2: Don't assume active low reset valueKayla Theil2019-10-151-2/+2
| | | | | | | | | | | | | | | | The reset function sets the pin to 0 then 1 but if the pin is marked ACTIVE_LOW in the DT it gets inverted and leaves the TPM in reset. Let the gpio driver take care of the reset polarity. Signed-off-by: Kayla Theil <kayla.theil@mixed-mode.de>
* | dm: pinctrl: introduce PINCONF_RECURSIVE optionPatrick Delaunay2019-10-152-0/+27
|/ | | | | | | | | | | | | | | | | | | In the Linux pinctrl binding, the pin configuration nodes don't need to be direct children of the pin controller device (may be grandchildren for example). This behavior is managed with the pinconfig u-class which recursively bind all the sub-node of the pin controller. But for some binding (when pin configuration is only children of pin controller) that is not necessary. U-Boot can save memory and reduce the number of pinconf instance when this feature is deactivated (for arch stm32mp for example for SPL). This patch allows to control this feature with a new option CONFIG_PINCONF_RECURSIVE when it is possible for each individual pin controller device. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'u-boot-imx-20191014' of ↵Tom Rini2019-10-141-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191014 ------------------- Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/597498628 - logicpd pinmux - i.MX7ULP: imx_ddr_size - fixes Toradex i.MX6/i.MX7 - pico-imx7d - tpc70 converted to DM - New Board: meerkat96 - add HAB version command - i.MX8 : imx8: Jump from alias to OCRAM address at SPL init imx8qm/qxp: Set SPL TEXT base to OCRAM base
| * i2c: imx_lpi2c: add ipg clkPeng Fan2019-10-141-0/+11
| | | | | | | | | | | | | | The controller needs two clk, per clk and ipg clk, so let's add ipg clk. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge tag 'video-for-2020.01' of ↵Tom Rini2019-10-1412-60/+3161
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video - panel bridge support in stm32 ltdc - DSI host uclass - sandbox DSI host uclass test driver and DSI host test - MIPI DSI helpers - Synopsys Designware MIPI DSI host bridge driver - STM32 DSI controller driver - OTM800A and RM68200 panel support - DSI host updates for stm32f769 and stm32mp1 dtsi files - splash screen for stm32f769 and stm32mp1 boards - stm32 defconfig updates for display support
| * | video: add support of panel RM68200Yannick Fertré2019-10-133-0/+361
| | | | | | | | | | | | | | | | | | | | | | | | Support for Raydium RM68200 720p dsi 2dl video mode panel. This rm68200 panel driver is based on the Linux Kernel driver from drivers/gpu/drm/panel/panel-raydium-rm68200.c. Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | video: add support of panel OTM8009AYannick Fertré2019-10-133-0/+389
| | | | | | | | | | | | | | | | | | Support for Orise Tech otm8009a 480p dsi 2dl video mode panel. Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | video: add support of STM32 MIPI DSI controller driverYannick Fertré2019-10-133-0/+500
| | | | | | | | | | | | | | | | | | | | | Add the STM32 DSI controller driver that uses the Synopsys DesignWare MIPI DSI host controller bridge. Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | video: add MIPI DSI host controller bridgeYannick Fertré2019-10-133-0/+849
| | | | | | | | | | | | | | | | | | | | | Add a Synopsys Designware MIPI DSI host bridge driver, based on the Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | dm: Add a dsi host uclassYannick Fertré2019-10-134-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | Display Serial Interface (DSI) host can usefully be modelled as their own uclass. DSI defines a serial bus and a communication protocol between the host and the device (panel, bridge). Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | video: add support of MIPI DSI interfaceYannick Fertré2019-10-133-0/+837
| | | | | | | | | | | | | | | | | | | | | Mipi_display.c contains a set of dsi helpers. This file is a copy of file drm_mipi_dsi.c (linux kernel). Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
| * | video: stm32: stm32_ltdc: add bridge to display controllerYannick Fertré2019-10-131-60/+83
| |/ | | | | | | | | | | Manage a bridge insert between the display controller & a panel. Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
* | Merge tag 'mmc-10-10-2019' of ↵Tom Rini2019-10-146-2/+323
|\ \ | |/ |/| | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mmc - Add sdhci driver for Broadcom iProc platform - Add a driver callback for power-cycle for mmc - Implement host_power_cycle callback for stm32_sdmmc2 - spl: dm_mmc: Initialize only the required mmc device
| * mmc: stm32_sdmmc2: implement host_power_cycle callbackYann Gautier2019-10-101-2/+11
| | | | | | | | | | | | | | | | For the correct power cycle sequence with stm32_sdmmc2, the write of the power cycle value in PWRCTL field of SDMMC_POWER register is now done in stm32_sdmmc2_host_power_cycle() and no more in stm32_sdmmc2_pwrcycle(). Signed-off-by: Yann Gautier <yann.gautier@st.com>
| * mmc: add a driver callback for power-cycleYann Gautier2019-10-102-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MMC peripherals require specific power cycle sequence, where some registers need to be written between the regulator is turned off and then back on. This is the case for the MMC IP embedded in STM32MP1 SoC. In STM32MP157 reference manual [1], the power cycle sequence is: 1. Reset the SDMMC with the RCC.SDMMCxRST register bit. This will reset the SDMMC to the reset state and the CPSM and DPSM to the Idle state. 2. Disable the Vcc power to the card. 3. Set the SDMMC in power-cycle state. This will make that the SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are driven low, to prevent the card from being supplied through the signal lines. 4. After minimum 1ms enable the Vcc power to the card. 5. After the power ramp period set the SDMMC to the power-off state for minimum 1ms. The SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are set to drive “1”. 6. After the 1ms delay set the SDMMC to power-on state in which the SDMMC_CK clock will be enabled. 7. After 74 SDMMC_CK cycles the first command can be sent to the card. The step 3. cannot be handled by the current framework implementation. A new callback (host_power_cycle) is created, and called in mmc_power_cycle(), after mmc_power_off(). The incorrect power cycle sequence has shown some boot failures on STM32MP1 with some SD-cards, especially on cold boots when the input frequency is low (<= 25MHz). Those failures are no more seen with this correct power cycle sequence. [1] https://www.st.com/resource/en/reference_manual/DM00327659.pdf Signed-off-by: Yann Gautier <yann.gautier@st.com>
| * drivers: mmc: Add sdhci driver for Broadcom iProc platformArun Parameswaran2019-10-103-0/+259
| | | | | | | | | | | | | | | | | | | | | | Add SDHCI driver for iProc family of Broadcom devices. Signed-off-by: Corneliu Doban <corneliu.doban@broadcom.com> Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com> Signed-off-by: Pavithra Ravi <pavithra.ravi@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Signed-off-by: Arun Parameswaran <arun.parameswaran@broadcom.com>
| * spl: dm_mmc: Initialize only the required mmc deviceLokesh Vutla2019-10-101-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In SPL, all the available mmc devices gets initialized during boot. This might not work in cases where clocks are not available for certain mmc devices(other than boot device) and the support for enabling device might not be ready. Texas Instruments' K3 J721E device having a central system controller (dmsc) is one such example falling in this category. Below is the sequence for the failing scenario: - ROM comes up in SD mode and loads SPL by just initialing SD card. - SPL loads dmsc firmware from SD Card. Since ROM has enabled SD, SPL need not enable the SD, just need to re initialize the card. But SPL is trying to initialize other MMC instances which are in disabled state. Since dmsc firmware is not yet available, devices cannot be enabled. So in SPL, initialize only the mmc device that is needed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2024-11-20 00:44:36 +0000