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* FSL PCI: Configure PCIe reference ratioJoakim Tjernlund2018-08-081-0/+6
| | | | | | | | | | | | Most FSL PCIe controllers expects 333 MHz PCI reference clock. This clock is derived from the CCB but in many cases the ref. clock is not 333 MHz and a divisor needs to be configured. This adds PEX_CCB_DIV #define which can be defined for each type of CPU/platform. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2018-08-072-1/+11
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| * dm: panel: get timings from panelYannick Fertré2018-08-011-0/+11
| | | | | | | | | | | | | | Get timings from panel instead of read device tree. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * video: kconfig: remove DM_I2C dependency of I2C_EDIDLuis Araneda2018-08-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Drop the DM_I2C dependency, as the library only implements the parsing of EDID data and doesn't depend on any driver One user of this library, the i2c command, implements support for legacy and DM I2C drivers Tested on a Zynq board, whose I2C driver is not ported yet to DM Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* | i2c: imx_lpi2c: add uclass api supportPeng Fan2018-08-061-7/+40
| | | | | | | | | | | | | | Use uclass clk api to get per clk when CONFIG_CLK enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | i2c-mux: pca954x: support pca9646 i2c switchPeng Fan2018-08-061-1/+8
| | | | | | | | | | | | | | Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | dm: core: device: enable power domain in probePeng Fan2018-08-061-0/+7
| | | | | | | | | | | | | | Enable power domain associated with the device when probe. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | power: Add CONFIG_SPL_POWER_DOMAIN configPeng Fan2018-08-062-1/+2
| | | | | | | | | | | | | | | | | | Add CONFIG_SPL_POWER_DOMAIN config entry. Build drivers/power/domain if this config is selected. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-08-045-3/+476
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| * | arm: sunxi: Allwinner A10 SPI driverStefan Mavrodiev2018-08-033-0/+462
| | | | | | | | | | | | | | | | | | | | | | | | Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | spi: kirkwood: add orion-spi compatible stringChris Packham2018-08-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the compatible string used by the Linux kernel. This will allow u-boot to use the same device tree files. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: use armada instead of orion on .data] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: kirkwood: Get drvdata in .ofdata_to_platdataJagan Teki2018-08-031-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | Get the is_errata_50mhz_ac in .ofdata_to_platdata, and reuse it in .set_mode this can eventually initialized dt code at once and adding room to add platdata. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: add spi flash id s25fl128lClément Laigle2018-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for SPANSION s25fl128l Signed-off-by: Clément Laigle <c.laigle@catie.fr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: fixed , at the end of } ] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2018-08-045-11/+21
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| * | | mtd: nand: sunxi: Return on set_feature only when not ENOTSUPPMylène Josserand2018-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Return the error code of the set_features function only if the error code is not ENOTSUPP. Otherwise, if this function is not supported, it will return and fail to initialize the NAND. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
| * | | mtd: nand: nand_base: Convert EINVAL into ENOTSUPPMylène Josserand2018-07-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES is not supported. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
| * | | phy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5Jagan Teki2018-07-311-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only H3 and H5 have 4 PHYS so restrict rst_mask only for them by checking PHY id as 3 and update the proper bits. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
| * | | phy: sun4i-usb: Remove usb_clk_cfg set in probeJagan Teki2018-07-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_clk_cfg is setting CTRL_PHYGATE bit value in probe which is BIT 0 for sun4i, 6i and 8 for a83t but all these were handling in phy ops init exit calls. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
| * | | phy: sun4i-usb: Call phy_passby even for PHY#0Jagan Teki2018-07-311-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On newer Allwinner SoC, there is a pair of EHCI/OHCI USB hosts for OTG host mode. USB PHY passby must be configured for its corresponding PHY. so we can call for PHY#0. on the other hand in past usb-phy code the same thing can be restricted for Lower SoC's, other than H3/H5/A64. Now there is no need to restrict usb passby since the phy driver is DT enabled, and the respective phy calls will trigger based DT information initiated by the drivers. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
| * | | video: sunxi: de2: fix SimpleFB node creation when DE2 not probedIcenowy Zheng2018-07-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes when a monitor without EDID information is plugged, the DE2 won't be probed (because of lack of timing information), but the HDMI node is probed, thus a SimpleFB node with invalid information will be populated. Also detect whether DE2 is probed when creating SimpleFB node. Fixes: be5b96f0e411 ("sunxi: setup simplefb for Allwinner DE2") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
| * | | sunxi: add MMC support for H6Icenowy Zheng2018-07-311-1/+12
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
* | | clk: clk_set_default: accept no-op skip fieldsNeil Armstrong2018-08-041-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Assigned Clock parents and rates misses the fact that a "0" entry can be passed to skip setting a parent or rate of an assigned clock as described in the Linux clock bindings at [1]. This patch simply skips the clock reparenting if the DT parsing returns -ENOENT and the clock rate setting if "0" is passed as clock rate. [1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135 Fixes: f4fcba5c5baa "clk: implement clk_set_defaults()" Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | mmc: arm_pl180_mmci: Remove cd_inverted host's struct fieldPatrice Chotard2018-08-032-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As platform uses GPIOs for card detection, it's simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH) in the gpio flags instead of using the cd-inverted property. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | | mmc: arm_pl180_mmci: Add missing clk_freePatrice Chotard2018-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add missing clk_free() call in case of failure when enabling the clock. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | mmc: arm_pl180_mmci: Update to support CONFIG_BLKPatrice Chotard2018-08-031-27/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci to support this config. This driver is used by STM32Fx and by Vexpress platforms. Only STM32Fx are DM ready. No DM code is isolated and will be removed easily when wexpress will be converted to DM. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | | bootcount: Fix misaligned cache operationAlex Kiernan2018-08-031-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1947c2d2a0 introduces cache line flushes for the bootcounter, but if the start address is not aligned then the flush causes warnings of the form: CACHE: Misaligned operation at range [4030b7fc, 4030b83c] Align both the start and end of the buffer (possibly crossing multiple lines). Fixes: 1947c2d2a0 ("bootcount: flush after storing the bootcounter") Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | adc: Add driver for STM32 ADCFabrice Gasnier2018-08-035-0/+534
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for STMicroelectronics STM32 ADC (analog to digital converter). It's originally based on Linux kernel v4.18-rcs drivers/iio/adc/stm32-adc*. It's composed of: - core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu). - child drivers (UCLASS_ADC) declare each ADC, channels and handle conversions. This driver currently supports STM32H7 and STM32MP1 ADC. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | dm: adc: uclass: get reference regulator onceFabrice Gasnier2018-08-031-18/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | device_get_supply_regulator() only needs to be called once. But each time there's call to adc_vxx_value() for instance, it calls adc_vxx_platdata_update() -> device_get_supply_regulator(). So, move device_get_supply_regulator() to pre_probe() routine. This also allows vdd_supply/vss_supply to be provided directly from uc_pdata, e.g dt-binding variant like stm32-adc provide its own 'vref-supply'. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | clk: add clk_valid()Fabrice Gasnier2018-08-031-0/+13
| |/ |/| | | | | | | | | | | | | | | Add clk_valid() to check for optional clocks are valid. Call clk_valid() in test/dm/clk.c and add relevant test routine to sandbox clk tests. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | GPIO: CREG: improve flexibility of hsdk-creg-gpio driverEugeniy Paltsev2018-07-311-22/+81
|/ | | | | | | | | | | | | | | | | | | | | | | | | CREG GPIO is a driver for weird soc-specific output ports, which are controlled by some fields in memory mapped register. Example: 31 9 7 5 0 < bit number | | | | | [ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register ^ ^ | | write 0x2 == set output to "1" (activate) write 0x3 == set output to "0" (deactivate) As of tooday we only support fixed (hardcoded) bit per gpio line, activate / deactivatei and shift values. Fix that by read them from device tree to be able to use this driver for other boards. Remove "hsdk" prefix from compatible string as this driver can be used with different boards like HSDK, AXS101, AXS103, etc. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini2018-07-3024-89/+0
|\ | | | | | | | | | | | | | | | | | | | | Patch queue for efi - 2018-07-25 Highlights this time: - Many small fixes to improve spec compatibility (found by SCT) - Almost enough to run with sandbox target - GetTime() improvements - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
| * rtc: remove CONFIG_CMD_DATE dependencyHeinrich Schuchardt2018-07-2524-89/+0
| | | | | | | | | | | | | | | | | | The EFI subsystem accesses the real time clock and is enabled by default. So we should drop any CONFIG_CMD_DATE dependency from the real time clock drivers. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* | Kconfig: Remove trailing whitespaces in promptMichal Simek2018-07-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove additional trailing whitespaces in prompt reported by kconfiglib: warning: DM_PMIC_SANDBOX (defined at drivers/power/pmic/Kconfig:133) has leading or trailing whitespace in its prompt warning: <choice> (defined at dts/Kconfig:204) has leading or trailing whitespace in its prompt Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Felix Brack <fb@ltec.ch>
* | drivers: rtc: correctly set week day for mc146818Heinrich Schuchardt2018-07-281-1/+2
| | | | | | | | | | | | | | | | | | | | The driver sets the weekday incorrectly when called by the 'date set' command. Sunday is 1, Saturday is 7 unlike in U-Boot (see data sheet https://www.nxp.com/docs/en/data-sheet/MC146818.pdf, table 3). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | tpm: make TPM_V2 be compiled by defaultMiquel Raynal2018-07-281-0/+1
| | | | | | | | | | | | | | | | TPM_V1 was already compiled by default. Now that both can be compiled at the same time, compiled them both by default. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | tpm: allow TPM v1 and v2 to be compiled at the same timeMiquel Raynal2018-07-284-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While there is probably no reason to do so in a real life situation, it will allow to compile test both stacks with the same sandbox defconfig. As we cannot define two 'tpm' commands at the same time, the command for TPM v1 is still called 'tpm' and the one for TPM v2 'tpm2'. While this is the exact command name that must be written into eg. test files, any user already using the TPM v2 stack can continue to do so by just writing 'tpm' because as long as TPM v1 support is not compiled, U-Boot prompt will search for the closest command named after 'tpm'. The command set can also be changed at runtime (not supported yet, but ready to be), but as one can compile only either one stack or the other, there is still one spot in the code where conditionals are used: to retrieve the v1 or v2 command set. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: In sandbox_tpm2_fill_buf() use NULL not \0 to ensure NULL terminated string due to LLVM warning] Signed-off-by: Tom Rini <trini@konsulko.com>
* | tpm: remove stale symbol in KconfigMiquel Raynal2018-07-281-3/+0
| | | | | | | | | | | | | | | | | | The TPM_DRIVER_SELECTED symbol was used in one of the initial series about TPMv2 but its use has been dropped, making these selects useless, remove them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | tpm: compile Sandbox driver by defaultMiquel Raynal2018-07-281-0/+2
| | | | | | | | | | | | | | | | When Sandbox and the TPM stack are both selected, compile Sandbox TPM driver by default. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-07-272-43/+58
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| * | drivers/ddr/fsl: fix '__hwconfig without a buffer' messagesJeremy Gebben2018-07-261-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass an empty buffer instead of NULL if the hwconfig environment variable isn't set. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Cc: Stefano Babic <sbabic@denx.de> Cc: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | scsi: ceva: add ls1012a soc supportYuantian Tang2018-07-261-35/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the code structure more general so that more socs can be added easily and also remove speed limitation restriction. Add the ls1012a sata support as well. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (with and without CONFIG_OF_LIVE on zynqmp zcu102) Reviewed-by: York Sun <york.sun@nxp.com>
* | | net: zynq_gem: convert to use livetreeSiva Durga Prasad Paladugu2018-07-261-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | This patch updates the zynq gem driver to support livetree. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | drivers: net: zynq_gem: fix phy dt node settingGrygorii Strashko2018-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now zynq_gem driver will overwrite UCLASS_ETH node when PHY is connected and configured which is not correct. Use struct phydev->node instead. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
* | | drivers: net: cpsw: fix phy dt node settingGrygorii Strashko2018-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now CPSW driver will overwrite UCLASS_ETH node when PHY is connected and configured which is not correct. Use struct phydev->node instead. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: phy: xilinx: switch to use phy_get_ofnode()Grygorii Strashko2018-07-261-4/+6
| | | | | | | | | | | | | | | | | | | | | Use PHY API phy_get_ofnode() helper to get PHY DT node. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: phy: dp83867: switch to use phy_get_ofnode()Grygorii Strashko2018-07-261-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Use PHY API phy_get_ofnode() helper to get PHY DT node. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
* | | net: phy: add ofnode node to struct phy_deviceGrygorii Strashko2018-07-261-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in case of Ethernet PHYs which are linked to UCLASS_ETH device using "phy-handle" DT property and when Ethernet PHY driver needs to read some additional information from DT. In such cases following happens (in general): - network drivers priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); <-- phydev is connected to dev which is UCLASS_ETH device if (priv->phy_of_handle > 0) dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle); <-- phydev->dev->node is overwritten by phy-handle DT node - PHY driver in .config() callback int node = dev_of_offset(dev); <-- PHY driver uses overwritten dev->node const void *fdt = gd->fdt_blob; if (fdtdec_get_bool(fdt, node, "property")) ... As result, UCLASS_ETH device can't be used any more for DT accessing. This patch adds additional ofnode node field to struct phy_device which can be set explicitly by network drivers and used by PHY drivers, so overwriting can be avoided. Also add helper function phy_get_ofnode() which will check and return phy_device->node or dev_ofnode(phydev->dev) for backward compatibility with existing drivers. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: phy: Clean up includes of common.hJoe Hershberger2018-07-2614-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to be able to include some other system headers in phy.h but that requires us to have included common.h in the top-level first. Also, common.h includes config.h as the first thing it does, so don't include it directly. Series-to: u-boot Series-cc: Grygorii Strashko <grygorii.strashko@ti.com> Seried-cc: ti Series-process-log: sort, uniq Cover-letter: Prepare for net: phy: prevent uclass_eth device "node" field overwriting Prepare for [1] so that it doesn't break the build for a bunch of boards. There are a number of reasons this series broke the build but none of them depend on changes in the series, so fix up those situations ahead of applying that series. [1] https://patchwork.ozlabs.org/cover/940104/ END Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: phy: dp83867: switch to use ofnode apiGrygorii Strashko2018-07-261-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | Switch to use more generic ofnode API instead of FDT API. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
* | | net: phy: dp83867: add workaround for incorrect RX_CTRL pin strapMurali Karicheri2018-07-261-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017, advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not supported (see note below Table 5 (4-Level Strap Pins)). It further advises that if a board has this pin strapped in mode 1 and mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must be cleared to 0. This is to ensure proper operation of PHY. Since it is not possible to detect in software if RX_DV/RX_CTRL pin is incorrectly strapped, add a device-tree property to advertise this and allow corrective action in software. [1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>