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* | pwm: ti: am33xx: add enhanced pwm driverDario Binacchi2021-01-123-0/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | Enhanced high resolution PWM module (EHRPWM) hardware can be used to generate PWM output over 2 channels. This commit adds PWM driver support for EHRPWM device present on AM33XX SOC. The code is based on the drivers/pwm/pwm-tiehrpwm.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | omap: timer: fix the rate settingDario Binacchi2021-01-121-3/+3
| | | | | | | | | | | | | | The prescaler (PTV) setting must be taken into account even when the timer input clock frequency has been set. Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | fdt: translate address if #size-cells = <0>Dario Binacchi2021-01-125-13/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __of_translate_address routine translates an address from the device tree into a CPU physical address. A note in the description of the routine explains that the crossing of any level with since inherited from IBM. This does not happen for Texas Instruments, or at least for the beaglebone device tree. Without this patch, in fact, the translation into physical addresses of the registers contained in the am33xx-clocks.dtsi nodes would not be possible. They all have a parent with #size-cells = <0>. The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation possible even in the case of crossing levels with #size-cells = <0>. The patch acts conservatively on address translation, except for removing a check within the of_translate_one function in the drivers/core/of_addr.c file: + ranges = of_get_property(parent, rprop, &rlen); - if (ranges == NULL && !of_empty_ranges_quirk(parent)) { - debug("no ranges; cannot translate\n"); - return 1; - } if (ranges == NULL || rlen == 0) { offset = of_read_number(addr, na); memset(addr, 0, pna * 4); debug("empty ranges; 1:1 translation\n"); There are two reasons: 1 The function of_empty_ranges_quirk always returns false, invalidating the following if statement in case of null ranges. Therefore one of the two checks is useless. 2 The implementation of the of_translate_one function found in the common/fdt_support.c file has removed this check while keeping the one about the 1:1 translation. The patch adds a test and modifies a check for the correctness of an address in the case of enabling translation also for zero size cells. The added test checks translations of addresses generated by nodes of a device tree similar to those you can find in the files am33xx.dtsi and am33xx-clocks.dtsi for which the patch was created. The patch was also tested on a beaglebone black board. The addresses generated for the registers of the loaded drivers are those specified by the AM335x reference manual. Signed-off-by: Dario Binacchi <dariobin@libero.it> Tested-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
* | clk: move clk-ti-sci driver to 'ti' directoryDario Binacchi2021-01-125-9/+9
| | | | | | | | | | | | | | The patch moves the clk-ti-sci.c file to the 'ti' directory along with all the other TI's drivers, and renames it clk-sci.c. Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: omap4: add clock manager driverDario Binacchi2021-01-122-1/+23
| | | | | | | | | | | | | | | | | | This minimal driver is only used to bind child devices. For DT binding details see Linux doc: - Documentation/devicetree/bindings/arm/omap/prcm.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: add support for clkctrl clocksDario Binacchi2021-01-123-0/+161
| | | | | | | | | | | | | | | | | | | | | | Until now the clkctrl clocks have been enabled/disabled through platform routines. Thanks to this patch they can be enabled and configured directly by the probed devices that need to use them. For DT binding details see Linux doc: - Documentation/devicetree/bindings/clock/ti-clkctrl.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: add gate clock driverDario Binacchi2021-01-123-0/+100
| | | | | | | | | | | | | | | | | | The patch adds support for TI gate clock binding. The code is based on the drivers/clk/ti/gate.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/gate.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: add divider clock driverDario Binacchi2021-01-126-25/+439
| | | | | | | | | | | | | | | | | | | | | | | | The patch adds support for TI divider clock binding. The driver uses routines provided by the common clock framework (ccf). The code is based on the drivers/clk/ti/divider.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/divider.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: am33xx: add DPLL clock driversDario Binacchi2021-01-124-0/+355
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The digital phase-locked loop (DPLL) provides all interface clocks and functional clocks to the processor of the AM33xx device. The AM33xx device integrates five different DPLLs: * Core DPLL * Per DPLL * LCD DPLL * DDR DPLL * MPU DPLL The patch adds support for the compatible strings: * "ti,am3-dpll-core-clock" * "ti,am3-dpll-no-gate-clock" * "ti,am3-dpll-no-gate-j-type-clock" * "ti,am3-dpll-x2-clock" The code is loosely based on the drivers/clk/ti/dpll.c drivers of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/dpll.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: ti: add mux clock driverDario Binacchi2021-01-125-0/+294
| | | | | | | | | | | | | | | | | | | | | | | | | | The driver manages a register-mapped multiplexer with multiple input clock signals or parents, one of which can be selected as output. It uses routines provided by the common clock framework (ccf). The code is based on the drivers/clk/ti/mux.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/mux.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: add clk_round_rate()Dario Binacchi2021-01-123-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | It returns the rate which will be set if you ask clk_set_rate() to set that rate. It provides a way to query exactly what rate you'll get if you call clk_set_rate() with that same argument. So essentially, clk_round_rate() and clk_set_rate() are equivalent except the former does not modify the clock hardware in any way. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
* | bus: ti: add minimal sysc interconnect target driverDario Binacchi2021-01-123-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | We can handle the sysc interconnect target module in a generic way for many TI SoCs. Initially let's just enable domain clocks before the children are probed. The code is loosely based on the drivers/bus/ti-sysc.c of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/bus/ti-sysc.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | clk: export generic routinesDario Binacchi2021-01-121-12/+12
| | | | | | | | | | | | | | | | Export routines that can be used by other drivers avoiding duplicating code. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
* | spi: omap3_spi: Fix speed and mode selectionVignesh Raghavendra2021-01-121-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | McSPI IP provides per CS specific speed and mode selection. Therefore it is possible to apply these settings only after CS is known. But set_speed and set_mode can be called without bus being claimed, this would lead driver to set up wrong CS (or previously used CS). Fix this by apply set_speed and set_mode only if bus is already claimed. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | spi: ti_qspi: Fix "spi-max-frequency" error path in ti_qspi_ofdata_to_platdataOvidiu Panait2021-01-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct ti_qspi_priv->max_hz is declared as unsigned int, so the following error path check will always be false, even when "spi-max-frequency" property is invalid/missing: priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); if (priv->max_hz < 0) { ... } Replace the fdtdec call with dev_read_u32_default() and use 0 as the default value. Error out if max_hz is zero. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
* | gpio: tca642x: fix input subcommand for gpio banks > 0Tomas Novotny2021-01-121-14/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The value of input pin for bank > 0 is always 0 for input subcommand. The reason is that gpio_bank variable is computed only for invert and output subcommands (it depends on number of arguments). The default value of zero causes to shift the mask away for banks > 0. Please note that info subcommand works as expected, because the input pin values are accessed differently. Fixes: 61c1775f16ed ("gpio: tca642x: Add the tca642x gpio expander driver") Cc: Dan Murphy <dmurphy@ti.com> Signed-off-by: Tomas Novotny <tomas@novotny.cz>
* | Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini2021-01-069-30/+391
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
| * | video: Call video_sync in video_clear()Michal Simek2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is a need to call sync when anybody asking for clearing display. For example via cls command. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | video: seps525: Add seps525 SPI driverMichal Simek2021-01-053-0/+335
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB 160x128 display. This driver has been tested through zynq-spi driver. ZynqMP> load mmc 1 100000 rainbow.bmp 61562 bytes read in 20 ms (2.9 MiB/s) ZynqMP> bmp info 100000 Image size : 160 x 128 Bits per pixel: 24 Compression : 0 ZynqMP> bmp display 100000 ZynqMP> setenv stdout vidconsole Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | video: Introduce video_sync operationMichal Simek2021-01-051-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers like LCD connected via SPI requires explicit sync function which copy framebuffer content over SPI to controller to display. This hook doesn't exist yet that's why introduce it via video operations. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | video: Let video_sync to return error valueMichal Simek2021-01-053-18/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is preparation for follow up one to support cases where synchronization can fail. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | zynq: mtd: nand: remove superfluous ifHeinrich Schuchardt2021-01-051-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sort of code does not make much sense: if (ondie_ecc_enabled) { if (ondie_ecc_enabled) { Remove the inner if. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | spi: zynqmp_gqspi: Fix unaligned data writes issueT Karthik Reddy2021-01-041-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | When unaligned 3 bytes data write operation is performed, 3rd byte is being over written by 1st byte of 3 bytes data. This patch fixes it. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | serial: uartlite: Fix uninitialized ret in debug uartliteAshok Reddy Soma2021-01-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Endianness detection is checked against uninitialized ret variable. Assign ret with read value from status register to fix this. Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini2021-01-05216-677/+1065
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| * | | dtoc: Drop dm_populate_phandle_data()Simon Glass2021-01-051-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has not been needed since parent information was added and we started using indicies for references to other drivers instead of pointers. It was kept around in the expectation that it might be needed later. However with the latest updates, it doesn't seem likely that we'll need this in the foreseeable future. Drop dm_populate_phandle_data() from dtoc and driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIASSimon Glass2021-01-0515-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but in every other case we just use DM_. Update the alias macros to use the DM_ prefix. We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro is widely used and there is at least some benefit to indicating it us a U-Boot driver, particularly for code ported from Linux. So for now, let's keep that name. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass2021-01-0527-39/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass2021-01-0513-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Add logging when lists_bind_fdt() failsSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to see the error code when this fails. Add logging for this function. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Allow the uclass list to moveSimon Glass2021-01-053-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the uclass list head is in global_data. This is convenient but with the new of-platdata we need the list head to be declared by the generated code. Change this over to be a pointer. Provide a 'static' version in global_data to retain the current behaviour. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Split out scanning code to dm_scan()Simon Glass2021-01-051-14/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the code related to scanning for devices to bind, into a new function. This will make it easier to skip this step with the new of-platdata improvements. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Access device ofnode through functionsSimon Glass2021-01-0543-70/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Use dev_has_ofnode() instead of dev_of_valid()Simon Glass2021-01-0512-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have two functions which do the same thing. Standardise on dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in normal operation: it is either null or missing. Also move the functions into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | dm: core: Rename dev_has_of_node() to dev_has_ofnode()Simon Glass2021-01-054-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We use 'ofnode' rather than 'of_node' in U-Boot. Rename this function to fit. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Access device flags through functionsSimon Glass2021-01-058-33/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present flags are stored as part of the device. In preparation for storing them separately, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Rename sqq to seq_Simon Glass2021-01-054-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the sequence-numbering migration is complete, rename this member back to seq_, adding an underscore to indicate it is internal to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | dm: core: Split out alloc code into a new functionSimon Glass2021-01-051-37/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new function to handle the allocation of private/platform data for a device. This will make it easier to skip this feature when using the new of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: sysreset: Move priv/plat structs to headersSimon Glass2021-01-051-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them and add the dtd struct too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | dm: core: Move priv/plat structs for simple_bus to headersSimon Glass2021-01-051-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | spi: Tweak a few strange SPI NOR features for of-platdataSimon Glass2021-01-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The #define of one struct to another has been around for a while. It confuses dtoc and makes it think that struct spi_flash does not exist. Make a few changes to improve things while we wait for migration to be completed: - Move the 'struct spi_flash' to column 1 so dtoc scans it - Remove the #define when compiling dt-platdata.c - Update the strange mtd_get/set_of_node() functions - Use struct spi_nor in the drivers, so dtoc sees the correct struct Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | spi: Tidy up get/set of device nodeSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code is a bit odd in that it only reads and updates the livetree version of the device ofnode. This means it won't work with flattree. Update the code to work as it was presumably intended. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: spl: Move priv/plat structs to headersSimon Glass2021-01-052-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: apl: Move priv/plat structs to headersSimon Glass2021-01-051-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Add a compatible string for spltestSimon Glass2021-01-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this driver does not have a compatible string. For it to be used with the coming of-platadata, it must have one. Update it accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: i2c: Move priv into a header fileSimon Glass2021-01-051-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: serial: Move priv into a header fileSimon Glass2021-01-051-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | x86: pinctrl: Drop unlikely error messages from TPLSimon Glass2021-01-051-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These errors are only really for development purposes. Drop them to reduce the size of TPL. The error numbers are still reported. This reduces the TPL binary size on coral by about 160 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: apl: Reduce size for TPLSimon Glass2021-01-054-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update various drivers to use of_match_ptr() and to avoid including debug strings in TPL. Omit the WiFi driver entirely, since it is not used in TPL. This reduces the TPL binary size by about 608 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | test: Move some test drivers into their own fileSimon Glass2021-01-053-0/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present several test drivers are part of the test file itself. Some of these are useful for of-platdata tests. Separate them out so we can use them for other things also. A few adjustments are needed so this driver can build for sandbox_spl as well. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-09-26 20:56:55 +0000