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* f_sdp: Change bInterval of interrupt endpoint to 3Sherry Sun2020-09-011-2/+2
| | | | | | | | | | | | Since the USB HID limits the maximum bandwidth(3072) for interrupt endpoint transfers, when the bInterval set to 1, we can only support 3 boards to run sdp at the same time. In order to support more boards, change the bInterval of interrupt endpoint to 3, which will not affect the transmission speed. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* f_sdp: Add EP1_OUT as default data receive pipe in sdpSherry Sun2020-09-011-16/+107
| | | | | | | | | | | | | | EP0 has been used to transfer file data in sdp before, but the max packetsize of ep0 is 64 bytes. So in order to improve the file transfer speed, here add the EP1_OUT interrupt endpoint which max packetsize is set to 1024 byte. After testing, it turns out that using ep1out is twice as fast as using ep0 while receiving data in sdp. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* f_sdp: Support searching and loading FIT or container imagePeng Fan2020-09-011-12/+58
| | | | | | | | | | | | | | | | Add support to f_sdp to search and load iMX8 container image or iMX8M FIT image by new UUU command SDPV. When using the SDPV, the uuu will continue to send out data after first level boot loader used by ROM. This means uuu won't skip to the offset of the second boot loader, and the padding data before second boot loader will be sent out. So we have to search the FIT header or container header in the buffer that SDP received. Also change to more common method to exit f_sdp handler not depending on SPL_FIT_FOUND flag because container loader won't set this. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* f_sdp: Fix wrong usb request sizeYe Li2020-09-011-1/+1
| | | | | | | | | Because the buffer length of sdp usb request is 65, we have to allocate 65 bytes not 64 bytes. Otherwise there is potential buffer overflow. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* f_sdp: Add high speed endpoint descriptorYe Li2020-09-011-2/+28
| | | | | | | | | Add HS endpoint descriptor for SDP. So that we can use high speed endpoint, and the SDP device can send packet with 512 byte size. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* usb: max3420: add the gadget driverJassi Brar2020-09-014-0/+890
| | | | | | | | MAX3420 implements FullSpeed USB Device over SPI. Another version MAX3421, also implements USB Host mode. This driver should be good for the device mode of max3421 as well. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
* fastboot: Add default fastboot_set_reboot_flag implementationRoman Kovalivskyi2020-09-013-0/+56
| | | | | | | | | | | | | Default implementation of fastboot_set_reboot_flag function that depends on "bcb" commands could be used in general case if there are no need to make any platform-specific implementation, otherwise it could be disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG. Please note that FASTBOOT_USE_BCB_SET_REBOOT_FLAG is mutually exclusive with some platforms which already have their own implementation of this function. Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
* fastboot: Add support for 'reboot fastboot' commandRoman Kovalivskyi2020-09-012-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Android 10 adds support for dynamic partitions and in order to support this userspace fastboot must be used[1]. New tool fastbootd is included into recovery. Userspace fastboot works from recovery and is launched if: 1) - Dynamic partitioning is enabled 2) - Boot control block has 'boot-fastboot' value into command field The bootloader is expected to load and boot into the recovery image upon seeing boot-fastboot in the BCB command. Recovery then parses the BCB message and switches to fastbootd mode[2]. Please note that boot script is expected to handle 'boot-fastboot' command in BCB and load into recovery mode. Bootloader must support 'reboot fastboot' command which should reboot device into userspace fastboot to accomodate those changes[3]. Another command that bootloader must support[3] is 'reboot recovery'. This command should simply reboot device into recovery mode. [1] - https://source.android.com/devices/bootloader/fastbootd [2] - https://source.android.com/devices/bootloader/fastbootd#unified_fastboot_and_recovery [3] - https://source.android.com/devices/bootloader/fastbootd#modifications_to_the_bootloader Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com> Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Change-Id: I9d2bdc9a6f6f31ea98572fe155e1cc8341e9af76
* fastboot: Extend fastboot_set_reboot_flag with reboot reasonRoman Kovalivskyi2020-09-012-2/+2
| | | | | | | Extend fastboot_set_reboot_flag arguments with reboot reason so that it could handle different reboot cases in future. Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
* dfu: fix dfu tftp on sandboxHeinrich Schuchardt2020-09-011-3/+4
| | | | | | | | | | | | The environment variable loadaddr is in the virtual address space of the sandbox. To get the actual memory address where the FIT image has been loaded we have to convert this address according to the memory mapping of the sandbox. Equally the addresses in the *.its file have to be converted when used in the dfu_ram driver. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* dfu: DFU_MTD depends on CMD_MTDPARTSHeinrich Schuchardt2020-09-011-0/+1
| | | | | | Function mtdparts_init() is needed for the DFU MTD driver. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* fastboot: Support defining raw partitions without a partition tableFilip Brozovic2020-09-011-9/+66
| | | | | | | | | | | Add support for defining raw fastboot partitions in eMMC by specifying the offset and size in an environment variable. Optionally, the eMMC hardware partition number may also be specified. This makes it possible to e.g. update only part of the eMMC boot partition, instead of having to write the entire partition. Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
* usb: ci_udc: Add function to remove usb deviceYe Li2020-09-012-0/+25
| | | | | | | | | | | | When unregister gadget driver in ci_udc, the usb device is not removed or stop. This causes next "usb start" fails to work. Add a new interface "usb_remove_ehci_gadget" in usb-uclass to remove the usb device for DM driver. Using "usb_lowlevel_stop" for non-DM driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* usb: gadget: Fix controller index in UMSYe Li2020-09-011-2/+4
| | | | | | | | | | The usb mass storage (f_mass_storage.c) uses fixed usb index 0, this causes problem while CDNS3 USB controller index is 1. Modify the API of fsg to pass the controller index. Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* eth/r8152: support RTL8153B/RTL8154BHayes Wang2020-09-013-4/+414
| | | | | | This is used to support RTL8153B and RTL8154B. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
* eth/r8152: modify rtl_clear_bp functionHayes Wang2020-09-012-35/+36
| | | | | | | | | | | | The original rtl_clear_bp() is used to clear the firmware of both PLA and USB MCU. The new one could clear the firmware of PLA or USB independently. It is unnecessary to clear firmware, if there is no one to be updated. Besides, clear the firmware by writing the relative registers in bulk. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
* eth/r8152: reset PHY after setting itHayes Wang2020-09-011-1/+1
| | | | | | Some settings of PHY have to work after resetting PHY. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
* eth/r8152: reset bmu after disabling Tx/RxHayes Wang2020-09-012-1/+20
| | | | | | | | Reset bmu after disabling Tx/Rx. This is used to clear the FIFO of Tx/Rx. The remained data may be transferred after Tx/Rx is re-enabled. And it results in garbage data. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
* Merge tag 'ti-v2020.10-rc4' of ↵Tom Rini2020-08-311-59/+3
|\ | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Update to ABI 3.0 - Fix i2c write in eeprom driver
| * firmware: ti_sci: Drop unused structure ti_sci_rm_type_mapLokesh Vutla2020-08-311-49/+3
| | | | | | | | | | | | | | struct ti_sci_rm_type_map is no longer used. Drop its definition and its declarations. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * firmware: ti_sci: drop the device ids to resource id translation tableLokesh Vutla2020-08-311-11/+1
| | | | | | | | | | | | | | | | With ABI 3.0, sysfw deprecated special resource types used for AM65x SoC. Instead started using device id as resource type similar to the convention used in J721E SOC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm64: a37xx: pci: Depends on DM_GPIOPali Rohár2020-08-312-8/+3
| | | | | | | | | | | | | | | | | | For proper initialization of aardvark pci driver it is required to de-assert reset GPIO. So depeneds on DM_GPIO option. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Andre Heider <a.heider@gmail.com>
* | mmc: xenon: set signal voltage and max base clockEvan Wang2020-08-311-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The SDIO signal voltage and max base clock frequency setting are missing in driver, which causes SDIO not working. - The patch adds SDIO signal voltage switch support, which is based on regulator-gpio of vqmmc-supply, and sets the max base clock frequency. - Fix the zero clock value in call to sdhci_setup_cfg() function. Change-Id: I79c8860c65b8db166f4f70db56ede4097f71f1fa Signed-off-by: Evan Wang <xswang@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/53589 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: Hua Jing <jinghua@marvell.com> [pali: Amended fixup patch] Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Andre Heider <a.heider@gmail.com>
* | arm64: a37xx: pci: Assert PERST# signal when unloading driverPali Rohár2020-08-311-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change ensures that PCIe card is put into reset state when U-Boot stops using it. DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback prior booting Linux kernel. Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# signal prior initializing it. If it does not issue reset then some PCIe cards (specially Compex WiFi cards) are not detected at all. Putting PCIe card into reset state prior booting Linux kernel would ensure that card would be properly reset at time when Linux kernel starts initializing pci-aardvark driver. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Konstantin Porotchkin <kostap@marvell.com> Tested-by: Andre Heider <a.heider@gmail.com>
* | arm64: a37xx: pci: Make PCIe Reset GPIO DT compatible with Linux kernel DTPali Rohár2020-08-311-3/+3
|/ | | | | | | | | | | Change active-high to active-low and change DT property name from reset-gpio to reset-gpios. This format of gpio reset is used by pci-aardvark driver in Linux kernel. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Konstantin Porotchkin <kostap@marvell.com> Tested-by: Andre Heider <a.heider@gmail.com>
* pci: kconfig: Setup proper dependency for PCIE_ROCKCHIPMichal Simek2020-08-271-0/+1
| | | | | | | | | | | | | There is missing dependency for PCIE_ROCKCHIP which selects PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP. WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE Depends on [n]: ARCH_ROCKCHIP [=n] Selected by [y]: - PCIE_ROCKCHIP [=y] && PCI [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: usb: Fix config indentationRuben Di Battista2020-08-271-6/+6
| | | | | | | | | | | | | The indentation was messing up with the scripts/build-whitelist.sh that was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the other indented options) erroneously as ad-hoc configure option with the following error: ``` Error: You must add new CONFIG options using Kconfig The following new ad-hoc CONFIG options were detected: CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE ```
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-08-2513-42/+4871
|\ | | | | | | | | | | | | - Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel) - Infrastructure changes to PCI uclass to support these SoC's (Suneel) - Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel) - Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
| * watchdog: Add reset support for OcteonTX / TX2Suneel Garapati2020-08-253-0/+77
| | | | | | | | | | | | | | | | | | Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati2020-08-254-0/+4114
| | | | | | | | | | | | | | | | | | Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
| * pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati2020-08-253-0/+373
| | | | | | | | | | | | | | | | | | Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati2020-08-251-0/+15
| | | | | | | | | | | | | | | | For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: pci-uclass: Check validity of ofnodeSuneel Garapati2020-08-251-3/+7
| | | | | | | | | | | | | | | | Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati2020-08-252-0/+35
| | | | | | | | | | | | | | | | | | If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati2020-08-251-5/+62
| | | | | | | | | | | | | | | | | | Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati2020-08-252-0/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati2020-08-251-6/+18
| | | | | | | | | | | | | | | | | | If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati2020-08-252-3/+16
| | | | | | | | | | | | | | | | | | | | Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati2020-08-251-1/+2
| | | | | | | | | | | | | | | | | | | | Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati2020-08-251-2/+2
| | | | | | | | | | | | | | | | | | Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese2020-08-251-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
| * pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese2020-08-251-16/+1
| | | | | | | | | | | | | | | | | | | | | | Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
| * dm: core: Add API to read PCI bus-range propertyStefan Roese2020-08-251-0/+17
| | | | | | | | | | | | | | Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'i2c-bugfixes-for-v2020.10' of ↵Tom Rini2020-08-253-35/+28
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for v2020.10 - fix some issues with octeon_i2c driver on ARM Octeon TX2 - fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
| * | Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954xTrommel, Kees (Contractor)2020-08-252-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix for the case of a U-Boot configuration with CONFIG_SPL, CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because dm_write_i2c does not exist because CONFIG_SPL_DM is not defined. Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com> Cc: Heiko Schocher <hs@denx.de>
| * | i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 supportStefan Roese2020-08-251-33/+26
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a few issues noticed, when testing this new driver on ARM Octeon TX2 again. Here the details: - Remove "common.h" header inclusion - Use correct THP define on Octeon TX2 - Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi" compatible and add a check to the Octeon TX2 specific "cavium,thunderx-i2c" so that the correct driver data is selected. - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2020-08-251-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | - Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
| * | ram: sifive: Fix compiler warnings for 32-bitBin Meng2020-08-251-2/+2
| |/ | | | | | | | | | | | | | | | | | | priv->info.size is of type 'size_t' but the length modifier is l. Fix this by casting priv->info.size. Note 'z' cannot be used as the modifier as SPL does not support that. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
* | xen: Code style conformityAnastasiia Lukianenko2020-08-242-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleaning up the following: ERROR: do not use assignment in if condition #281: FILE: drivers/xen/pvblock.c:260: + if ((err = xenbus_switch_state(XBT_NIL, nodename, CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err" #52: FILE: drivers/xen/pvblock.c:298: + if (err != NULL) { ERROR: do not use assignment in if condition #176: FILE: drivers/xen/gnttab.c:103: + if ((flags = nflags) & (GTF_reading | GTF_writing)) { WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #329: FILE: include/xen/gnttab.h:1: +/* WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead #330: FILE: include/xen/gnttab.h:2: + * SPDX-License-Identifier: GPL-2.0 ERROR: do not use assignment in if condition #630: FILE: lib/sscanf.c:558: + if ((n = inr) < width) { Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | clk: mt7622: add needed clocks for ssusb-nodeFrank Wunderlich2020-08-241-0/+42
| | | | | | | | | | | | MT7622 needs additional clock definitions to work properly Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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