summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
...
| * | f_fastboot: Avoid use-after-free in the global pointer variableAndy Shevchenko2021-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In case of usb_add_function() failure the error path has an issue, i.e the global pointer variable is assigned to garbage Fix the above mentioned issue by assigning pointer to NULL. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | f_rockusb: Avoid use-after-free in the global pointer variableAndy Shevchenko2021-01-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of usb_add_function() failure the error path has two issues: - the potentially allocated structure isn't getting freed - the global pointer variable is assigned to garbage Fix the above mentioned issues by freeing memory and assigning NULL. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | f_rockusb: Use NULL instead of 0 for pointersAndy Shevchenko2021-01-311-2/+2
| | | | | | | | | | | | | | | | | | | | | get_rkusb() mistakenly uses integers without cast. Convert them to proper type. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | gadget: f_thor: fix wrong file size castSeung-Woo Kim2021-01-311-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Casting 32bit int value directly into 64bit unsigned type causes wrong value for file size equal or larger than 2GB. Fix the wrong file size by casting uint32_t first. Fixes: commit 1fe9ae76b113 ("gadget: f_thor: update to support more than 4GB file as thor 5.0") Reported-by: Junghoon Kim <jhoon20.kim@samsung.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | dfu: Fix handling of UBI partitions in MTD backendGuillermo Rodriguez2021-01-311-2/+2
| |/ | | | | | | | | | | | | | | | | | | For UBI partitions ("partubi" in dfu_alt_info), dfu_fill_entity_mtd sets the mtd.ubi flag; however other functions incorrectly check for nand.ubi instead. Fix this by checking for the correct flag. Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini2021-01-313-0/+8
|\ \ | | | | | | | | | - Sync r8a774a1 DT files, tmio sdhi DMA fix
| * | mmc: tmio: sdhi: Configure internal DMA bus widthMarek Vasut2021-01-313-0/+8
| |/ | | | | | | | | | | | | | | | | The R-Car3 SDHI should set these two bits in DMA_MODE register according to the specification, to indicate 64bit bus width. No other bus width options are permitted and the default value is 0, which is incorrect. Set the bits accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
* | sandbox: fill block device meta informationHeinrich Schuchardt2021-01-301-0/+11
| | | | | | | | | | | | | | | | Provide information about host backed block device. Mark the device created by 'host bind' as removable. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | sandbox: keep time offset when resettingHeinrich Schuchardt2021-01-301-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UEFI Self Certification Test (SCT) checks the SetTime() service with the following steps: * set date * reset * check date matches To be compliant the sandbox should keep the offset to the host RTC during resets. The implementation uses the environment variable UBOOT_SB_TIME_OFFSET to persist the offset. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: core: Update ofnode_read_fmap_entry() to read hashesSimon Glass2021-01-301-9/+12
| | | | | | | | | | | | | | | | | | At present this function uses the old format for reading hashes. Add support for the current format. Add a test while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: Add a comment about pinctrl_select_state()Simon Glass2021-01-301-0/+9
| | | | | | | | | | | | | | The use of pinctrl in the core of driver model is useful but can provoke some strange behaviour. Add a comment to aid debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
* | clk: x86: Correct the driver nameSimon Glass2021-01-301-2/+2
| | | | | | | | | | | | | | The current driver name does not match its compatible string, so of-platdata does not work correctly. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | clk: Add debugging for return valuesSimon Glass2021-01-301-5/+11
| | | | | | | | | | | | | | Use the log_msg_ret() mechanism to get error-return information when clocks fail to probe, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Disable I2C emulators in SPLSimon Glass2021-01-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | These cannot work with of-platdata since they currently need the devicetree at runtime. Disable the emulators and the sandbox I2C driver that needs them. We can enable these later, if needed for testing. Switch the of_plat_parent test over to use a simple bus instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: desigware: Add an alias for Intel Apollo LakeSimon Glass2021-01-301-0/+2
| | | | | | | | | | | | | | Add an alias so that this driver can be used in TPL on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | cros_ec: Add vstore supportSimon Glass2021-01-302-2/+121
| | | | | | | | | | | | | | | | | | | | The EC can store small amounts of data for the benefit of the verified boot process. Since the EC is seldom reset, this can allow the AP to store data that survives a reboot or a suspend/resume cycle. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Allow use with of-platdataSimon Glass2021-01-301-0/+2
| | | | | | | | | | | | Avoid reading the device tree when of-platdata is in use. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Show events in human-readable formSimon Glass2021-01-301-1/+11
| | | | | | | | | | | | | | Add a command to show the current events as a list of names. This is easier to decipher than a bit mask. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Add support for switchesSimon Glass2021-01-303-0/+33
| | | | | | | | | | | | | | | | | | On x86 platforms the EC provides a way to read 'switches', which are on/off values determined by the EC. Add a new driver method for this and implement it for LPC. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Support reading EC featuresSimon Glass2021-01-302-6/+31
| | | | | | | | | | | | | | | | | | | | | | | | The EC can support a variety of features and provides a way to find out what is available. Add support for this. Also update the feature list to the lastest available while we are here. This is at: https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/include/ec_commands.h Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Add support for reading the SKU IDSimon Glass2021-01-302-0/+20
| | | | | | | | | | | | | | This allows reading strapping pins attached to the EC. Add an implementation for this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Add run-time check for input buffer overflowSimon Glass2021-01-301-0/+2
| | | | | | | | | | | | | | This should not happen in normal operation, but the EC might have a bug, so add a run-time check just in case. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Tidy up a few delaysSimon Glass2021-01-301-7/+17
| | | | | | | | | | | | | | Allow a longer time for the EC to reboot. Also use a constant for the hash delay time, so it is clear what it is for. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Add a function for the hello messageSimon Glass2021-01-302-15/+43
| | | | | | | | | | | | | | | | | | | | This is used several times in this file. Put it in a function to avoid code duplication. Also add a test for this function. There are no cros_ec tests at present, so it is time to update the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | tpm: cr50: Rename driver to work with of-platdataSimon Glass2021-01-301-2/+2
| | | | | | | | | | | | | | Update the driver name to match the compatible string, so it can work with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org>
* | tpm: cr50: Add a better description and more debugSimon Glass2021-01-301-4/+18
| | | | | | | | | | | | | | | | Update the TPM description to include the interrupt mechanicm since this is useful to know. Also add a warning if the TPM cannot be found and a debug line if it succeeds. Signed-off-by: Simon Glass <sjg@chromium.org>
* | tpm: cr50: Check for valid localitySimon Glass2021-01-301-4/+12
|/ | | | | | | | | | | | | | When the Cr50 starts up it doesn't have a valid locality. The driver sets it to -1 to indicate that. Tracking this allows cr50_i2c_cleanup() to avoid releasing a locality that was not claimed. However the helper functions that generate the flags use a u8 type which cannot support -1, so they return a locality of 0xff. Fix this by updating the type. With this, 'tpm startup TPM2_SU_CLEAR' works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: mtk_snor: add support for MTK SPI NOR controllerSkyLake.Huang2021-01-293-0/+571
| | | | | | | | | | | | | | This patch adds support for MTK SPI NOR controller, which you can see on mt7622 & mt7629. 1. This controller is designed only for SPI NOR. We can't adjust its bus clock dynamically. Set clock in dts instead. 2. This controller only supports 1-1-1 write mode. 3. Remove mtk_snor_match_read() since upper SPI-MEM layer already handles command. 4. sf read/write/update commands are tested with this driver. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
* rtc: add rtc-abx80x, a driver for the Abracon AB x80x i2c rtcYing-Chun Liu (PaulLiu)2021-01-273-0/+563
| | | | | | | | | This is a basic driver for the ultra-low-power Abracon AB x80x series of RTC chips. It supports in particular, the supersets AB0805 and AB1805. It allows reading and writing the time, and enables the supercapacitor or battery charger. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
* mmc: pci_mmc: Set the removable flagSimon Glass2021-01-271-0/+8
| | | | | | | | | Set this flag so that it is available to those looking at the device. For non-removable devices there is no need to check for insertion/removable since the media can never change. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: pci_mmc: Only generate ACPI code for the SD cardSimon Glass2021-01-271-1/+10
| | | | | | | | | | At present if an eMMC part is in the system, the ACPI table generated will include information about that, as well as the SD card. We only need to include the SD card, since it has a card-detect GPIO. Use a different compatible string for each option, and add code only for the SD card. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* video: Allow syncing the entire framebuffer to the copySimon Glass2021-01-271-0/+10
| | | | | | | | In some cases so much of the framebuffer is updated that it is not worth copying the changes piece by piece to the copy framebuffer. Add a function to copy the whole thing. Signed-off-by: Simon Glass <sjg@chromium.org>
* pci: Remove CONFIG_PCI_ENUM_ONLY as it's not used (any more)Stefan Roese2021-01-272-81/+41
| | | | | | | | | | | | | | This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as it is not configured for any board (any more). With this removal, some PCI related files get cleaned up a bit. Additional, dm_pciauto_setup_device() is now static, as it's not referenced from any code outside of this C file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* bootcount: allow to use this feature on TPLPhilippe Reynes2021-01-271-0/+1
| | | | | | | | This commit add an option TPL_BOOTCOUNT_LIMIT to use bootcount on TPL. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-01-276-11/+62
|\ | | | | | | | | | | | | | | | | | | | | - Espressobin: Disable slot when emmc is not present (Pali) - DS414; config header cleanup (Phil) - PCI: auto-config enhancement (Phil) - pci_mvebu: Also map IO region (Phil) - serial: a3720: Implement pending method for output direction (Pali) - turris_mox: Enable a few commands (Marek) - helios4 & ClearFog changes (Dennis) - Plus some minor misc changes
| * arm64: a37xx: pci: Fix printing debug messagesPali Rohár2021-01-271-3/+2
| | | | | | | | | | | | | | | | | | | | | | Value pcie->dev in function pcie_advk_probe() is not initialized yet so use dev as argument for dev_dbg()/dev_warn(). Function pcie_advk_wait_pio() itself prints error message on failure so do not print duplicate error message in caller. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * serial: a3720: Implement pending method for output directionPali Rohár2021-01-271-2/+8
| | | | | | | | | | | | | | | | | | To check if some output characters are waiting either in Transmitter Holding Register or Transmitter Shift Register we need to look at TX_EMPTY bit of UART Status Register. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * pci: pci_mvebu: Define an IO region as wellPhil Sutter2021-01-271-1/+27
| | | | | | | | | | | | | | | | | | | | Configure an IO region and window for PNP identical to how MEM region is set up. Linux does this only if the DT defines a pcie-io-aperture property for the SOC, but since all supported boards do this should not be needed. Signed-off-by: Phil Sutter <phil@nwl.cc> Reviewed-by: Stefan Roese <sr@denx.de>
| * pci: Make auto-config code a little more robustPhil Sutter2021-01-271-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On my DS414, some PCI devices return odd values when probing BAR sizes. An obvious case is all-ones response, the Linux driver (drivers/pci/probe.c) catches those explicitly and a comment explains that either bit 0 or bit 1 must be clear (depending on MEM or IO type). Other BARs return e.g. 0xfff0000f or 0xfff00004 and thus manage to break size calculation due to the "middle" zeroes. Mitigate that copying more or less what Linux does and do a "find least bit set". Signed-off-by: Phil Sutter <phil@nwl.cc> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: mvebu: Espressobin: Disable slot when emmc is not presentPali Rohár2021-01-271-0/+19
| | | | | | | | | | | | | | | | | | | | | | This change extends previous commit 061c6d1b238a ("arm: mvebu: Espressobin: Detect presence of emmc at runtime") and when emmc is not present then emmc is removed from U-Boot DM and corresponding slot is disabled. Therefore on Espressobin board without soldered emmc, state of emmc hw should be same as if emmc was disabled in DTS. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * gpio: Add support for DM GPIO for KirkwoodHarm Berntsen2021-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The Armada driver also works on Nedap's custom Kirkwood board with a Marvell 88F6180 CPU. The original commit of that driver, commit 704d9a645e17 ("gpio: Add DM GPIO driver for Marvell MVEBU"), also mentions that this driver would be suitable for Kirkwood. This does not completely replace the Kirkwood specific driver as there are still boards depending on that driver. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Stefan Roese <sr@denx.de>, Reviewed-by: Stefan Roese <sr@denx.de>
* | net: phy: micrel: Try default PHY ofnode firstMarek Vasut2021-01-271-2/+7
| | | | | | | | | | | | | | | | | | | | | | The phydev structure has a PHY OF node pointer in it, use that OF node first when looking up PHY OF node properties, since that is likely the correct PHY OF node pointer. If the pointer is not valid, which is the case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
* | net: phy: ca_phy: Add driver for CAxxxx SoCsAbbie Chang2021-01-274-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add phy driver support for MACs embedded inside Cortina Access SoCs Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com> CC: Aaron Tseng <aaron.tseng@cortina-access.com> Moved out PHY specific code out of Cortina NI Ethernet driver and into a Cortina Access PHY interface driver
* | net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCsAaron Tseng2021-01-274-0/+1512
| | | | | | | | | | | | | | | | | | | | | | | | | | Add Cortina Access Ethernet device driver for CAxxxx SoCs. This driver supports both legacy and DM_ETH network models. Signed-off-by: Aaron Tseng <aaron.tseng@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Abbie Chang <abbie.chang@Cortina-Access.com> CC: Tom Rini <trini@konsulko.com>
* | net: e1000: Add missing address translationsStefan Roese2021-01-271-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some missing address translations from virtual address in local DRAM to physical address, which is needed for the DMA transactions to work correctly. This issue was detected while testing the e1000 driver on the MIPS Octeon III platform, which needs address translation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
* | net: e1000: Use virt_to_phys() instead of pci_virt_to_mem()Stefan Roese2021-01-271-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual address in local DRAM to a physical address. The correct macro here is virt_to_phys() so switch to using this macro. As virt_to_bus() is now not used any more, this patch also removes both definitions (DM and non-DM). This issue was detected while testing the e1000 driver on the MIPS Octeon III platform, which needs address translation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
* | net: e1000: Remove unused bus_to_phys() macroStefan Roese2021-01-271-2/+0
|/ | | | | | | | | | bus_to_phys() is defined but not referenced at all. This patch removes it completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2021-01-2510-69/+260
|\ | | | | | | | | | | | | | | - New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
| * clk: sunxi: Add support for H616 clocksJernej Skrabec2021-01-253-0/+128
| | | | | | | | | | | | | | | | This commit introduces DM H616 clock driver. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * sunxi: gpio: introduce compatible for H616Jernej Skrabec2021-01-251-0/+2
| | | | | | | | | | | | | | | | | | H616 pinctrl is no different configuration wise than others, so just add compatible for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
generated by cgit (git 2.34.1) at 2025-09-26 09:22:29 +0000