summaryrefslogtreecommitdiffstats
path: root/drivers/serial
Commit message (Collapse)AuthorAgeFilesLines
* x86: Make coreboot sysinfo available to any x86 boardSimon Glass2021-03-271-1/+1
| | | | | | | | | It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
* serial: mtk: rewrite the setbrg functionWeijie Gao2021-03-201-41/+33
| | | | | | | | | | | | | | | | | | Currently the setbrg logic of serial-mtk is messy, and should be rewritten. Also an option is added to make it possible to use highspeed-3 mode for all bauds. The new logic is: 1. If baud clock > 12MHz a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible) b) If baud <= 576000, highspeed-2 mode will be used c) any bauds > 576000, highspeed-3 mode will be used 2. If baud clock <= 12MHz Forced highspeed-3 mode a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST b) any bauds > 115200, the same as 1. c) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* serial: ns16550: Handle zero <clock-frequency> valueBin Meng2021-03-031-0/+2
| | | | | | | | | | | | | | | | | | | A working device tree node of ns16550 should never be populated with value zero for the <clock-frequency> property. Unfortunately this is the case for the QEMU ppce500 target. Let's try to assign plat->clock to CONFIG_SYS_NS16550_CLK as the last resort to handle such case. This commit should be reverted when: - The following QEMU patch [1] is merged, and - U-Boot CI has upgraded its QEMU version that contains the fix [1] http://patchwork.ozlabs.org/project/qemu-devel/patch/1612362288-22216-2-git-send-email-bmeng.cn@gmail.com/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* serial: ns16550: Correct the base address typeBin Meng2021-03-031-1/+1
| | | | | | | | | | | Currently ns16550_serial_assign_base() treats the argument 'base' with type `ulong`. This is incorrect because the base address was obtained from device tree with type `fdt_addr_t` that can represent a physical address larger than 32-bit in a 32-bit system. Fixes: 9e6ce62190b7 ("serial: ns16550: Fix ordering of getting base address") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* serial: usbtty: Send urb data in correct orderPali Rohár2021-03-031-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | Function next_urb() selects the last urb data buffer from linked list to which next data from usbtty's puts function should be appended. But to check if TX data still exists it is needed to look at the first urb data buffer from linked list. So check for endpoint->tx_urb (first from the linked list) instead of current_urb (the last from the linked list). Successful call to udc_endpoint_write() may invalidate active urb and allocate new urb in queue which invalidates pointer returned by next_urb() function. So call next_urb() prior putting data into urb buffer and call it every time after using udc_endpoint_write() function to prevent sending data from usbtty's puts function in incorrect order. This patch fixes issue that usbtty code does not transmit data when they are waiting in the tx queue. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
* serial: usbtty: Fix puts functionPali Rohár2021-03-031-2/+2
| | | | | | | | | | | This function has incorrect implementation of prepending CR prior LF. Without this patch it prepended CR prior whole string which is going to be written and let LF without leading CR. Fix this issue by inserting CR at correct place to make output on usbtty serial console more readable. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsungTom Rini2021-02-262-1/+8
|\
| * serial: s5p: Allow independent selectionMark Kettenis2021-02-232-1/+8
| | | | | | | | | | | | | | | | | | | | | | Currently support for the Samsung serial port driver is part of CONFIG_S5P which controls selection of several drivers for the S5P family. Give it its own config option such that we can use it on other SoCs as well. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini2021-02-231-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
| * clk: zynq: Add dummy clock enable functionMichal Simek2021-02-231-1/+1
| | | | | | | | | | | | | | | | | | A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-1522-0/+22
|\ \ | | | | | | | | | - Merge the patch to take <asm/global_data.h> out of <common.h>
| * | common: Drop asm/global_data.h from common headerSimon Glass2021-02-0222-0/+22
| |/ | | | | | | | | | | | | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: Remove mx35pdk boardTom Rini2021-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline of v2019.04, which is almost two years ago. In addition there are other DM migrations it is also missing. Remove it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | serial: sifive: Cast dev_read_addr() with uintptr_tBin Meng2021-02-031-1/+1
|/ | | | | | | | | | | | dev_read_addr() returns fdt_addr_t which is now a 64-bit address. In a 32-bit build, this causes the following warning seen when building serial_sifive.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Cast the return value with uintptr_t. Signed-off-by: Bin Meng <bin.meng@windriver.com>
* serial: a3720: Implement pending method for output directionPali Rohár2021-01-271-2/+8
| | | | | | | | | To check if some output characters are waiting either in Transmitter Holding Register or Transmitter Shift Register we need to look at TX_EMPTY bit of UART Status Register. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
* serial: add uart driver for MediaTek MT7620 SoCWeijie Gao2021-01-243-0/+267
| | | | | | | | | | | | | | | This patch adds uart support for MediaTek MT7620 and earlier SoCs. The UART used by MT7620 is incompatible with the ns16550a driver. All registers of this UART have different addresses. A special 16-bit register for Divisor Latch is used to set the baudrate instead of the original two 8-bit registers (DLL and DLM). The driver supports of-platdata which is useful for tiny SPL. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* drivers: serial: probe all uart devicesVabhav Sharma2021-01-162-0/+25
| | | | | | | | | | | | | | | | | | | | | | U-Boot DM model probe only single device at a time which is enabled and configured using device tree or platform data method. PL011 UART IP is SBSA compliant and firmware does the serial port set-up, initialization and let the kernel use UART port for sending and receiving characters. Normally software talk to one serial port time but some LayerScape platform require all the UART devices enabled in Linux for various use case. Adding support to probe all enabled serial devices like SBSA compliant PL011 UART ports probe and initialization by firmware. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
* serial: stm32: define LOG_CATEGORYPatrick Delaunay2021-01-131-0/+3
| | | | | | | Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini2021-01-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
| * serial: uartlite: Fix uninitialized ret in debug uartliteAshok Reddy Soma2021-01-041-1/+1
| | | | | | | | | | | | | | | | | | Endianness detection is checked against uninitialized ret variable. Assign ret with read value from status register to fix this. Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini2021-01-0519-123/+110
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| * | dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIASSimon Glass2021-01-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but in every other case we just use DM_. Update the alias macros to use the DM_ prefix. We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro is widely used and there is at least some benefit to indicating it us a U-Boot driver, particularly for code ported from Linux. So for now, let's keep that name. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Access device flags through functionsSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | At present flags are stored as part of the device. In preparation for storing them separately, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: serial: Move priv into a header fileSimon Glass2021-01-051-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | dm: Use access methods for dev/uclass private dataSimon Glass2021-01-0515-54/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
| * | serial: Rename ns16550 functions to lower caseSimon Glass2021-01-052-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Lower case should be used for function names. Update this driver and its callers accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | serial: Update NS16550_t and struct NS16550Simon Glass2021-01-056-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Typedefs should not be used in U-Boot and structs should be lower case. Update the code to use struct ns16550 consistently. Put a header guard on the file while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* | | Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-051-1/+1
|\ \ \ | |/ / |/| / | |/ | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * treewide: Update email address Patrick Delaunay and Patrice ChotardPatrice Chotard2020-12-091-1/+1
| | | | | | | | | | | | | | | | Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | dm: Avoid accessing seq directlySimon Glass2020-12-182-2/+2
| | | | | | | | | | | | | | | | | | | | At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-1328-166/+166
| | | | | | | | | | | | | | Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-1327-51/+51
| | | | | | | | | | | | | | This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-1319-54/+54
| | | | | | | | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-1327-113/+113
| | | | | | | | | | | | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1338-51/+51
| | | | | | | | | | | | | | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: serial: Update to use membuffSimon Glass2020-12-131-29/+19
| | | | | | | | | | | | | | Rather than implementing our own circular queue, use membuff. This allows us to read multiple bytes at once into the serial input. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: serial: Convert to livetreeSimon Glass2020-12-131-3/+1
| | | | | | | | | | | | Use a livetree function to read the colour. Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: sandbox: Drop unnecessary #ifdefsSimon Glass2020-12-131-9/+2
|/ | | | | | | CONFIG_OF_CONTROL is always enabled for sandbox (as it should be for all boards), so we can drop it. Also use IS_ENABLED() for the SPL check. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'dm-pull-30oct20' of ↵Tom Rini2020-10-301-0/+3
|\ | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
| * sandbox: Drop ad-hoc device declarations in SPLSimon Glass2020-10-291-0/+3
| | | | | | | | | | | | | | Since sandbox's SPL is build with of-platadata, we should not use U_BOOT_DEVICE() declarations as well. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: pl01x: Add error value checkingMichal Simek2020-10-271-1/+12
|/ | | | | | | | There also a need to check return values to make sure that clocks were enabled and setup properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Revert "serial: serial_xen: print U-Boot banner and others"Tom Rini2020-10-231-0/+2
| | | | | | This reverts commit 18426bf02217de2e9bb2b41eaa74d769892c55ef. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "serial: serial_xen: add DEBUG_UART support"Tom Rini2020-10-232-31/+3
| | | | | | This reverts commit 82e21b391bd315f6fe0e0b79326af8a141e9cca7. Signed-off-by: Tom Rini <trini@konsulko.com>
* serial: serial_xen: add DEBUG_UART supportAKASHI Takahiro2020-10-222-3/+31
| | | | | | | By using a hypervisor call, we can implement DEBUG_UART on xen. This will allow us to see messages even earlier than serial_init(). Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* serial: serial_xen: print U-Boot banner and othersAKASHI Takahiro2020-10-221-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | At present, DM_FLAG_PRE_RELOC is set only if !OF_CONTROL. It doesn't make sense for this para-virtualized driver. With this patch applied, you will be able to see early boot messages: U-Boot 2020.10-00001-ge442e71a6c52-dirty (Oct 15 2020 - 11:02:25 +0900) xenguest Xen virtual CPU Model: XENVM-4.15 DRAM: 128 MiB PVBLOCK: (XEN) gnttab_mark_dirty not implemented yet pvblock: 0 In: hypervisor Out: hypervisor Err: hypervisor xenguest# Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* common: rename getc() to getchar()Heinrich Schuchardt2020-10-222-2/+2
| | | | | | | | | | | | | | | | | | | The sandbox is built with the SDL2 library with invokes the X11 library which in turn calls getc(). But getc() in glibc is defined as int getc(FILE *) This does not match our definition. int getc(void) The sandbox crashes when called with parameter -l. Rename our library symbol getc() to getchar(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* serial: uartlite: Add support to work with any endiannessT Karthik Reddy2020-09-231-16/+48
| | | | | | | | | | | | This endinness changes are taken from linux uartlite driver. Reset TX fifo in control register and check TX fifo empty flag in lower byte of the status register to detect if it is a little endian system. Based on this check, program the registers with le32 or be32 through out the driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: kconfig: Change Kconfig dependencies for Xilinx driversMichal Simek2020-09-231-2/+2
| | | | | | | | | | | Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. This is follow up patch based on commit 664e16ce99a0 ("xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* serial: sh: Improve FIFO empty check on RXMarek Vasut2020-09-011-1/+4
| | | | | | | | | | | | | If the SCIF is receiving data quickly enough, it may happen that the SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the FIFO still contains data. If that happens, the serial_getc_check() reports no data in the FIFO as the flag is no longer set. Add one more check, if the SCxSR_RDxF is not set, read out the FIFO level and if there are still characters in the FIFO, permit reading them out. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit (git 2.34.1) at 2024-11-15 23:24:06 +0000