summaryrefslogtreecommitdiffstats
path: root/drivers/ram
Commit message (Collapse)AuthorAgeFilesLines
* dm: Use dm.h header when driver mode is usedSimon Glass2017-06-011-1/+1
| | | | | | | | This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: ram: bmips: add BCM6338/BCM6348 supportÁlvaro Fernández Rojas2017-05-311-0/+31
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: ram: bmips: split bcm6358_get_ram_sizeÁlvaro Fernández Rojas2017-05-311-10/+13
| | | | | | | This is done in order to reuse ram size calculation for BCM6338/BCM6348 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: ram: remove unneeded brcm,bcm63268-mc idÁlvaro Fernández Rojas2017-05-121-5/+1
| | | | | | brcm,bcm63268.dtsi uses brcm,bcm6328-mc instead of brcm,bcm63268-mc Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* ram: add RAM driver for Broadcom MIPS SoCsÁlvaro Fernández Rojas2017-05-102-0/+127
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* stm32f7: sdram: correct sdram configuration as per micron sdramVikas Manocha2017-05-081-39/+16
| | | | | | | | | | | | Actually the sdram memory on stm32f746 discovery board is micron part MT48LC_4M32_B2B5_6A. This patch does the modification required in the device tree node & driver for the same. Also we are passing here all the timing parameters in terms of clock cycles, so no need to convert time(ns or ms) to cycles. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha2017-05-081-1/+0
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* stm32f7: sdram: use sdram device tree node to configure sdram controllerVikas Manocha2017-05-081-53/+91
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* stm32f7: use clock driver to enable sdram controller clockVikas Manocha2017-05-081-0/+15
| | | | | | | | This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* stm32f7: dm: add driver model support for sdramVikas Manocha2017-05-081-0/+31
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* stm32f7: sdram: move sdram driver code to ram drivers areaVikas Manocha2017-05-083-0/+128
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAMMasahiro Yamada2015-08-181-1/+1
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: test: Add a test for the ram uclassSimon Glass2015-07-212-0/+39
| | | | | | | Add a test to confirm that we can probe this device and get information on the available RAM. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add support for RAM driversSimon Glass2015-07-213-0/+53
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2026-04-14 13:04:52 +0000