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path: root/drivers/qe/uec_phy.c
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* net/miiphy/serial: drop duplicate "NAMESIZE" defineMike Frysinger2012-03-181-1/+1
| | | | | | | | | | A few subsystems are using the same define "NAMESIZE". This has been working so far because they define it to the same number. However, I want to change the size of eth_device's NAMESIZE, so rather than tweak the define names, simply drop references to it. Almost no one does, and the handful that do can easily be changed to a sizeof(). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* fsl: Change fsl_phy_enet_if to phy_interface_tAndy Fleming2011-04-201-18/+18
| | | | | | | | | | | | The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum. This meant that drivers which used fsl_phy_enet_if to deal with PHY interfaces would have to convert between the two (or we would have to have them mirror each other, and deal with the ensuing maintenance headache). Instead, we switch all clients of fsl_phy_enet_if over to phy_interface_t, which should become the standard, anyway. Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Detlev Zundel <dzu@denx.de>
* Remove instances of phy_read/writeAndy Fleming2011-04-201-72/+73
| | | | | | | | | | | | | | | | There were a few files which were already using phy_read and phy_write for their PHY function names. It's only a few places, and the name seems most appropriate for the high-level abstraction, so let's rename the other versions to something more specific. Also, uec_phy.c had a marvell_init function which I renamed to not conflict with the one in marvell.c Lastly, uec_phy.c was putting a space between the phy writing function names, and the open paren, so I fixed that Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Detlev Zundel <dzu@denx.de>
* UEC: Fix compiler warnings introduced by linux/mii.h changeKumar Gala2011-01-251-8/+8
| | | | | | | | | | | | | | | | | | | | | | | Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following compiler warnings in the uec ethernet driver: In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec.c:32: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec_phy.c:27: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition Fix them be removing the duplication in the uec code and utlizing the linux/mii.h version instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-091-34/+34
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* powerpc/fsl: Introduce common enum for PHY typesKumar Gala2010-10-201-4/+4
| | | | | | | | Have a common enum for phy types that we use in the UCC driver. We will also use this enum for dealing with phy connection fixup in the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* UEC PHY: Speed up initial PHY neg.Joakim Tjernlund2010-10-111-0/+9
| | | | | | | | | Instead of always performing an autoneg, check if the PHY already has a link and if it matches one of the requested modes. Initially only 100MbFD is optimized this way. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* UEC PHY: Remove strange 0.5 sec delayJoakim Tjernlund2010-10-111-1/+0
| | | | | | | | This udelay looks bogus and doesn't help my board. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: rename "FSL UECx" net interfaces "UECx"Kim Phillips2010-08-091-3/+3
| | | | | | | | | | continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8 "net ppc: fix ethernet device names with spaces" (currently in u-boot-net.git) for QE based parts. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* 83xx: UEC: Added support for bitBang MII driver access to PHYsRichard Retanubun2010-05-031-0/+47
| | | | | | | | | | | This patch enabled support for having PHYs on bitBang MII and uec MII operating at the same time. Modeled after the MPC8360ADS implementation. Added the ability to specify which ethernet interfaces have bitbang SMI on the board header file. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Move arch/ppc to arch/powerpcStefan Roese2010-04-211-1/+1
| | | | | | | | | | | | | | | | | As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
* ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser2010-04-131-1/+1
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 83xx, uec: split enet_interface in two variablesHeiko Schocher2010-01-311-38/+46
| | | | | | | | | | | | There's no sensible reason to unite speed and interface type into one variable. So split this variable enet_interface into two vars: enet_interface_type, which hold the interface type and speed. Also: add the possibility for switching between 10 and 100 MBit interfaces on the fly, when running in FAST_ETH mode. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYsAnton Vorontsov2009-09-251-2/+13
| | | | | | | This will be needed for MPC8360E-MDS boards with rev. 2.1 CPUs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* UEC FIXED PHY: Determine fixed-phy port using UEC interface name.Richard Retanubun2009-08-101-17/+19
| | | | | | | | | | | Fixed a misunderstanding in the original implementation, 'devnum' that was used in the cpu/ppc4xx/4xx_enet.c implementation was NOT the PHY's SMI address, rather it was the number of the MAC interface on the CPU. The equivalent of this for uec_phy will be the UEC number stored in mii_info->dev->name. Usage example is updated for uec. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* powerpc: net: support for the SMSC LAN8700 PHYHeiko Schocher2009-01-241-0/+59
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.Richard Retanubun2008-11-091-0/+79
| | | | | | | | Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c. This adds support for PHY-less MAC connections to the UEC. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Change UEC PHY interface to RGMII on MPC8568MDSHaiying Wang2008-10-181-0/+24
| | | | | | | | | | | | | | Change UEC phy interface from GMII to RGMII on MPC8568MDS board Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed, but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable. Now both UEC1 and UEC2 can work properly under u-boot. It is also in consistent with the kernel setting for 8568 UEC phy interface. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* drivers/qe: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-131-3/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* uec: add support for Broadcom BCM5481 Gigabit PHYAnton Vorontsov2008-03-251-0/+41
| | | | | | | | | This patch adds basic support for Broadcom BCM5481 PHY. RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is Peter Barada <peterb@logicpd.com>. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* uec: add support for gbit mii status readingsAnton Vorontsov2008-03-251-9/+19
| | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* net: uec_phy: actually increment the timeout counterKim Phillips2008-03-071-1/+2
| | | | | | | | allow u-boot to recover (and, e.g., switch to another interface) in the case where a PHY does not report autonegotiation is complete within its two second timeout value. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* net: uec_phy: handle 88e1111 rev.B2 erratum 5.6Kim Phillips2008-03-021-0/+8
| | | | | | | | | | erratum 5.6 states the autoneg completion bit is functional only if the autoneg bit is asserted. This fixes any secondarily-issued networking commands on non-gigabit links on the mpc8360 mds board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Remove annoying debug printout for PHY less boards.Joakim Tjernlund2008-01-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | PHY less board prints out lots of "read wrong ...": read wrong value : mii_id 3,mii_reg 2, base e0102320 read wrong value : mii_id 3,mii_reg 3, base e0102320 UEC: PHY is Generic MII (ffffffff) read wrong value : mii_id 3,mii_reg 4, base e0102320 read wrong value : mii_id 3,mii_reg 0, base e0102320 read wrong value : mii_id 3,mii_reg 1, base e0102320 read wrong value : mii_id 3,mii_reg 1, base e0102320 read wrong value : mii_id 3,mii_reg 5, base e0102320 read wrong value : mii_id 3,mii_reg 1, base e0102320 read wrong value : mii_id 3,mii_reg 1, base e0102320 read wrong value : mii_id 3,mii_reg 5, base e0102320 FSL UEC0: Full Duplex FSL UEC0: Speed 100BT FSL UEC0: Link is up Using FSL UEC0 device Make this printout depend on UEC_VERBOSE_DEBUG and remove its definition in uec_phy.c Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: reduce boot latency on QE UEC based boardsKim Phillips2008-01-161-22/+36
| | | | | | | | | | | | | | | actually polling for PHY autonegotiation to finish enables us to remove the 5 second boot prompt latency present on QE based boards. call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait code shamelessly stolen from tsec driver. also rm unused CONFIG_RMII_MODE code. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Add support for UEC to 8568Andy Fleming2007-08-141-7/+7
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Code cleanup.Wolfgang Denk2006-11-301-421/+424
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* mpc83xx: add QE ethernet supportDave Liu2006-11-031-0/+604
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
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