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* nand: davinci: remove dead code for dm644xBartosz Golaszewski2019-05-041-39/+0
| | | | | | | The support for DaVinci DM* SoCs has been dropped. The code that used to be relevant to dm644x is no longer needed. Remove it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behaviorGregory CLEMENT2019-04-261-2/+2
| | | | | | | | | | | | | | | | | The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts" was to allow disabling the default ECC layouts if a driver is known to provide its own ECC layout. However, this commit did the opposite and disabled the default layout when it was _not_ selected. It breaks all the NAND drivers not providing their own ECC layout this patch fix this situation. It was tested with the lpc32xx_nand_slc driver. Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts") Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
* drivers: nand: brcmnand: add an option to read the write-protect from device ↵Philippe Reynes2019-04-221-0/+3
| | | | | | | | | tree The option write-protect may only change on the kernel command line, we add a property in the device tree to be more flexible. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* drivers: nand: brcmnand: add parameter parameter-page-big-endianPhilippe Reynes2019-04-221-2/+15
| | | | | | | The parameter page isn't always in big endian, so we add an option to choose the endiannes of the parameter page. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* drivers: nand: brcmnand: add initial supportPhilippe Reynes2019-04-2210-0/+3334
| | | | | | | The driver brcmnand come from linux kernel 4.18. Only SoC bcm6838 and bcm6858 are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* mtd: nand: provide several helpers to do common NAND operationsBoris Brezillon2019-04-221-160/+853
| | | | | | | | | | | | | | | | | | | | | Linux commit 97d90da8a88 ("mtd: nand: provide several helpers to do common NAND operations") This is part of the process of removing direct calls to ->cmdfunc() outside of the core in order to introduce a better interface to execute NAND operations. Here we provide several helpers and make use of them to remove all direct calls to ->cmdfunc(). This way, we can easily modify those helpers to make use of the new ->exec_op() interface when available. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: rebased and fixed some conflicts] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> [Philippe Reynes: adapt code to u-boot and only keep new function] Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* mtd: rawnand: denali: add reset handlingSimon Goldschmidt2019-04-172-0/+17
| | | | | | | | | This adds reset handling to the devicetree-enabled Denali NAND driver. For backwards compatibility, only a warning is printed when failing to get reset handles. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-04-146-44/+69
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/dts/armada-385-amc.dts arch/arm/dts/armada-xp-theadorable.dts arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi Signed-off-by: Tom Rini <trini@konsulko.com>
| * mtd: spi-nor-ids: Add Gigadevice gd25lq128 IDNeil Armstrong2019-04-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | This adds support for the Gigadevice gd25lq128 ID needed on the upcoming libretech-ac board. SPI_NOR_QUAD_READ is not set since it has not been tested in Quad mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * dm: spi: Read default speed and mode values from DTPatrick Delaunay2019-04-121-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch update the behavior introduced by commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT") In case of DT boot, don't read default speed and mode for SPI from CONFIG_* but instead read from DT node. This will make sure that boards with multiple SPI/QSPI controllers can be probed at different bus frequencies and SPI modes. Remove also use in boards of the value speed=0 (no more supported) for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0. DT values will be always used when available (full DM support of SPI slave with available DT node) even if speed and mode are requested; for example in splash screen support (in splash_sf_read_raw) or in SPL boot (in spl_spi_load_image). The caller of spi_get_bus_and_cs() no more need to force speed=0. But the current behavior don't change if the SPI slave is not present (device with generic driver is created automatically) or if platdata is used (CONFIG_OF_PLATDATA). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi: Replace ad-hoc default implementation with spi_mem_opMarek Vasut2019-04-121-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the ad-hoc erase operation implementation with a simple spi_mem_op implementation of the same functionality. This is a minor optimization and removal of the ad-hoc code. This however also changes the behavior of the execution of the erase opcode from two separate transfer requests to the SPI NOR driver to one transfer request to the SPI NOR driver. The former was how U-Boot behaved before the SPI NOR framework was imported and the later was introduced by the SPI NOR framework. The former is more optimal, so keep that. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Horatiu Vultur <horatiu.vultur@microchip.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com> Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
| * mtd: fix Coverity integer handling issueMiquel Raynal2019-04-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A Coverity robot reported an integer handling issue (OVERFLOW_BEFORE_WIDEN) in the potentially overflowing expression: (mtd_div_by_ws(mtd->size, mtd) - mtd_div_by_ws(offs, mtd)) * mtd_oobavail(mtd, ops) While such overflow will certainly never happen due to the numbers handled, it is cleaner to fix this operation anyway. The problem is that all the maths include 32-bit quantities, while the result is stored in an explicit 64-bit value. As maxooblen will just be compared with a size_t, let's change the type of the variable to a size_t. This will not fix anything but will clarify a bit the situation. Then, do an explicit cast to fix Coverity warning. Addresses-Coverity-ID: 184180 ("Integer handling issues") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spi: Add Macronix MX66U2G45F deviceMarek Vasut2019-04-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add Macronix MX66U2G45F flash device description. This is a 256 MiB part. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Vignesh R <vigneshr@ti.com> [jagan: use 'g' instead of 'f' in flash name] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: sf_probe: remove spi-flash compatibleNeil Armstrong2019-04-121-1/+0
| | | | | | | | | | | | | | | | | | | | Now the "spi-flash" compatible has been removed in the DTS files, remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor" compatible. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: add spi flash id s25fl064lHeiko Schocher2019-04-121-0/+1
| | | | | | | | | | | | | | | | Add support for SPANSION s25fl064l Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Vignesh R <vigneshr@ti.com>
| * mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux versionStefan Roese2019-04-121-32/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support with the latest Linux version (v5.0-rc3) plus the chip supported posted on the MTD list. Only the currently in U-Boot available chip is supported with this sync. The changes for the GD5F1GQ4UExxG are: - Name of NAND device changed to better reflect the real part - OOB layout changed to only reserve 1 byte for BBT - Use ECC caps 8bits/512bytes instead of 8bits/2048bytes - Enhanced ecc_get_status() function to determine and report a more fine grained bit error status Signed-off-by: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
* | mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driverChristophe Kerello2019-04-123-0/+1104
|/ | | | | | | | | | | | | | | | | | | | The driver adds the support for the STMicroelectronics FMC2 NAND Controller found on STM32MP SOCs. This patch adds the polling mode, a basic mode that do not need any DMA channels. Only NAND_ECC_HW mode is actually supported. The driver supports a maximum 8k page size. The following ECC strength and step size are currently supported: - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC based on Hamming) This patch has been tested on Micron MT29F8G08ABACAH4. Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
* mtd: ubi, ubifs debug: Use pr_debug instead of pr_critEran Matityahu2019-04-091-1/+1
| | | | | | | | | | | Before printk.h was introduced and MTDDEBUG was removed, pr_crit() was calling MTDDEBUG(), which was since then replaced by the current pr_debug(). pr_debug is more appropriate here. Signed-off-by: Eran Matityahu <eran.m@variscite.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* mtd: ubi debug: Remove the pid print from ubi_assertEran Matityahu2019-04-091-0/+10
| | | | | | | | Add a new definition for ubi_assert and keep the original one in an ifndef __UBOOT__. Signed-off-by: Eran Matityahu <eran.m@variscite.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* Convert CONFIG_SF_DEFAULT_* to KconfigPatrick Delaunay2019-03-251-0/+36
| | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* MTD: mxs_nand_spl: Redo the way nand_init initializesAdam Ford2019-03-131-11/+6
| | | | | | | | | | | | | | | Currently the spl system calls nand_init which does nothing. It isn't until an attempt to load from NAND that it gets initialized. Subsequent attempts to load just skip the initialization because NAND is already initialized. This moves the contents of mxs_nand_init to nand_init. In the event of an error, it clears the number of nand chips found. Any attempts to use nand will check if there are nand chips available instead of actually doing the initialization at that time. If there are none, it will return an error to the higher level calls. Signed-off-by: Adam Ford <aford173@gmail.com>
* MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPLAdam Ford2019-02-151-3/+0
| | | | | | | | | | | | | | | The initialization of the NAND in SPL hard-coded ecc.bytes, ecc.size, and ecc.strength which may work for some NAND parts, but it not appropriate for others. With the pending patch "mxs_nand: Fix BCH read timeout error on boards requiring ECC" the driver can auto configure the ECC when these entries are blank. This patch has been tested in NAND flash with oob 64 and oob 128. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
* MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma staticAdam Ford2019-02-151-1/+1
| | | | | | | | mxs_nand_init_dma is only referenced from mxs_nand.c. It's not referenced in any headers or outside code, so this patch defines it as static. Signed-off-by: Adam Ford <aford173@gmail.com>
* MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECCAdam Ford2019-02-152-0/+7
| | | | | | | | | | | | The LogicPD board uses a Micron Flash with ECC. To boot this from SPL, the ECC needs to be correctly configured or the BCH engine times out. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
* mtd: spi: Add lightweight SPI flash stack for SPLVignesh R2019-02-075-263/+1116
| | | | | | | | | | | | | | | | | Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints and would need to use SPI flash framework just to read images/data from flash. There is approximately 1.5 to 2KB savings with this. Based on prior work of reducing spi flash id table by Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: Remove unused filesVignesh R2019-02-072-1548/+0
| | | | | | | | | | | | spi_flash and spi_flash_ids are no longer needed after SPI NOR migration. Remove them. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: Switch to new SPI NOR frameworkVignesh R2019-02-077-280/+89
| | | | | | | | | | | | | Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: sf_probe: Add "jedec, spi-nor" compatible stringVignesh R2019-02-071-0/+1
| | | | | | | | | | | | | Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible SPI Flash device nodes. Therefore make U-Boot also to look for the same compatible string so that we can use Linux DTS files as is. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add back U-Boot specific featuresVignesh R2019-02-071-3/+159
| | | | | | | | | For legacy reasons, we will have to keep around U-Boot specific SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add SFDP supportVignesh R2019-02-072-6/+637
| | | | | | | | | | | | Sync Serial Flash Discoverable Parameters (SFDP) parsing support from Linux. This allows auto detection and configuration of Flash parameters. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add 4 Byte addressing supportVignesh R2019-02-071-0/+141
| | | | | | | | | | | | | | Sync changes from Linux SPI NOR framework to add 4 byte addressing support. This is required in order to support flashes like MT35x that no longer support legacy Bank Address Register(BAR) way of accessing >16MB region. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add SPI MEM supportVignesh R2019-02-071-4/+93
| | | | | | | | | | | | | | | | | Many SPI controllers have special MMIO interfaces which provide accelerated read/write access but require knowledge of flash parameters to make use of it. Recent spi-mem layer provides a way to support such controllers. Therefore, add spi-mem support to spi-nor-core as a way to support SPI controllers with MMIO interface. SPI MEM layer takes care of translating spi_mem_ops to spi_xfer()s in case of legacy SPI controllers. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: Port SPI NOR framework from LinuxVignesh R2019-02-071-0/+1716
| | | | | | | | | | | | | | | | | Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not support 4 byte addressing opcodes, SFDP table parsing and different types of quad mode enable sequences. Many newer flashes no longer support BANK registers used by sf layer to a access >16MB of flash address space. So, sync SPI NOR framework from Linux v4.19 that supports all the above features. Start with basic sync up that brings in basic framework subsequent commits will bring in more features. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* MTD: nand: mxs_nand_spl: Fix empty function pointer for BBTAdam Ford2019-01-281-0/+1
| | | | | | | | | | The initialization function calls a nand_chip.scan_bbt(mtd) but scan_bbt is never initialized resulting in an undefined function pointer. This will direct the function pointer to nand_default_bbt defined in the same file. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
* mtd: nand: arasan_nfc: Add support for nand multi chip selectT Karthik Reddy2019-01-242-14/+20
| | | | | | | | | | This patch adds support for nand multi chip select. Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number of nand chips. Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to KconfigDerald D. Woods2019-01-211-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | This commit converts the following items to Kconfig: CONFIG_ATMEL_NAND_HWECC CONFIG_ATMEL_NAND_HW_PMECC CONFIG_PMECC_CAP CONFIG_PMECC_SECTOR_SIZE CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER [PMECC References] https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap [Mailing List Thread] https://lists.denx.de/pipermail/u-boot/2018-December/350666.html Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") [trini: Make the migration be size neutral and possibly not fix the above in all cases] Reported-by: Daniel Evans <photonthunder@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* mtd: nand: raw: allow to disable unneeded ECC layoutsStefan Agner2019-01-162-0/+11
| | | | | | | | | | Each ECC layout consumes about 2984 bytes in the .data section. Allow to disable the default ECC layouts if a driver is known to provide its own ECC layout. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-01-021-0/+4
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| * mtd: nand: raw: Add Hynix H27UBG8T2BTR id tableNikolai Zhubr2019-01-021-0/+4
| | | | | | | | | | | | | | | | | | This patch adds Hynix H27UBG8T2BTR id table as part of raw nand, these chips were available in some A20-olinuxino-micro boards. Signed-off-by: Nikolai Zhubr <n-a-zhubr@yandex.ru> [jagan: add proper commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini2019-01-012-1/+59
|\ \ | |/ |/| | | | | | | | | | | | | imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
| * nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)Lukasz Majewski2019-01-011-0/+47
| | | | | | | | | | | | | | This commit adds support for device tree and enumeration via device model for the Vybrid's NFC NAND driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
| * Kconfig: Add entry for VF610 NAND NFC device tree aware driverLukasz Majewski2019-01-011-0/+11
| | | | | | | | | | | | | | This commit provides code to add proper entry to Kconfig to enable support for VF610 device tree aware driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
| * nand: vybrid: Use calloc() instead of malloc() to allocate struct nfcLukasz Majewski2019-01-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this change it is possible that Vybrid's NFC driver malloc() call will obtain some memory used (and correctly free'd) by some previous driver (in this case pinctrl for Vybrid). As a result some fields of struct nfc - in out case mtd->_get_device - are "pre initialized" with some random values. On the latter stage of booting, when e.g. somebody calls 'mtdparts default' the "data abort" is observed when __get_mtd_device() function is called. The mtd->_get_device pointer is not NULL and wrong value is referenced. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
* | mtd: rawnand: denali: fix a race condition when DMA is kickedMasahiro Yamada2018-12-291-0/+6
| | | | | | | | | | | | | | | | Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47 Add the register read-back, commenting why this is necessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: rawnand: denali: optimize timing parameters for data interfaceMasahiro Yamada2018-12-293-24/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 This commit improves the ->setup_data_interface() hook. The denali_setup_data_interface() needs the frequency of clk_x and the ratio of clk_x / clk. The latter is currently hardcoded in the driver, like this: #define DENALI_CLK_X_MULT 6 The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just chose 6 because it is the most defensive value, but it is not optimal. By getting the clock rate of both "clk" and "clk_x", the driver can compute the timing values more precisely. To not break the existing platforms, the fallback value, 50 MHz is provided. It is true for all upstreamed platforms. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: rawnand: denali_dt: add more clocks based on IP datasheetMasahiro Yamada2018-12-291-3/+35
|/ | | | | | | | | | | | | | | | | | | | | | Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5 Currently, denali_dt.c requires a single anonymous clock, but the Denali User's Guide requires three clocks for this IP: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run This commit supports these named clocks to represent the real hardware. For the backward compatibility, the driver still accepts a single clock just as before. The clk_x_rate is taken from the clock driver again if the named clock "clk_x" is available. This will happen only for future DT, hence the existing DT files are not affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-12-056-81/+339
|\ | | | | | | | | | | | | | | - Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
| * mtd: sf: Make sf_mtd.c more robustBoris Brezillon2018-12-061-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI flash based MTD devs can be registered/unregistered at any time through the sf probe command or the spi_flash_free() function. This commit does not try to fix the root cause as it would probably require rewriting most of the code and have an mtd_info object instance per spi_flash object (not to mention that the the spi-flash layer is likely to be replaced by a spi-nor layer ported from Linux). Instead, we try to be as safe as can be by checking the code returned by del_mtd_device() and complain loudly when there's nothing we can do about the deregistration failure. When that happens we also reset sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks so that -ENODEV is returned instead of hitting a NULL pointer dereference exception when the MTD instance is later accessed by a user. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
| * mtd: sf: Unregister the MTD device prior to removing the spi_flash objBoris Brezillon2018-12-061-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DM implementation of spi_flash_free() does not unregister the MTD device before removing the spi dev object. This leads to a use-after-free bug when the MTD device is later accessed by a MTD user (observed when attaching the device to UBI after env_sf_load() has called spi_flash_free()). Implement ->remove() and call spi_flash_mtd_unregister() from there. Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: Don't stop MTD partition creation when it fails on one deviceBoris Brezillon2018-12-062-28/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MTD partition creation code is a bit tricky. It tries to figure out when things have changed (either MTD dev list or mtdparts/mtdids vars) and when that happens it first deletes all the partitions that had been previously created and then creates the new ones based on the new mtdparts/mtdids values. But before deleting the old partitions, it ensures that none of the currently registered parts are being used and bails out when that's not the case. So, we end up in a situation where, if at least one MTD dev has one of its partitions used by someone (UBI for instance), the partitions update logic no longer works for other devs. Rework the code to relax the logic and allow updates of MTD parts on devices that are not being used (we still refuse to updates parts on devices who have at least one of their partitions used by someone). Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
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