summaryrefslogtreecommitdiffstats
path: root/drivers/mtd
Commit message (Collapse)AuthorAgeFilesLines
* spi: Kconfig: Create ISSI Kconfig entryMichal Simek2018-08-061-0/+5
| | | | | | | Add ISSI to Kconfig to make it selectable via menuconfig. Also convert all current platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-08-041-0/+1
|\
| * mtd: add spi flash id s25fl128lClément Laigle2018-08-031-0/+1
| | | | | | | | | | | | | | | | | | Add support for SPANSION s25fl128l Signed-off-by: Clément Laigle <c.laigle@catie.fr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: fixed , at the end of } ] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: nand: sunxi: Return on set_feature only when not ENOTSUPPMylène Josserand2018-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | Return the error code of the set_features function only if the error code is not ENOTSUPP. Otherwise, if this function is not supported, it will return and fail to initialize the NAND. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
* | mtd: nand: nand_base: Convert EINVAL into ENOTSUPPMylène Josserand2018-07-311-2/+2
|/ | | | | | | | Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES is not supported. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
* mtd: nand: denali: correct buffer alignment for DMA transferMasahiro Yamada2018-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | The NAND framework makes sure to pass in the buffer with at least chip->buf_align alignment. Currently, the Denali NAND driver only requests 16 byte alignment. This causes unaligned cache operations for the DMA transfer. [Error Example] => nand read 81000010 0 1000 NAND read: device 0 offset 0x0, size 0x1000 CACHE: Misaligned operation at range [81000010, 81001010] CACHE: Misaligned operation at range [81000010, 81001010] CACHE: Misaligned operation at range [81000010, 81001010] CACHE: Misaligned operation at range [81000010, 81001010] 4096 bytes read: OK Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2018-07-231-0/+8
|\ | | | | | | | | | | | | trini: Update colibri-imx6ull to use Kconfig for mtdparts related options. Signed-off-by: Tom Rini <trini@konsulko.com>
| * mtd: nand: mxs_nand: add device tree support for i.MX 6Stefan Agner2018-07-231-0/+8
| | | | | | | | | | | | Support i.MX 6 NAND GPMI driver data from device tree. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | Convert CONFIG_MTD_PARTITIONS et al to KconfigAdam Ford2018-07-221-0/+12
| | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_MTD_PARTITIONS CONFIG_MTD_DEVICE Signed-off-by: Adam Ford <aford173@gmail.com>
* | Convert CONFIG_NAND_DAVINCI to KconfigAdam Ford2018-07-211-0/+6
| | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NAND_DAVINCI Signed-off-by: Adam Ford <aford173@gmail.com>
* | Convert CONFIG_NAND_ATMEL to KconfigAdam Ford2018-07-211-0/+7
| | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NAND_ATMEL Signed-off-by: Adam Ford <aford173@gmail.com>
* | Convert CONFIG_NAND_LPC32XX_SLC to KconfigAdam Ford2018-07-211-0/+5
|/ | | | | | | This converts the following to Kconfig: CONFIG_NAND_LPC32XX_SLC Signed-off-by: Adam Ford <aford173@gmail.com>
* sf: add paired dev info for winbond w25q16jvLudwig Zenz2018-07-161-1/+1
| | | | | | | | This commit adds paired dev info for winbond w25q16jv (tested w25q16jvssiq with a i.mx6 board) Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: add Macronix mx25l1633e entryLudwig Zenz2018-07-161-0/+1
| | | | | | | Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board) Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sf: add Gigadevice gd25q16c entryLudwig Zenz2018-07-161-0/+1
| | | | | | | Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board) Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi_flash: add a bunch of winbond flashes to id-tableHannes Schmelzer2018-07-161-0/+5
| | | | | | | | | | | | | This commit adds the following flashes to the id-table - W25Q16JV - W25Q32JV - W25Q64JV - W25Q128JV - W25Q256JV Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Jagan Teki <jagan@openedev.com>
* dm: spi: Update sandbox SPI emulation driver to use ofnodeSimon Glass2018-07-091-4/+5
| | | | | | Update the parameters sandbox_sf_bind_emul to support livetree. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-07-021-2/+2
|\
| * sf: Enable FSR polling on N25Q256(A)Marek Vasut2018-06-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | The N25Q256(A) datasheet clearly states that this device does have a Flag Status Register and does update FSR PEC bit 7 during Program and Erase cycles to indicate the cycle is in progress. Enable the FSR PEC bit polling on this device to prevent data corruption. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-06-281-1/+1
|\|
| * mtd: spi: Correct parameters for s25fs512s flashAshish Kumar2018-06-251-1/+1
| | | | | | | | | | | | | | Change sector size to 256KiB in table spi_flash_ids. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | Merge git://git.denx.de/u-boot-imxTom Rini2018-06-277-163/+462
|\ \ | |/ |/|
| * mtd: nand: mxs_nand_spl: add mxs_flash_full_identJörg Krause2018-06-271-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For now, the existing SPL MXS NAND driver only supports to identify ONFi-compliant NAND chips. In order to allow identifying non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the `nand_get_flash_type()` functionality from `nand_base.c` to lookup for supported NAND chips in the chip ID list. For compatibility reason the full identification support is only available if the config option `CONFIG_SPL_NAND_IDENT` is enabled. The lookup was tested on a custom i.MX6ULL board with a Toshiba TC58NVG1S3HTAI0 NAND chip. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * mtd: nand: mxs_nand_spl: refactor mxs_flash_identJörg Krause2018-06-271-1/+8
| | | | | | | | | | | | | | | | | | | | | | The existing `mxs_flash_ident()` is limited to identify ONFi compliant NAND chips only. In order to support non-ONFi NAND chips refactor the function and rename it to `mxs_flash_onfi_ident()`. A follow-up patch will add `mxs_flash_full_ident()` which allows to use the chip ID list to lookup for supported NAND flashs. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * spl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chipsJörg Krause2018-06-271-0/+1
| | | | | | | | | | | | | | Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list to identify the NAND flash in SPL. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * mtd: nand: export nand_get_flash_type functionJörg Krause2018-06-271-1/+2
| | | | | | | | | | | | | | | | | | `nand_get_flash_type()` allows identification of supported NAND flashs. The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND flash (which does not support ONFi) instead of using nand_simple.c and hard-coding all required NAND parameters. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * mtd: nand: mxs_nand: add support for specific ECC strengthStefan Agner2018-06-271-14/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for specified ECC strength/size using device tree properties nand-ecc-strength/nand-ecc-step-size. This aligns behavior with the mainline driver, such that: - If fsl,use-minimal-ecc is requested it will use data from data sheet/ONFI. If this is not available the driver will fail. - If nand-ecc-strength/nand-ecc-step-size are specified those value will be used. - By default maximum possible ECC strength is used Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: add device tree supportStefan Agner2018-06-274-0/+99
| | | | | | | | | | | | | | Support driver data from device tree. Also support fsl,use-minimal-ecc similar to Linux' GPMI NAND driver. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: move structs into header fileStefan Agner2018-06-272-60/+65
| | | | | | | | | | | | | | Move structs into header file so we can use a separate compile unit for device tree support. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: add use_minimum_ecc to structStefan Agner2018-06-271-14/+20
| | | | | | | | | | | | | | Add use_minimum_ecc as struct mxs_nand_info field in preparation for device tree support. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: separate board/controller initStefan Agner2018-06-271-21/+33
| | | | | | | | | | | | | | In preparation for device tree support separate board init from controller init similar to other raw NAND drivers. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: use more precise function nameStefan Agner2018-06-271-3/+3
| | | | | | | | | | | | | | This function initializes DMA descriptors so mxs_nand_init_dma is more precise. It also frees up the rather generic name mxs_nand_init. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: move register structs to driver dataStefan Agner2018-06-271-17/+17
| | | | | | | | | | | | | | Move GPMI and BCH register structs to the driver struct mxs_nand_info in prepartion for device tree support. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: add minimal ECC supportStefan Agner2018-06-272-14/+66
| | | | | | | | | | | | | | | | Add support for minimum ECC strength supported by the NAND chip. This aligns with the behavior when using the fsl,use-minimum-ecc device tree property in Linux. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: report correct ECC parametersStefan Agner2018-06-271-3/+2
| | | | | | | | | | | | | | | | Report correct ECC parameters back to the stack. Do not report bytes as we have it not immeaditly available and the Linux version also does not report it. It seems to have no aversive effect. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: use structure for BCH geometryStefan Agner2018-06-271-87/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | Calculate BCH geometry at start and store the information in a structure. This avoids recalculation on every page access and allows to calculate ECC relevant information in one place. This patch does not change ECC layout or driver behavior in any way. The patch aligns the driver somewhat with the Linux GPMI NAND driver which drives the same IP. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: allow to enable BBT supportStefan Agner2018-06-271-0/+4
| | | | | | | | | | | | | | | | Add config option which allows to enable on flash bad block table support. This has the same effect as when using the device tree property "nand-on-flash-bbt" in Linux. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: use self initStefan Agner2018-06-273-24/+31
| | | | | | | | | | | | | | | | Instead of completing initialization via scan_bbt callback use NAND self init to initialize the GPMI (MXS) NAND controller. Suggested-by: Scott Wood <oss@buserror.net> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mtd: nand: mxs_nand: introduce SPL specific initStefan Agner2018-06-273-1/+55
| | | | | | | | | | | | | | | | In preparation to convert the driver to use NAND self init provide a new minimal init for SPL builds. As a side effect this also reduces size of SPL by about 4KiB. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()Simon Glass2018-06-191-3/+4
|/ | | | | | | | | Move the strdup() call so that it is only done when we know we will bind the device. Reported-by: Coverity (CID: 131216) Signed-off-by: Simon Glass <sjg@chromium.org>
* lib: Add hexdumpAlexey Brodkin2018-06-134-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Often during debugging session it's very interesting to see what data we were dealing with. For example what we write or read to/from memory or peripherals. This change introduces functions that allow to dump binary data with one simple function invocation like: ------------------->8---------------- print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len); ------------------->8---------------- which gives us the following: ------------------->8---------------- 00000000: f2 b7 c9 88 62 61 75 64 72 61 74 65 3d 31 31 35 ....baudrate=115 00000010: 32 30 30 00 62 6f 6f 74 61 72 67 73 3d 63 6f 6e 200.bootargs=con 00000020: 73 6f 6c 65 3d 74 74 79 53 33 2c 31 31 35 32 30 sole=ttyS3,11520 00000030: 30 6e 38 00 62 6f 6f 74 64 65 6c 61 79 3d 33 00 0n8.bootdelay=3. 00000040: 62 6f 6f 74 66 69 6c 65 3d 75 49 6d 61 67 65 00 bootfile=uImage. 00000050: 66 64 74 63 6f 6e 74 72 6f 6c 61 64 64 72 3d 39 fdtcontroladdr=9 00000060: 66 66 62 31 62 61 30 00 6c 6f 61 64 61 64 64 72 ffb1ba0.loadaddr 00000070: 3d 30 78 38 32 30 30 30 30 30 30 00 73 74 64 65 =0x82000000.stde 00000080: 72 72 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 rr=serial0@e0022 00000090: 30 30 30 00 73 74 64 69 6e 3d 73 65 72 69 61 6c 000.stdin=serial 000000a0: 30 40 65 30 30 32 32 30 30 30 00 73 74 64 6f 75 0@e0022000.stdou 000000b0: 74 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 30 t=serial0@e00220 000000c0: 30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.............. ... ------------------->8---------------- Source of hexdump.c was copied from Linux kernel v4.7-rc2. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2018-06-081-6/+6
|\
| * mtd: ubi: Add missing newlines in ubi_init()Stefan Roese2018-06-061-6/+6
| | | | | | | | | | | | | | | | | | I just stumbled over some cluttered UBI messages. It seems some newline chars are missing in the current U-Boot UBI source. Lets fix this in U-Boot as well (Linux has those fixes already). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | sf: Add support for gd25q32b gigadevice flashCarlo Caione2018-06-041-0/+1
| | | | | | | | | | | | | | | | This flash IC is used in some chromebook models manufactured by Bitland. Signed-off-by: Carlo Caione <carlo@endlessm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | sf: Set current flash bank to 0 in clean_bar()Marek Vasut2018-06-041-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clean_bar() function resets the SPI NOR BAR register to 0, but does not set the flash->curr_bar to 0 , therefore those two can get out of sync, which could ultimatelly result in corrupted flash content. The simplest test case is this: => mw 0x10000000 0x1234abcd 0x4000 => sf probe => sf erase 0x1000000 0x10000 => sf write 0x10000000 0x1000000 0x10000 => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000 That is, erase a sector above the 16 MiB boundary and write it with random pre-configured data. What will actually happen without this patch is the sector will be erased, but the data will be written to BAR 0 offset 0x0 in the flash. This is because the erase command will call write_bar()+clean_bar(), which will leave flash->bank_curr = 1 while the hardware BAR registers will be set to 0 through clean_bar(). The subsequent write will also trigger write_bar()+clean_bar(), but write_bar checks if the target bank == flash->bank_curr and if so, does NOT reconfigure the BAR in the SPI NOR. Since flash->bank_curr is still 1 and out of sync with the HW, the condition matches, BAR programming is skipped and write ends up at address 0x0, thus corrupting flash content. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-05-302-5/+12
|\ | | | | | | | | | | | | - Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv tree fixing a warning. Signed-off-by: Tom Rini <trini@konsulko.com>
| * sf: Add Macronix MX25U25635F IDMarek Vasut2018-05-291-0/+1
| | | | | | | | | | | | | | Add ID for the Macronix MX25U25635F flash. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Add Winbond W25Q256 IDMarek Vasut2018-05-291-0/+2
| | | | | | | | | | | | | | Add ID for the Winbond W25Q256 flash. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Default page size Spansion flash "S25FS512S" is 256bAshish Kumar2018-05-161-5/+6
| | | | | | | | | | | | | | | | | | | | page size for JEDEC EXT starting 0x4d00 is 512b, except JEDEC ID 0x215, 0x216 and 0x220 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [jagan: added proper commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Add support for ISSI is25wpKimmo Rautkoski2018-05-161-0/+3
| | | | | | | | | | | | | | Added support for is25wp032, is25wp064 and is25wp128. Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com> Reviewed-by: Jagan Teki <jagan@openedev.com>