summaryrefslogtreecommitdiffstats
path: root/drivers/mtd/spi
Commit message (Collapse)AuthorAgeFilesLines
...
* mtd: spi-nor: Enable dual and quad read for s25fl256s0Bacem Daassi2020-04-291-1/+1
| | | | | | | | | | The s25fl256s0 supports dual and quad read like s25fl256s1. Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags to the flash_info entry. Tested on real silicon and confirmed to be working. Signed-off-by: Bacem Daassi <Bacem.Daassi@cypress.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*Kuldeep Singh2020-04-291-2/+2
| | | | | | | | | | | | | Commit 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") enables octal mode(1-1-8) support in spi-nor framework. mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable SPI_NOR_OCTAL_READ flag for these flashes. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* spi: use is_power_of_2 instead of hweight32 in spi_nor_write()Rasmus Villemoes2020-04-291-4/+1
| | | | | | | | | | | | | | hweight32 is a somewhat expensive way to check for power-of-2. Use the is_power_of_2 helper, which does the standard and cheap idiom foo&(foo-1)==0. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-96 (-96) Function old new delta spi_nor_write 388 292 -96 Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Add Macronix MX25U3235F deviceTom Warren2020-04-021-0/+1
| | | | | | | Add Macronix MX25U3235F flash device description. This is a 4MiB part. Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-053-0/+3
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Require users of devres to include the headerSimon Glass2020-02-051-0/+1
| | | | | | | | | | At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* mtd: spi-nor-core: Add octal mode supportVignesh Raghavendra2020-01-272-2/+21
| | | | | | | | Add support for Octal flash devices. Octal flash devices use 8 IO lines for data transfer. Currently only 1-1-8 Octal Read mode is supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* common: Move hang() to the same header as panic()Simon Glass2020-01-171-0/+1
| | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-atmel-2020.04-a' of ↵Tom Rini2020-01-071-2/+44
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2020.04 cycle This feature set is a patch series from Tudor Ambarus which includes parsing of the spi flash SFDP parser for SST flashes, and using those tables to retrieve unique saved per device MAC address. This is then used as base mac address on the SAMA5D2 Wireless SOM EK board.
| * mtd: spi: spi-nor-core: Add SST vendor specific SFDP parserTudor Ambarus2019-12-171-2/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | JESD216 allow vendors to define their own SFDP tables. Add SST SFDP parser. The vendor table is allocated using resource-managed kmalloc - the table will be freed on driver detach. It will be accessible by getting the UCLASS_SPI_FLASH's private data. The SST's SFDP table is particularly of interest because contains pre-programmed globally unique EUI-48 and EUI-64 identifiers. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
* | Merge branch 'next'Tom Rini2020-01-061-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
| * | mtd: spi: Export spi_flash_std_probe()Simon Glass2019-12-151-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | With of-platdata we need to create drivers for particular chips, or at least drivers that are separate from the standard code, since C structures are created by dtoc which are private to that driver. To avoid duplicating the probing code, export this probe function for use by these drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | mtd: spi-nor-core: Fix static checker warningsVignesh Raghavendra2019-12-271-0/+6
| | | | | | | | | | | | | | | | | | | | Static checker warns 'ret' variable may be used uninitialized in spi_nor_erase() and spi_nor_write() in case of zero length requests. Fix these warnings by checking for zero length requests and returning early. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* | mtd: spi-nor: ids: Add GigaDevice gd25q128Peter Robinson2019-12-181-0/+5
|/ | | | | | | | | | | Add gd25q128 128Mbit chip to spi-nor id table. Tested on Pinebook Pro Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: SPI_FLASH_MTD depends on MTDMiquel Raynal2019-12-041-1/+1
| | | | | | | | | | It is already the case that all defconfigs with SPI_FLASH_MTD also declare using MTD, but let's make this consistent and enforce it in Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with UBI, which already depends on MTD. Suggested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* spi-nor-ids: Add support for Adesto AT25SL321Fabio Estevam2019-10-251-0/+1
| | | | | | | | | Add an entry for the Adesto AT25SL321 SPI NOR chip. This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTDFrieder Schrempf2019-10-253-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in SPL. They often rely on hacks in the board header files to include this option conditionally. To be able to fix this, we previously introduced a separate option SPL_SPI_FLASH_MTD. Therefore we can now adjust the Makefile and change the code in sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD). We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the header files to the according defconfigs. The affected boards are socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6 and da850evm. We do this all in one patch to guarantee bisectibility. This change was tested with buildman to make sure it does not introduce any regressions by comparing the resulting binary sizes. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entryVignesh Raghavendra2019-10-251-5/+6
| | | | | | | | | | | n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status register that indicates various errors that may be encountered during erase/write operations. Therefore add USE_FSR flag wherever missing. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* spi-nor: spi-nor-ids: Add entries for mt25q variantsVignesh Raghavendra2019-10-251-0/+3
| | | | | | | | | | | mt25q* flashes support stateless 4 byte addressing opcodes. Add entries for the same. These flashes have bit 6 set in 5th byte of READ ID response when compared to n25q* variants. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*Vignesh Raghavendra2019-10-251-4/+4
| | | | | | | | | | | | | Per datasheets of n25q256* and n25q512* not all variants of n25q256* and n25q512* support 4 Byte stateless addressing opcodes. Therefore drop SPI_NOR_4B_OPCODES flag from these entries Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with ↵Vignesh Raghavendra2019-10-252-2/+2
| | | | | | | | | | | SPI_FLASH_USE_4K_SECTORS U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS. Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Use dev_err for reporting erase/write failuresVignesh Raghavendra2019-10-251-3/+3
| | | | | | | | Use dev_err() when reporting reason for erase/write failures so that users can be made aware of the reason for failure. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Add a new option SPL_SPI_FLASH_MTD to KconfigFrieder Schrempf2019-10-251-0/+8
| | | | | | | | | To allow SPI_FLASH_MTD being enabled separately in SPL we add a new option. The only user currently is the stm32mp15_basic board. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASHJagan Teki2019-10-251-0/+1
| | | | | | | | | | | | DM_SPI_FLASH should require spi flash interface code for dm version, so imply SPI_FLASH core by default if any board enabled DM_SPI_FLASH. This overcome the explicit enablement of CONFIG_SPI_FLASH on respective boards when DM_SPI_FLASH being used. Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor: ids: Add is25wp256 chipJagan Teki2019-10-251-0/+2
| | | | | | | | | | Add is25wp256, chip to spi-nor id table. Tested on SiFive FU540 board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* mtd: spi: Kconfig: Update CONFIG_SPI_FLASHJagan Teki2019-10-251-3/+2
| | | | | | | | | | | | 1) CONFIG_SPI_FLASH is not just a legacy code, but it has common core code which handle both dm and non-dm spi flash code. So fix the info text to make it clear globally. 2) Since it's flash core it shouldn't depends on legacy SPI, so remove the 'depends on SPI' Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass2019-10-081-1/+1
| | | | | | | | | | | | At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* mtd: spi-nor: enable protection ops for SST26 flash seriesEugeniy Paltsev2019-09-161-4/+4
| | | | | | | | | | | | | | | Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Enable protection ops for SST26 flash series which were previously enabled by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor: add missing SST26* flash IC protection opsEugeniy Paltsev2019-09-162-0/+182
| | | | | | | | | | | | | | | Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Add missing SST26* flash IC protection ops which were introduced previously by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Drop sf.cJagan Teki2019-09-163-72/+1
| | | | | | | | | spi_write_then_read, will manage to do the respective spi_xfer based on the tx_buf, rx_buf so drop the legacy spi_flash_read/write/cm code. Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi_dataflash: Use spi read then writeJagan Teki2019-09-161-9/+13
| | | | | | | | | | | | | | | | | Now, we have spi_write_then_read routine that would handle spi_xfer handling based on the tx_buf and rx_buf parameters. So, replace individual flash read/write/cmd transfer call with spi_write_then_read. Cc: Egnite GmbH <info@egnite.de> Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu> Cc: Ilko Iliev <iliev@ronetix.at> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Alison Wang <alison.wang@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Add micron mt35xu512aba and mt35xu02g flash IDAshish Kumar2019-07-221-0/+2
| | | | | | | | | | | | | mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O also enable use of SPI_NOR_4B_OPCODES. These flashes are tested on LX2160ARDB and LS1028ARDB respectively Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [jagan: suffix 'ba' on part name and update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Add flash property for Micron mt25qu512aAshish Kumar2019-07-181-0/+2
| | | | | | | | | | | | | mt25qu512a is rebranded after its spinoff from STM, so it is different only in term of extended jedec ID, initial JEDEC id is same as that of n25q512a.In order to avoid any confussion with respect to name new entry is added. This flash is tested for Single I/O mode on LS1046FRWY although it also support QUAD I/O. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor: fix page program issue when using spi-mem driverWeijie Gao2019-05-031-19/+8
| | | | | | | | | | | | | | | | | | | | | | | | Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small, but when that happens we should make sure a WRITE_EN command before each write access and READ_SR command after each write access is issued. We should allow nor->write() to return a size that is smaller than the requested write size to gracefully handle this case. Also, the spi_nor_write_data() should return the actual number of bytes that were written during the spi_mem_exec_op() operation. This patch is a combination of two commits backported from kernel: commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...") commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...") Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Acked-by: Vignesh R <vigneshr@ti.com> Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> # microzed Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-ids: Add Gigadevice gd25lq128 IDNeil Armstrong2019-04-121-0/+5
| | | | | | | | | | | This adds support for the Gigadevice gd25lq128 ID needed on the upcoming libretech-ac board. SPI_NOR_QUAD_READ is not set since it has not been tested in Quad mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* dm: spi: Read default speed and mode values from DTPatrick Delaunay2019-04-121-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch update the behavior introduced by commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT") In case of DT boot, don't read default speed and mode for SPI from CONFIG_* but instead read from DT node. This will make sure that boards with multiple SPI/QSPI controllers can be probed at different bus frequencies and SPI modes. Remove also use in boards of the value speed=0 (no more supported) for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0. DT values will be always used when available (full DM support of SPI slave with available DT node) even if speed and mode are requested; for example in splash screen support (in splash_sf_read_raw) or in SPL boot (in spl_spi_load_image). The caller of spi_get_bus_and_cs() no more need to force speed=0. But the current behavior don't change if the SPI slave is not present (device with generic driver is created automatically) or if platdata is used (CONFIG_OF_PLATDATA). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi: Replace ad-hoc default implementation with spi_mem_opMarek Vasut2019-04-121-8/+6
| | | | | | | | | | | | | | | | | | | | | Replace the ad-hoc erase operation implementation with a simple spi_mem_op implementation of the same functionality. This is a minor optimization and removal of the ad-hoc code. This however also changes the behavior of the execution of the erase opcode from two separate transfer requests to the SPI NOR driver to one transfer request to the SPI NOR driver. The former was how U-Boot behaved before the SPI NOR framework was imported and the later was introduced by the SPI NOR framework. The former is more optimal, so keep that. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Horatiu Vultur <horatiu.vultur@microchip.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com> Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
* mtd: spi: Add Macronix MX66U2G45F deviceMarek Vasut2019-04-121-0/+1
| | | | | | | | | | | Add Macronix MX66U2G45F flash device description. This is a 256 MiB part. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Vignesh R <vigneshr@ti.com> [jagan: use 'g' instead of 'f' in flash name] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: sf_probe: remove spi-flash compatibleNeil Armstrong2019-04-121-1/+0
| | | | | | | | | | Now the "spi-flash" compatible has been removed in the DTS files, remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor" compatible. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* mtd: add spi flash id s25fl064lHeiko Schocher2019-04-121-0/+1
| | | | | | | | Add support for SPANSION s25fl064l Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Vignesh R <vigneshr@ti.com>
* Convert CONFIG_SF_DEFAULT_* to KconfigPatrick Delaunay2019-03-251-0/+36
| | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* mtd: spi: Add lightweight SPI flash stack for SPLVignesh R2019-02-075-263/+1116
| | | | | | | | | | | | | | | | | Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints and would need to use SPI flash framework just to read images/data from flash. There is approximately 1.5 to 2KB savings with this. Based on prior work of reducing spi flash id table by Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: Remove unused filesVignesh R2019-02-072-1548/+0
| | | | | | | | | | | | spi_flash and spi_flash_ids are no longer needed after SPI NOR migration. Remove them. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: Switch to new SPI NOR frameworkVignesh R2019-02-077-280/+89
| | | | | | | | | | | | | Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: sf_probe: Add "jedec, spi-nor" compatible stringVignesh R2019-02-071-0/+1
| | | | | | | | | | | | | Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible SPI Flash device nodes. Therefore make U-Boot also to look for the same compatible string so that we can use Linux DTS files as is. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add back U-Boot specific featuresVignesh R2019-02-071-3/+159
| | | | | | | | | For legacy reasons, we will have to keep around U-Boot specific SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add SFDP supportVignesh R2019-02-072-6/+637
| | | | | | | | | | | | Sync Serial Flash Discoverable Parameters (SFDP) parsing support from Linux. This allows auto detection and configuration of Flash parameters. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add 4 Byte addressing supportVignesh R2019-02-071-0/+141
| | | | | | | | | | | | | | Sync changes from Linux SPI NOR framework to add 4 byte addressing support. This is required in order to support flashes like MT35x that no longer support legacy Bank Address Register(BAR) way of accessing >16MB region. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* mtd: spi: spi-nor-core: Add SPI MEM supportVignesh R2019-02-071-4/+93
| | | | | | | | | | | | | | | | | Many SPI controllers have special MMIO interfaces which provide accelerated read/write access but require knowledge of flash parameters to make use of it. Recent spi-mem layer provides a way to support such controllers. Therefore, add spi-mem support to spi-nor-core as a way to support SPI controllers with MMIO interface. SPI MEM layer takes care of translating spi_mem_ops to spi_xfer()s in case of legacy SPI controllers. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
generated by cgit (git 2.34.1) at 2025-09-27 00:58:42 +0000