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* Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2019-01-181-0/+173
|\ | | | | | | | | | | | | Add TFA boot flow for more boards Add TFA boot defconfig for ls1088a and ls2088a. Add dts fixup for PCIe endpoint and root complex.
| * drivers: ifc: restore the legacy flow for IFC configRajesh Bhagat2019-01-171-0/+173
| | | | | | | | | | | | | | | | | | Restore the legacy flow along with TFABOOT flow for IFC configuration. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | misc: fs_loader: Switching private data allocation to DM auto allocationTien Fong Chee2019-01-151-63/+45
|/ | | | | | | | | Switching private data manual allocation to driver model auto allocation so users no longer need to deallocate themself because this would be deallocated by driver model when the device is no longer required. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: imx8: scu: use platdata instead of priv dataPeng Fan2019-01-091-13/+13
| | | | | | | | | | priv data has not been allocated when doing bind, so it is wrong to use dev_get_priv in bind call back. Let's switch to use platdata in the driver to fix the issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: imx: scu: avoid write null pointerPeng Fan2019-01-091-2/+2
| | | | | | | | | When boot_dev is true, fill boot device. However the original logic is when boot_dev is false, fill boot device, this will trigger data abort. Also fix sc_misc_get_control when using pointer val. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini2019-01-011-3/+3
|\ | | | | | | | | | | | | | | | | imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
| * imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan2019-01-011-3/+3
| | | | | | | | | | | | | | Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
* | misc: Add JZ47xx efuse driverPaul Burton2018-12-193-0/+110
|/ | | | | | | | | | Add driver for the efuse block in the JZ47xx SOC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
* Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-12-101-136/+352
|\ | | | | | | | | | | | | | | Add TFA boot flow for some Layerscape platforms Add support for lx2160a SoC [trini: Add a bunch of missing MAINTAINERS entries] Signed-off-by: Tom Rini <trini@konsulko.com>
| * drivers: ifc: dynamic chipselect mapping supportPankit Garg2018-12-061-136/+352
| | | | | | | | | | | | | | | | | | | | | | | | IFC driver changes to implement the chipselect mappings at run time. Defines init_early_memctl_regs and init_final_memctl_regs with chipselect dynamic mapping for nor and nand boot. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
* | cros_ec: Adjust to use v1 vboot context onlySimon Glass2018-12-051-4/+6
| | | | | | | | | | | | | | | | | | | | At present there are no users of the 64-byte v2 context. The v1 context is only 16 bytes long and currently an error is raised if too much data is returned from the EC. Update the code to limit the size to 16 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros: Correct a printf() string and commentSimon Glass2018-12-051-2/+2
|/ | | | | | | Correct a warning that occurs on sandbox. Also fix the comment style in cros_ec_set_lid_shutdown_mask(). Signed-off-by: Simon Glass <sjg@chromium.org>
* misc: Update read() and write() methods to return bytes xferedSimon Glass2018-11-204-4/+16
| | | | | | | | | | | At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* cros_ec: Add new features for events and powerSimon Glass2018-11-202-7/+340
| | | | | | | This adds new commands to the EC related to setting and clearing events as well as controlling power-related settings. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Align uclass data to a cache boundarySimon Glass2018-11-201-0/+1
| | | | | | | The LPC driver expects its buffer to be word-aligned. Add the required flag to the uclass driver to ensure this. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Fail if we cannot determine the flash burst sizeSimon Glass2018-11-201-0/+3
| | | | | | | This value is required for flashing to work correctly. Add a check for it. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Add error logging on a few commandsSimon Glass2018-11-201-2/+9
| | | | | | Add some more logging to provide more information on failures. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Use uint instead of u8 for parametersSimon Glass2018-11-201-6/+4
| | | | | | | | | There is no advantage to using a u8 for function parameters. It forces the compiler to mask values and can increase code size. Also the command enum has been extended to 16 bits. Update the functions to use uint instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* misc: fs_loader: Fix compiler warningKeerthy2018-11-161-1/+1
| | | | | | | | | | | Fix compiler warning drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t {aka long unsigned int}’ [-Wformat=] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: fs_loader: Use device_get_global_by_ofnode to get to nodeKeerthy2018-11-161-3/+2
| | | | | | | | | Instead of two staged ofnode_to_offset followed by device_get_global_by_of_offset approach, direcly use the device_get_global_by_ofnode to fetch the device. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* test: dm: pci: Add cases for finding next PCI capability APIsBin Meng2018-11-141-0/+9
| | | | | | | | Add test cases to cover the two newly added PCI APIs: dm_pci_find_next_capability() & dm_pci_find_next_ext_capability(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: Add IHS FPGA driverMario Six2018-11-144-0/+926
| | | | | | | | Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which supports initialization of the FPGA, as well as information gathering. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
* misc: Add gdsys_soc driverMario Six2018-11-144-0/+106
| | | | | | | This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
* misc: Sort Makefile entriesMario Six2018-11-141-30/+31
| | | | | | | | | Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()Bin Meng2018-11-141-2/+2
| | | | | | | | | | | | | | | | | | | | Currently the comments of several APIs (eg: dm_init_and_scan()) say: @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC flag. If false bind all drivers. The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt documents the same that both device tree properties and driver flag are supported. However the implementation only checks these special device tree properties without checking the driver flag at all. This updates lists_bind_fdt() to consider both scenarios. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in http://patchwork.ozlabs.org/patch/996473/ : Signed-off-by: Simon Glass <sjg@chromium.org>
* drivers: cosmetic: Convert SPDX license tags to Linux Kernel stylePatrick Delaunay2018-10-281-2/+2
| | | | | | | | | Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style"). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini2018-10-254-0/+637
|\ | | | | | | Merged imx8 architecture, fix build for imx8 + warnings
| * misc: imx8: add scfw api impementationPeng Fan2018-10-222-1/+368
| | | | | | | | | | | | | | | | | | | | Add clk/misc/pad/pm/rm scfw api implementaion for different drivers to invoke. The low level code is using misc_call to invoke imx8_scu driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * misc: add i.MX8 misc driverPeng Fan2018-10-223-0/+270
| | | | | | | | | | | | | | | | | | Add i.MX8 MISC driver to handle the communication between A35 Core and SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | cros_ec: Add support for v3 messages on LPCSimon Glass2018-10-091-0/+33
| | | | | | | | | | | | | | At present version 3 messages are only supported on SPI. Add support for using LPC as well, as used on samus. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Update cros_ec_read_hash() to specify the imageSimon Glass2018-10-091-3/+4
| | | | | | | | | | | | Allow selection of which EC image to hash. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros: Update ec_commands to latest versionSimon Glass2018-10-092-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | This file has changed quite a bit in the last 5 years as the capabilities of the ECs have grown. Sync it up with the copy in coreboot commit b9141f2215. The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed because U-Boot uses the new v2 vboot API and this is not currently fully supported by Chromium OS firmware. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros: Update cros_ec code to use struct udeviceSimon Glass2018-10-092-75/+76
| | | | | | | | | | | | | | | | At present we pass around a private pointer to specify the cros_ec device. With driver model it makes more sense to pass the device. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: Update ofnode to read binman-style flash entrySimon Glass2018-10-091-16/+17
|/ | | | | | | | | | At present ofnode_read_fmap_entry() reads a flash map entry in a format which is not supported by binman. To allow use to use binman-format descriptions, update this function. Also add a simple test. Signed-off-by: Simon Glass <sjg@chromium.org>
* misc: Add support for the Arm Versatile Express config busLiviu Dudau2018-10-063-0/+137
| | | | | | | | | | | | Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-09-291-5/+6
|\ | | | | | | | | | | | | | | Switch to driver model for eSDHC on Layerscape SoCs including LS1021A, LS1043A, LS1046A, LS1088A, LS2088A. Switch to driver model for SATA on LS1021A and LS1043A. Add support for LS1012AFRWY rev C board. Enable SMMU for LS1043A.
| * armv8: ls1043a: enable icid setup for qman portalsLaurentiu Tudor2018-09-271-5/+6
| | | | | | | | | | | | | | | | Enable support for ICID setup of qman portals and the required device tree fixups. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | common: Generic loader for file systemTien Fong Chee2018-09-283-0/+305
|/ | | | | | | | | This is file system generic loader which can be used to load the file image from the storage into target such as memory. The consumer driver would then use this loader to program whatever, ie. the FPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
* misc: Add MPC83xx serdes driverMario Six2018-09-184-0/+425
| | | | | | | | Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
* Convert CONFIG_TWL4030_LED et al to KconfigAdam Ford2018-08-171-0/+5
| | | | | | | | | | | This converts the following to Kconfig: CONFIG_TWL4030_LED CONFIG_TWL4030_INPUT This also removes dead references to: CONFIG_TWL4030_KEYPAD Signed-off-by: Adam Ford <aford173@gmail.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-08-131-6/+39
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| * armv8: ls1046a: add icid setup for qman portalsLaurentiu Tudor2018-08-101-4/+39
| | | | | | | | | | | | | | | | Add support for ICID setting of qman portals and the required device tree fixups. Also fix an endiness issue in portal setup code. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * misc: fsl_portals: setup QMAN_BAR{E} also on ARM platformsLaurentiu Tudor2018-08-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | QMAN_BAR{E} register setup was disabled on ARM platforms, however the register does need to be set. Enable the code also on ARMs and fix the CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly enabled code works. Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | misc: Add gdsys_ioep driverMario Six2018-08-114-0/+353
| | | | | | | | | | | | Add driver for the IHS IO endpoint on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* | test: Add tests for misc uclassMario Six2018-08-112-1/+134
| | | | | | | | | | | | | | Add a set of tests for the misc uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
* | misc: uclass: Add enable/disable functionMario Six2018-08-111-0/+10
| | | | | | | | | | | | | | Add generic enable/disable function to the misc uclass. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
* | test: dm: pci: Add cases for finding PCI capability APIsBin Meng2018-08-081-0/+21
| | | | | | | | | | | | | | | | | | Add several PCI capability and extended capability ID registers in the swap_case driver, so that we can add test case for dm_pci_find_capability() and dm_pci_find_ext_capability(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | pci: sandbox: swap_case: Declare dynamic driver matchingBin Meng2018-08-081-0/+7
| | | | | | | | | | | | | | This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | pci: sandbox: swap_case: Preserve space indicator bit in BAR registersBin Meng2018-08-081-3/+5
|/ | | | | | | | | | | | | | | | | | | | | | With the newly added testing of more than one device, we get: => ut dm pci_swapcase Test: dm_test_pci_swapcase: pci.c test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Test: dm_test_pci_swapcase: pci.c (flat tree) test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Failures: 2 The failure only happens on the 2nd swap_case device on the PCI bus. The case passes on the 1st device. It turns out the swap_case driver does not emulate bit#0 in BAR registers as a read-only bit. This corrects the implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: stm32: Add STM32MP1 supportPatrick Delaunay2018-07-202-5/+16
| | | | | | | | | | | | Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers. We can reuse and adapt RCC MFD driver already available for MCU SoCs (F4/F7/H7). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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