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* arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár2021-03-123-17/+0
* ddr: marvell: axp: fix array types have different bounds warningMarek Behún2021-03-122-3/+3
* ddr: marvell: axp: align signature of mv_xor_mem_init() with a38xMarek Behún2021-03-122-4/+4
* ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repositoryPali Rohár2021-03-1210-40/+6
* ddr: marvell: a38x: Add more space for additional info from SPDSujeet Baranwal2021-03-121-1/+7
* ddr: marvell: a38x: fix comment in conditional macroMarek Behún2021-02-261-1/+1
* ddr: marvell: a38x: bump version to 14.0.0Marek Behún2021-02-261-1/+1
* ddr: marvell: a38x: enum mv_ddr_twin_die: change orderheaterC2021-02-261-1/+1
* ddr: marvell: a38x: import code change from upstreamMarek Behún2021-02-261-0/+3
* ddr: marvell: a38x: fix memory cs size functionMoti Buskila2021-02-262-5/+10
* ddr: marvell: a38x: import header change from upstreamMarek Behún2021-02-261-3/+0
* ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bitMoti Buskila2021-02-261-0/+3
* ddr: marvell: a38x: add support for twin-die combined memory deviceMoti Buskila2021-02-262-1/+17
* ddr: marvell: a38x: add 16Gbit memory devices supportMoti Buskila2021-02-262-1/+4
* ddr: marvell: a38x: allow board specific ODT configurationBaruch Siach2021-02-262-0/+8
* ddr: marvell: a38x: import header change from upstreamMarek Behún2021-02-261-0/+8
* ddr: marvell: a38x: fix memory size calculation using 32bit bus widthMoti Buskila2021-02-263-10/+0
* ddr: marvell: a38x: fix 32bitMoti Buskila2021-02-261-1/+1
* ddr: marvell: a38x: import header change from upstreamMarek Behún2021-02-261-0/+2
* ddr: marvell: a38x: add ddr 32bit ECC supportAlex Leibovich2021-02-263-1/+11
* ddr: marvell: a38x: add ddr32 supportAlex Leibovich2021-02-261-1/+4
* ddr: marvell: a38x: import header change from upstreamMarek Behún2021-02-261-1/+2
* ddr: marvell: a38x: fix write leveling suplementary algoMoti Buskila2021-02-261-1/+4
* ARM: mvebu: a38x: Fix comment typoNaoki Hayama2020-10-221-1/+1
* mv_ddr: ddr3: Update {min,max}_read_sample calculationChris Packham2020-07-091-2/+2
* mv_ddr: ddr3: Use correct bitmask for read sample delayChris Packham2020-07-091-1/+1
* common: Drop linux/delay.h from common headerSimon Glass2020-05-189-0/+9
* common: Drop log.h from common headerSimon Glass2020-05-188-0/+8
* arm: mvebu: drivers/ddr: remove redundant assignmentHeinrich Schuchardt2020-04-141-4/+0
* ddr: marvell: a38x: Allow boards to specify CK_DELAY parameterChris Packham2020-04-144-0/+19
* arm: mvebu: fix A38x breakage from commit bb872dd930ccJoel Johnson2020-01-261-1/+1
* ddr: marvell: a38x: allow board specific clock out setupBaruch Siach2020-01-212-2/+11
* common: Move the image globals into image.hSimon Glass2020-01-171-0/+1
* image: Rename load_addr, save_addr, save_sizeSimon Glass2020-01-171-3/+3
* arm: mvebu: Add Marvell's integrated CPUsChris Packham2019-04-121-0/+4
* mv_ddr: ddr3: only use active chip-selects when tuning ODTChris Packham2019-03-191-1/+2
* mv_ddr: ddr3: fix tRAS timimg parameterChris Packham2019-03-191-4/+4
* ARM: mvebu: restore license information in mv_ddr_plat.{c,h}Chris Packham2018-12-092-0/+9
* ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02Chris Packham2018-12-0831-1254/+1156
* ARM: mvebu: a38x: Add missing SPDX license identfierChris Packham2018-05-151-1/+3
* ARM: mvebu: a38x: use non-zero size for ddr scrubbingChris Packham2018-05-143-1/+5
* ARM: mvebu: a38x: restore support for setting timingChris Packham2018-05-144-5/+17
* ARM: mvebu: a38x: sync ddr training code with upstreamChris Packham2018-05-1451-5087/+7879
* ARM: mvebu: a38x: remove some unused codeChris Packham2018-05-147-794/+0
* ARM: mvebu: a38x: move sys_env_device_rev_getChris Packham2018-05-141-24/+0
* ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESSChris Packham2018-05-141-2/+0
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0764-130/+64
* ddr: marvell: update ddr controller init and freqChris Packham2018-01-193-21/+34
* ddr: marvell: update additional ODT settingChris Packham2018-01-191-8/+14
* ddr: marvell: use correct TREFI valueChris Packham2018-01-191-1/+1
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