summaryrefslogtreecommitdiffstats
path: root/drivers/clk/renesas
Commit message (Collapse)AuthorAgeFilesLines
* clk: renesas: Add Gen2 clock coreMarek Vasut2018-01-245-0/+339
| | | | | | | Add common clock code for Renesas RCar Gen2 platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Add DIV6P1 clock typeMarek Vasut2018-01-241-0/+6
| | | | | | | | Add macros for the DIV6P1 clock type, which is used on Gen2 and optionally also on Gen3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut2018-01-244-167/+203
| | | | | | | | Pull code which is common for RCar Gen2 and RCar Gen3 into separate source file. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Make clock tables Kconfig configurableMarek Vasut2018-01-242-5/+33
| | | | | | | | | Add Kconfig entries for each SoC clock table, so they can be compiled in or out at build time. This can reduce the size of the binary if desired. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-246-30/+57
| | | | | | | | | The Gen2 requires setting RMSTPCR before booting, while on Gen3 this is thus far always zero. Split the tables so the RMSTPCR can be set too. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-246-41/+64
| | | | | | | Extract the macros specific to Gen3 clock into a separate header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-246-51/+178
| | | | | | | | Not all SoCs have the same PLL configuration options, so make those PLL configuraion tables per-SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-246-40/+143
| | | | | | | Not all drivers use the same IDs, so make those IDs per-driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-247-903/+1052
| | | | | | | | | | Split the massive driver into smaller per-SoC drivers and pull the common code into a separate file. This would allow configuring out unnecessary clock drivers once the Kconfig changes are in and also allow adding more clock tables easily. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add R8A77995 D3 clock tablesMarek Vasut2017-12-091-3/+164
| | | | | | | Add clock tables for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add R8A77970 V3M clock tablesMarek Vasut2017-12-092-4/+121
| | | | | | | Add clock tables for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Fix typo in R8A7796 RPC clock table entryMarek Vasut2017-12-091-1/+1
| | | | | | | Fix a copy-paste typo in the clock table entry, s/7795/7796/. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add R8A7796 xHCI clockMarek Vasut2017-11-301-0/+1
| | | | | | | | Add xHCI entry into the clock tables, so that the xHCI USB driver can enable the clock for the xHCI block via clock framework. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Move preboot clock shutdown to the driverMarek Vasut2017-11-301-0/+59
| | | | | | | | | | | The MSTP registers were poked in boards/renesas/rcar-common/common.c in arch_preboot_os hook thus far to shut down the clock before Linux takes over. With DM, this is no longer needed and we can do the same in the clock driver .remove callback. This patch adds such a .remove callback for R8A7795 and R8A7796. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add RPC hyperflash clockMarek Vasut2017-09-241-1/+43
| | | | | | | | Add missing RPC hyperflash entry into the clock driver tables. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add support for setting SDxCKCRMarek Vasut2017-09-241-0/+34
| | | | | | | | | | The SDxCKCR must be configured correctly, otherwise the SDIF can be unstable. This is done in board files thus far, but those are going away, so move the setting of SDxCKCR into the correct place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Split R8A7795 and R8A7796 core clock tablesMarek Vasut2017-08-261-33/+96
| | | | | | | | | | The R8A7795 and R8A7796 tables use different constants to identify clock in DT, so split the tables and use the correct constants on R8A7795. This fixes UART clock misconfiguration on R8A7795. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: rmobile: Add RCar Gen3 clock driverMarek Vasut2017-08-033-0/+965
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit (git 2.34.1) at 2024-10-05 21:32:45 +0000