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path: root/drivers/clk/renesas/r8a77995-cpg-mssr.c
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* clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-241-7/+13
| | | | | | | | | The Gen2 requires setting RMSTPCR before booting, while on Gen3 this is thus far always zero. Split the tables so the RMSTPCR can be set too. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-241-0/+1
| | | | | | | Extract the macros specific to Gen3 clock into a separate header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-241-0/+24
| | | | | | | | Not all SoCs have the same PLL configuration options, so make those PLL configuraion tables per-SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-241-0/+31
| | | | | | | Not all drivers use the same IDs, so make those IDs per-driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-241-0/+179
Split the massive driver into smaller per-SoC drivers and pull the common code into a separate file. This would allow configuring out unnecessary clock drivers once the Kconfig changes are in and also allow adding more clock tables easily. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>