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	Commit message (Collapse)	Author	Age	Files	Lines
*	cache: add ALLOC_CACHE_ALIGN_BUFFER macro	Anton staaf	2011-10-25	1	-0/+2
\| \| \| \| \| \| \| \| \| \| \| \| \|	This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
*	arm: do not force d-cache enable on all boards	Aneesh V	2011-09-04	1	-0/+51
	c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable() to board_init_r(). This enables d-cache for all ARM boards. As a result some of the arm boards that are not cache-ready are broken. Revert this change and allow platform code to take the decision on d-cache enabling. Also add some documentation for cache usage in ARM. Signed-off-by: Aneesh V <aneesh@ti.com>