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* Changed PPC405GPr version from A to B.stroese2003-04-043-5/+5
* Clip udiv to 5 bits on PPC405 (serial.c).stroese2003-03-201-0/+2
* Set edge conditioning circuitry on PPC405GPr for compatibility to existing PP...stroese2003-03-201-0/+10
* * Patches by David Müller, 31 Jan 2003:LABEL_2003_03_06_2255wdenk2003-03-061-0/+19
* * Patches by Robert Schwebel, 06 Mar 2003:wdenk2003-03-061-0/+8
* * Patch by Rune Torgersen, 13 Feb 2003:LABEL_2003_03_06_0200wdenk2003-03-061-48/+45
* Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).stroese2003-02-171-1/+1
* Add "pcidelay" environment variable (in ms, enabled via CONFIG_PCI_BOOTDELAY).stroese2003-02-141-2/+2
* Cleanup: remove trailing white spacewdenk2003-02-111-5/+5
* Added 4MByte and 128MByte onboard SDRAMstroese2003-02-101-4/+105
* * Patch by Hans-Joerg Frieden, 06 Dec 2002LABEL_2002_12_07_0120wdenk2002-12-071-2/+16
* Initial revisionwdenk2002-11-031-0/+1425
* Initial revisionwdenk2002-11-034-0/+2660
* Initial revisionwdenk2002-11-037-0/+2638
* Initial revisionwdenk2002-09-181-0/+27
* Initial revisionwdenk2002-09-181-0/+452
* Initial revisionwdenk2002-08-271-0/+309
* Initial revisionwdenk2002-08-271-0/+148
* Initial revisionwdenk2002-08-172-0/+473
* Initial revisionwdenk2002-07-071-0/+47
* Initial revisionwdenk2001-10-211-0/+198
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