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* Merge tag 'u-boot-rockchip-20191110' of ↵Tom Rini2019-11-111-2/+0
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x40000 - Fix the u8 type comparision with '-1'. - Fix checkpatch warning for multi blank line and review signature.
| * rockchip: rk3399: update SPL_STACK_R_ADDRKever Yang2019-11-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config; default to 0x4000000(64MB) instead of 0x80000(512KB) for this address can support all the SoCs including those may have only 64MB memory, and also reserve enough space for atf, kernel(in falcon mode) loading. After the ATF entry move to 0x40000, the stack from 0x80000 may be override when loading ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399: defconfig: no need to reserve IRAM for SPLKever Yang2019-11-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code, and when we introduce the TPL, the SPL space is in DRAM, we reserve space to avoid SPL text overlap with ATF bl31. Now we decide to move ATF entry point to 0x40000 instead of 0x1000, so that the SPL can have 0x4000 as code size and no need to reserve space or relocate before loading ATF. The mainline ATF has update since: 0aad563c rockchip: Update BL31_BASE to 0x40000 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | configs: Resync with savedefconfigTom Rini2019-11-071-1/+0
|/ | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* rockchip: rk3399: defconfig: remove SPL raw image supportKever Yang2019-08-231-0/+1
| | | | | | RK3399 SPL only support FIT image for ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* configs: Resync with savedefconfigTom Rini2019-08-141-1/+0
| | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* rockchip: rk3399: default enable SPL LIBCOMMON and LIBGENERICKever Yang2019-07-201-2/+0
| | | | | | | | We needs SPL LIBCOMMON and LIBGENERIC for all boards, so we can enable them by default and no need to define in each board. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3399: use default value for SYS_MALLOC_F_LENKever Yang2019-07-201-1/+0
| | | | | | | There is no difference in rk3399 board use for SYS_MALLOC_F_LEN, so we can use default value. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* configs: Resync with savedefconfigTom Rini2019-06-211-3/+3
| | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* rockchip: rk3399: Add Nanopi NEO4 board supportJagan Teki2019-05-301-0/+60
Add initial support for Nanopi NEO4 board. Specification - Rockchip RK3399 - 1GB DDR3-1866 - SD card slot - eMMC Socket - RTL8211E 1Gbps - AP6212 WiFI/BT - HDMI In/Out, DP, MIPI CSI - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 5V/3A Commit details of rk3399-nanopi-neo4.dts sync from Linux: "arm64: dts: rockchip: Add Nanopi NEO4 initial support" (sha1: 092470b537f19788d957aed12d835a179b606014) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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