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* arm: socfpga: add cyclone5 based de10-nano boardDalon Westergreen2017-04-257-0/+1328
| | | | | | | | | Add support for the Terasic DE10-Nano board. The board is based on the DE0-Nano-Soc board but adds a larger FPGA and an HDMI output. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-04-1817-22/+110
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| * powerpc/board/t1024rdb: enable board-level reset when issuing reset commandShengzhou Liu2017-04-171-0/+7
| | | | | | | | | | | | | | | | | | As board-specific reset logic, it needs to issue reset signal via CPLD when issuing 'reset' command in u-boot, this patch solves the issue of reset command not working on T1024RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv7: ls1021a: Drop macro CONFIG_LS102XAYork Sun2017-04-173-5/+5
| | | | | | | | | | | | Use CONFIG_ARCH_LS1021A instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * arm: ls1046ardb: Add SD secure boot targetRuchika Gupta2017-04-171-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1043ardb: Add NAND secure boot targetRuchika Gupta2017-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND secure boot target for ls1043ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript from NAND to DDR. Offsets for Bootscript on NAND and DDR have been also defined. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1043ardb: Add SD secure boot targetRuchika Gupta2017-04-172-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add SD secure boot target for ls1043ardb. - Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for secure boto header. - Error messages during SPL boot are limited to error code numbers instead of strings to reduce the size of SPL image. Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LS1012ARDB: Add QSPI Secure Boot targetVinitha Pillai-B572232017-04-172-0/+9
| | | | | | | | | | | | | | | | | | Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LS1046ARDB: Add QSPI Secure Boot targetVinitha Pillai-B572232017-04-173-1/+24
| | | | | | | | | | | | | | | | Add QSPI Secure Boot target. Also enable sec init. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LS1046AQDS: Add NOR Secure Boot TargetSumit Garg2017-04-172-0/+23
| | | | | | | | | | | | | | | | Add NOR secure boot target. Also enable sec init. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046ardb: SPL size reductionSumit Garg2017-04-173-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: SPL size reductionSumit Garg2017-04-173-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using changes in this patch we were able to reduce approx 10k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1043ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. 5. Remove I2C driver support from SPL in case of LS1043ARDB. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | board: Remove orphan SPARC boardsTom Rini2017-04-1820-281/+0
| | | | | | | | | | | | | | Since 936478e797a8 SPARC as been removed as an architecture. Remove these now orphan boards. Signed-off-by: Tom Rini <trini@konsulko.com>
* | blackfin: ibf-dsp561: remove orphan Blackfin boardMasahiro Yamada2017-04-185-64/+0
| | | | | | | | | | | | | | This is a Blackfin board that commit ea3310e8aafa ("Blackfin: Remove") missed to remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2017-04-166-0/+233
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| * | rockchip: ARM64: split RK3399-Q7 board off the RK3399-EVB boardKlaus Goger2017-04-156-0/+233
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230 connector) system-on-module from Theobroma Systems, featuring the Rockchip RK3399. It provides the following feature set: * up to 4GB DDR3 * on-module SPI-NOR flash * on-module eMMC (with 8-bit interace) * SD card (on a baseboad) via edge connector * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY * HDMI/eDP/MIPI displays * 2x MIPI-CSI * USB - 1x USB 3.0 dual-role (direct connection) - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub) * on-module STM32 Cortex-M0 companion controller, implementing: - low-power RTC functionality (ISL1208 emulation) - fan controller (AMC6821 emulation) - USB<->CAN bridge controller Note that we use a multi-payload FIT image for booting and have Cortex-M0 payload in a separate subimage: we thus rely on the FIT image loader to put it into the SRAM region that ATF expects it in. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixed build warning on puma-rk3399: Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2017-04-162-167/+27
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| * | board: sama5d3_xplained: Enable early debug UARTWenyou Yang2017-04-141-1/+12
| | | | | | | | | | | | | | | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * | board: sama5d3_xplained: Clean up codeWenyou Yang2017-04-141-34/+0
| | | | | | | | | | | | | | | | | | | | | | | | Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * | board: sama5d3_xplained: Update to support DM/DTWenyou Yang2017-04-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Fix build error with sama5d3_xplained_mmc: Signed-off-by: Simon Glass <sjg@chromium.org>
| * | board: sama5d3xek: Enable early debug UARTWenyou Yang2017-04-141-1/+12
| | | | | | | | | | | | | | | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * | board: sama5d3xek: Clean up codeWenyou Yang2017-04-141-133/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Remove CONFIG_PHY_MICREL as per previous patch: Signed-off-by: Simon Glass <sjg@chromium.org>
| * | board: sama5d3xek: Update to support DM/DTWenyou Yang2017-04-141-0/+2
| |/ | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Add back CONFIG_PHY_MICREL to prevent a build error: Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2017-04-146-19/+102
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| * board: toradex: colibri_vf: Add DCU support for Colibri VybridStefan Agner2017-04-143-16/+99
| | | | | | | | | | | | | | | | | | | | | | The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * Convert CONFIG_FSL_DCU_FB to KconfigSanchayan Maity2017-04-143-3/+3
| | | | | | | | | | | | | | | | | | Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB and convert it to Kconfig. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2017-04-147-2/+2
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| * | ARM: socfpga: Rename MCVEVKMarek Vasut2017-04-147-2/+2
| |/ | | | | | | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
* | Merge git://git.denx.de/u-boot-dmTom Rini2017-04-137-560/+322
|\ \ | | | | | | | | | | | | Here with some DM changes as well as the long-standing AT91 DM/DT conversion patches which I have picked up via dm.
| * | board: sama5d4ek: enable early debug UARTWenyou Yang2017-04-131-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | board: sama5d4ek: clean up codeWenyou Yang2017-04-131-133/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | board: sama5d4ek: update to support DM/DTWenyou Yang2017-04-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | board: sama5d4_xplained: enable early debug UARTWenyou Yang2017-04-131-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | board: sama5d4_xplained: clean up codeWenyou Yang2017-04-131-133/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | board: sama5d4_xplained: update to support DM/DTWenyou Yang2017-04-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | gpio: at91_gpio: remove CPU_HAS_PIO3 macroWenyou Yang2017-04-137-348/+348
| |/ | | | | | | | | | | | | | | | | | | | | The intention of the removal is the preparation to introduce the new AT91 PIO pinctrl driver. Use the union to make the PIO3 and PIO2's registers be together and make their offset aligned. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-04-1328-207/+1173
|\ \ | | | | | | | | | | | | | | | Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | imx: i.mx6q: add the initial support for LogicPD i.MX6Q SOMAdam Ford2017-04-126-0/+361
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Logic PD has an i.MX6Q system on module (SOM) with a development kit. The SOM has a built-in microSD socket, DDR and NAND flash. The development kit has an SMSC Ethernet PHY, serial debug port and a variety of peripherals. This have been verified to boot the i.MX6Q version over either SD on the development kit or NAND built into the SOM. Items in the dtsi file are specific to the SOM itself. Items in the dts file are in the baseboard. Future versions of the SOM will come out supporting the same basebord and potentially future base boards will come out supporting the same SOM. Signed-off-by: Adam Ford <aford173@gmail.com>
| * | mx6sabresd: README: Add eMMC boot configurationBreno Lima2017-04-121-8/+47
| | | | | | | | | | | | | | | | | | | | | Explain how to flash the eMMC and how to boot from it. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | board: advantech: dms-ba16: apply the proper register setting to fix the ↵Yung-Ching LIN2017-04-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | voltage peak issue Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register to avoid the voltage peak issue while we do the IEEE PHY comformance test Signed-off-by: Ken Lin <yungching0725@gmail.com> Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
| * | board: advantech: dms-ba16: fix AR8033 reset timing issueYung-Ching LIN2017-04-121-1/+2
| | | | | | | | | | | | | | | | | | | | | Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet Signed-off-by: Ken Lin <yungching0725@gmail.com> Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
| * | board: advantech: dms-ba16: add the PMIC configuration supportYung-Ching LIN2017-04-121-0/+51
| | | | | | | | | | | | | | | | | | | | | Change the PMIC bulk configuration from auto mode to sync mode to avoid the voltage shutdown issue Signed-off-by: Ken Lin <yungching0725@gmail.com> Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
| * | board: advantech: dms-ba16: Add the configuration options for display ↵Yung-Ching LIN2017-04-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | initialization Add the configuration options for display initialization in case we need to do the display initialization in kernel to support different timing settings Signed-off-by: Ken Lin <yungching0725@gmail.com> Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
| * | ARM: mx5: Rename M53EVKMarek Vasut2017-04-055-6/+6
| | | | | | | | | | | | | | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | ARM: mxs: Rename M28EVKMarek Vasut2017-04-056-11/+11
| | | | | | | | | | | | | | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | imx: ventana: add new board configs to MAINTAINERSTim Harvey2017-03-261-1/+3
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: fix GW5903 VDD_ARM railTim Harvey2017-03-261-0/+6
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add GW5903 supportTim Harvey2017-03-205-4/+153
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add GW560x supportTim Harvey2017-03-205-27/+163
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add GW5904 supportTim Harvey2017-03-206-15/+270
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
generated by cgit (git 2.34.1) at 2024-10-05 15:17:56 +0000