summaryrefslogtreecommitdiffstats
path: root/board
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'u-boot-amlogic-20210406' of ↵Tom Rini2021-04-0612-26/+2
|\ | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add MMIO MDIO mux driver - Add Amlogic G12A MDIO mux driver - Add DM_MDIO support for designware ethernet driver - Add Amlogic Meson8b and later designware ethernet glue driver - Switch all amlogic boards to Amlogic designware ethernet glue driver - Switch all amlogic boards to DM_MDIO when necessary - Remove all static ethernet setup code
| * arm: meson: remove static ethernet link setupNeil Armstrong2021-04-0612-26/+2
| | | | | | | | | | | | | | The static ethernet link type config code is no more needed because now handled by the meson8b glue driver, delete it. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | Merge tag 'rockchip-for-v2021.07' of ↵Tom Rini2021-04-052-1/+13
|\ \ | |/ |/| | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3368 lion board support; - Fix px30 odroid-go2 board support; - Add rk3399 NanoPi R4s and NanoPi M4B board support;
| * board: dts: rockchip: Add NanoPi M4BAlexandre Vicenzi2021-03-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add initial support for NanoPi M4B, a minor revision of the original NanoPi M4. Commit details of rk3399-nanopi-m4b.dts sync from Linux 5.12-rc4: "arm64: dts: rockchip: Add NanoPi M4B board" (sha1: c7b03115003f7f337ab165542cee37148cf30a8a) Signed-off-by: Alexandre Vicenzi <alexandre.vicenzi@suse.com> Reviewed-by: Kever Yang <kever.yang@rock-cihps.com>
| * arm64: rk3399: Add support NanoPi R4sXiaobo Tian2021-03-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support, including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port. port.It also has two GPIO headers which allows further peripherals to be used. The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1]. [1] https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6 Signed-off-by: xiaobo <peterwillcn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399-puma: Increase environment size to 16 kiB.Christoph Muellner2021-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | On Puma we have the environment at an offset of 16 kiB. On the eMMC this gives us 16 kiB for the environment before the SPL starts. On the SPI NOR we also have 16 kiB until end of flash. So let's increase the environment size from 8 kiB to its maximum of 16 kiB for both MMC and SPI NOR. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | Merge tag 'xilinx-for-v2021.07' of ↵Tom Rini2021-03-313-82/+3910
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
| * | arm64: zynqmp: Update psu_init for zcu1275Michal Simek2021-03-301-82/+148
| | | | | | | | | | | | | | | | | | Update clock/pll setup, ddr, MIOs based on 2020.2 hw design. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add missing psu inits for zcu208/216Michal Simek2021-03-302-0/+3762
| | | | | | | | | | | | | | | | | | Add missing configurations file for zcu208 and zcu216. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge tag 'v2021.04-rc5' into nextTom Rini2021-03-291-0/+5
|\| | | |/ |/| | | Prepare v2021.04-rc5
| * board: freescale: t208xrdb: Add link to User GuideChris Packham2021-03-231-0/+5
| | | | | | | | | | | | | | | | | | The User Guide contains handy things like block diagrams and DIP switch settings and it's even available on the public web. Add a link to it in the README. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | x86: coral: Show memory config and SKU ID on startupSimon Glass2021-03-272-14/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide the model information through sysinfo so that it shows up on boot. For memconfig 4 pins are provided, for 16 combinations. For SKU ID there are two options: - two pins provided in a ternary arrangement, for 9 combinations. - reading from the EC Add a binding doc and drop the unused #defines as well. Example: U-Boot 2021.01-rc5 CPU: Intel(R) Celeron(R) CPU N3450 @ 1.10GHz DRAM: 3.9 GiB MMC: sdmmc@1b,0: 1, emmc@1c,0: 2 Video: 1024x768x32 @ b0000000 Model: Google Coral (memconfig 5, SKU 3) This depends on the GPIO series: http://patchwork.ozlabs.org/project/uboot/list/?series=228126 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: Make coreboot sysinfo available to any x86 boardSimon Glass2021-03-271-1/+1
| | | | | | | | | | | | | | | | | | It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: coral: Free the ACPI GPIOs after using themSimon Glass2021-03-271-0/+2
| | | | | | | | | | | | | | These GPIOs are needed later if Chromium OS verified boot is running, so free them after use. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Create a new sandbox_noinst buildSimon Glass2021-03-261-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Move sandbox_spl over to use OF_PLATDATA_INST. Create a new board to test the case when this is not enabled, since we will be keeping that code around for several months and want to avoid regressions. Skip the dm_test_of_plat_dev() test since driver info is not available for OF_PLATDATA_INST. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: add FAT to the list of usable env driversHeinrich Schuchardt2021-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | Add the FAT environment driver to the priority list. When testing the UEFI sub-system the EFI system partition is formatted with FAT so it is reasonable to store the environment there. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | board: Add MT8183 pumpkin board supportFabien Parent2021-03-204-0/+50
| | | | | | | | | | | | Add the MT8183 pumpkin board support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* | board: mediatek: mt8516: init USB Ether for pumpkin boardFabien Parent2021-03-201-0/+4
| | | | | | | | | | | | Init USB Ether if CONFIG_USB_ETHER is enabled. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* | board: mediatek: rename pumpkin board into mt8516Fabien Parent2021-03-205-9/+9
| | | | | | | | | | | | | | | | | | More than one pumpkin board has been made with different MediaTek SoCs. Rename the pumpkin board to follow the naming convention of all other MediaTek boards and also to not be confusing when other pumpkin boards will be added in follow-up commits. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* | board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar2021-03-161-0/+4
| | | | | | | | | | | | | | Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* | arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-164-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* | arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das2021-03-161-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* | arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das2021-03-161-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* | arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das2021-03-164-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* | Merge tag 'v2021.04-rc4' into nextTom Rini2021-03-1557-1467/+5689
|\| | | | | | | Prepare v2021.04-rc4
| * Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini2021-03-159-56/+17
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
| | * board: st: Remove board_early_init_f and board_late_init callbacks for stm32 ↵Patrice Chotard2021-03-126-40/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | boards Remove board_early_init_f() and board_late_init() callbacks for stm32 boards as the corresponding flags (CONFIG_BOARD_LATE_INIT and CONFIG_BOARD_EARLY_INIT_R) are now disabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| | * board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when availablePatrick Delaunay2021-03-111-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check whether user has explicitly defined the mmc device to use in mmc_get_env_dev() with CONFIG_SYS_MMC_ENV_DEV. On STMicroelectronics boards the used mmc device for environment is the instance of boot device provided by the ROM code; the mmc instance is configured by alias in device tree. The used partition is defined in device tree with u-boot,mmc-env-partition = "ssbl". This patch allows to override this selection for the support of customer boards without alias; for example when SDMMC1 is not used and ENV in mmc0=SDMMC2, user can force the value: CONFIG_SYS_MMC_ENV_DEV = 0. On STMicroelectronics boards, the current behavior is kept with CONFIG_SYS_MMC_ENV_DEV = -1. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * stm32mp: stm32prog: Add CONFIG_CMD_STM32PROG_SERIAL and _USBPatrick Delaunay2021-03-111-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to independently select the support of UART or USB communication for STM32CubeProgrammer. For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL to use U-Boot console of binary loaded by UART (for board bring-up for example). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * board: st: remove the nand MTD configuration for NOR boot in stm32mp1 boardPatrick Delaunay2021-03-111-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit d5d726d3cc47 ("configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp"), the stm32mp1 boards only support SD card after NOR boot device, so the MTD partitions for nand0 or spi-nand0 are useless (no need of "UBI" partition in nand0 or spi-nand0). This patch removes these nand MTD update for nor boot and simplify nand0 and spi-nand0 support (remove the mtd_boot variable). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-bootTom Rini2021-03-081-0/+5
| | | | | | | | | | | | - Add VAB support
| * | ppc: qemu: Move board directory from board/freescale to board/emulationBin Meng2021-03-054-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | board/emulation is the place for other QEMU targets like x86, arm, riscv. Let's move the qemu-ppce500 board codes there. List me as a co-maintainer for this board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Drop fixed_sdram()Bin Meng2021-03-051-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is not called anywhere. Only fsl_ddr_sdram_size() is necessary [1] for QEMU. Drop it. [1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init() Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Drop a custom env variable 'fdt_addr_r'Bin Meng2021-03-051-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Delete the temporary FDT virtual-physical mapping after U-Boot is ↵Bin Meng2021-03-051-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | relocated After U-Boot is relocated to RAM already, the previous temporary FDT virtual-physical mapping that was used in the pre-relocation phase is no longer needed. Let's delete the mapping. get_fdt_virt() might be used before and after relocation, update it to return different virtual address of FDT. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Enable VirtIO NET supportBin Meng2021-03-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the QEMU ppce500 machine connects a VirtIO NET to the PCI controller, although it can be replaced to an e1000 NIC via additional command line options. Now that we have switched over to DM PCI, VirtIO support becomes possible. This commit enables the support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Drop CONFIG_OF_BOARD_SETUPBin Meng2021-03-051-7/+0
| | | | | | | | | | | | | | | | | | | | | ft_board_setup() is now empty. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Switch over to use DM ETH and PCIBin Meng2021-03-051-90/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Switch over to use DM serialBin Meng2021-03-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by: - drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Enable OF_CONTROLBin Meng2021-03-051-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 machine generates a device tree blob and passes it to U-Boot during boot. Let's enable OF_CONTROL with OF_BOARD and provide board_fdt_blob_setup() in the board codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Drop board_early_init_f()Bin Meng2021-03-051-5/+0
| | | | | | | | | | | | | | | | | | | | | This function does nothing. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Drop init_laws() and print_laws()Bin Meng2021-03-051-10/+0
| | | | | | | | | | | | | | | | | | | | | These are no longer needed. Drop them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Support non-identity PCI bus addressBin Meng2021-03-051-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When QEMU originally supported the ppce500 machine back in Jan 2014, it was created with a 1:1 mapping of PCI bus address. Things seemed to change rapidly that in Nov 2014 with the following QEMU commits: commit e6b4e5f4795b ("PPC: e500: Move CCSR and MMIO space to upper end of address space") and commit cb3778a0455a ("PPC: e500 pci host: Add support for ATMUs") the PCI memory and IO physical address were moved to beyond 4 GiB, but PCI bus address remained below 4 GiB, hence a non-identity mapping was created. Unfortunately corresponding U-Boot updates were missed along with the QEMU changes and the U-Boot QEMU ppce500 PCI support has been broken since then. This commit makes the PCI (non-DM version) work again. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Update MAINTAINERS for correct email addressBin Meng2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Alex's previous email address is no longer reachable. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: ls1012aqds: Update MAINTAINERSPriyanka Jain2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | Update LS1012AQDS Board MAINTAINERS entries to current MAINTAINERS. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: lx2160a: Update MAINTAINERSPriyanka Jain2021-03-051-1/+0
| | | | | | | | | | | | | | | | | | | | | Update LX2160AQDS BOARD MAINTAINER entry to current MAINTAINER. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: ls1046ardb: Update MAINTAINERSPriyanka Jain2021-03-051-7/+0
| | | | | | | | | | | | | | | | | | | | | Update LS1046ARDB BOARD MAINTAINERS entries to current MAINTAINERS. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: ls1046aqds: Update MAINTAINERSPriyanka Jain2021-03-051-3/+0
| | | | | | | | | | | | | | | | | | | | | Update LS1046AQDS BOARD MAINTAINERS entries to current MAINTAINERS. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: ls2080ardb: Update MAINTAINERSPriyanka Jain2021-03-051-3/+3
| | | | | | | | | | | | | | | | | | | | | Update LS2080ARDB BOARD MAINTAINERS entries to current MAINTAINERS. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board: ls2080aqds: Update MAINTAINERSPriyanka Jain2021-03-051-5/+1
| | | | | | | | | | | | | | | | | | | | | Update LS2080AQDS BOARD MAINTAINERS entries to current MAINTAINERS. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-10 14:19:37 +0000