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* | arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 ↵Luka Kovacic2020-10-141-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | networking Add support for the marvell,armada8040-puzzle-m801 compatible string in the board/Marvell/mvebu_armada-8k/board.c file to initialize the networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports). Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* | arm: mvebu: Initial iEi Puzzle-M801 supportLuka Kovacic2020-10-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial U-Boot support for the iEi Puzzle-M801 board based on the Marvell Armada 88F8040 SoC. Currently supported hardware: 1x USB 3.0 4x Gigabit Ethernet 2x SFP+ (with NXP PCA9555 and NXP PCA9544) 1x SATA 3.0 1x M.2 type B 1x RJ45 UART 1x SPI flash 1x EPSON RX8010 RTC Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* | Merge tag 'ti-v2021.01-rc1' of ↵Tom Rini2020-10-122-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Minor cleanup on K3 env variables - Fix OSPI compatible for J721e - Drop unused property in omap-usb2-phy - Update Maintainer for am335x-guardian board.
| * | board: ti: j721e: Fix OSPI node compatibleVignesh Raghavendra2020-10-121-1/+1
| | | | | | | | | | | | | | | | | | | | | Update detect_enable_hyperflash() to look for "ti,am654-ospi" compatible to match the upstream DT node. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| * | am335x, guardian: update the maintainer listMoses Christopher2020-10-121-1/+1
| | | | | | | | | | | | | | | | | | I am leaving Bosch, so replacing myself with Gireesh Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
* | | riscv: Add FPIOA and GPIO support for Kendryte K210Sean Anderson2020-10-081-0/+9
| |/ |/| | | | | | | | | | | This patch adds the necessary configs and docs for FPIOA and GPIO support on the K210. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* | Merge tag 'mips-pull-2020-10-07' of ↵Tom Rini2020-10-072-4/+468
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - mips: octeon: add support for DDR4 memory controller - mips: octeon: add support for DWC3 USB - mips: octeon: add support for booting Linux
| * | mips: octeon: octeon_ebb7304: Add DDR4 supportStefan Roese2020-10-072-4/+468
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the board specific configuration (struct) for the Octeon 3 EBB7304 EVK. This struct is ported from the 2013er Cavium / Marvell U-Boot repository. Also, the Octeon RAM driver is enabled in the board defconfig for its usage. Tested with one and two DIMMs on the EBB7304 EVK (8 & 16 GiB). Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge tag 'dm-pull-6oct20' of git://git.denx.de/u-boot-dmTom Rini2020-10-061-1/+1
|\ \ \ | |/ / |/| | | | | | | | | | | bloblist enhancement for alignment Update ofnode/dev_read phandle function sandbox keyboard enhancements and fixes
| * | dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay2020-10-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cell_count argument is required when cells_name is NULL. This patch adds this parameter in live tree API - of_count_phandle_with_args - ofnode_count_phandle_with_args - dev_count_phandle_with_args This parameter solves issue when these API is used to count the number of element of a cell without cell name. This parameter allow to force the size cell. For example: count = dev_count_phandle_with_args(dev, "array", NULL, 3); Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini2020-10-066-4/+235
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
| * | board: amlogic: vim3: add support for dynamic PCIe enableNeil Armstrong2020-10-052-0/+198
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving these differential lines is shared between the USB3.0 controller and the PCIe Controller, thus only a single controller can use it. This adds this dynamic switching right before booting Linux and the configuration steps in the boards documentation. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fixed warning by replacing min() by min_t()]
| * | board: amlogic: add a vim3 specific board supportNeil Armstrong2020-10-054-4/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIM3 will need a specific code to enable PCIe if enabled in the MCU, thus add a specific board support for VIM3 & VIM3L. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | board: s400: generate unique mac address from SoC serialNeil Armstrong2020-10-051-0/+2
| |/ | | | | | | | | | | Enable unique mac address generation from SoC serial on S400 board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | Merge branch 'next'Tom Rini2020-10-0563-1034/+793
|\ \ | |/ |/| | | | | | | | | Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
| * Merge tag 'u-boot-atmel-2021.01-a' of ↵Tom Rini2020-10-051-0/+33
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.01 cycle: This feature set includes a new CPU driver for at91 family, new driver for PIT64B hardware timer, support for new at91 family SoC named sama7g5 which adds: clock support, including conversion of the clock tree to CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The feature set also includes updates for mmc driver and some other minor fixes and features regarding building without the old Atmel PIT and the possibility to read a secondary MAC address from a second i2c EEPROM.
| | * board: atmel: common: introduce at91_set_eth1addr for second interfaceEugen Hristev2020-09-221-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have a function to retrieve the mac address from one EEPROM. For boards with a second Ethernet interface, however, we would require another EEPROM with a second unique MAC address. Introduce at91_set_eth1addr which will look for a second EEPROM and set the 'eth1addr' variable with the obtained MAC address. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * | board: renesas: draak: Drop CA57 resetBiju Das2020-09-261-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas Draak board based on R-Car D3 has single CA53. This patch drops check for cputype from reset_cpu() and also drops the corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro which is unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | board: renesas: remove empty board_early_init_f functionBiju Das2020-09-262-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove empty board_early_init_f function, since it is disabled in ebisu and condor board configs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | board: renesas: Remove empty s_init functionBiju Das2020-09-265-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | Default s_init weak function available, so remove the s_init empty function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 ↵Tom Rini2020-09-2515-1/+461
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next - Enhance the 'zboot' command to be more like 'bootm' with sub-commands - The last series of ACPI core changes for programmatic generation of ACPI tables - Add all required ACPI tables for ApolloLake and enable ACPIGEN on Chromebook Coral - A feature minor enhancements to the 'hob' command - Intel edison: Support for writing an xFSTK image via binman
| | * | x86: edison: Generate an image suitable for xFSTKSimon Glass2020-09-252-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to flash Edison directly without relying on the installed U-Boot being functional. Add a binman image for this. It includes a 'OSIP' header (which happens to look like an MBR / (Master-Boot Record), U-Boot binary and an environment. I am not able to find a specification for OSIP. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | x86: coral: Add audio descriptor filesSimon Glass2020-09-255-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add files describing the various audio configurations supported on coral. These are passed to Linux in the ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: coral: Add ACPI tables for coralSimon Glass2020-09-257-0/+412
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This device has a large set of ACPI tables. Bring these in from coreboot so that full functionality is available (apart from SMI). Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: apl: Correct PCIE_ECAM_BASESimon Glass2020-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This value is incorrect and causes problems booting Linux. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | Merge tag 'xilinx-for-v2021.01' of ↵Tom Rini2020-09-243-186/+204
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
| | * | fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGAMichal Simek2020-09-231-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile and zynqmp.c to simplify if/endif logic in zynqmp.c. This change is mostly done to be able to use CONFIG_IS_ENABLED macro and obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync. And removing one line from Topic Miami boards which is not needed because symbol is not enabled via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | xilinx: common: Do not save fdt_blob to bss sectionMichal Simek2020-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynqmp: Add support for saving variablesMichal Simek2020-09-231-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode. Maybe that logic can be tuned for more complicated use cases and better tested for different bootmodes. Tested on zcu104 to SD(FAT) and JTAG(NOWHERE). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOARD_LATE_INITMichal Simek2020-09-231-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | This function will be also used by different code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynqmp: Remove one static variableMichal Simek2020-09-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to have name variable saved in BSS section when it doesn't need to be really used. That's why remove static from variable definition and use strdup() to duplicate string with exact size from malloc area instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynqmp: Add missing 43/46/47dr ID codesMichal Simek2020-09-231-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Add support for 43/46/47dr devices. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynqmp: refactor silicon name functionIbai Erkiaga2020-09-231-165/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current algorithm used to get the silicon name is bit complicated and hard to follow. Updated to use more straightforward mechanism based on the Device ID code table (Table 1-2). The full IDCODE register is used (except device revision bits [31:28]) to get the device name and IDCODE2 value is used for identifying the variant. Additionally to make the algorithm bit more clear it also save some space as the devices table is slightly bit smaller. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | board: xilinx: Enable changing default DTB pick up addressMichal Simek2020-09-231-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot on xilinx boards is checking one address where DTB can be placed as the first location for DTB. Originally this code was developed for Versal where QEMU was putting generated DTB for U-Boot to use. The patch enables changing this address which is necessary for cases where default address is pointing to location (DDR) which is not present. The access to this location can cause exception. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | board/freescale: Remove P5020DS board supportPriyanka Jain2020-09-246-52/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P5020DS board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | powerpc:Remove P4080DS secure boot configsPriyanka Jain2020-09-241-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P4080DS secure boot configs as they are no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: Remove P3041DS secure boot configsPriyanka Jain2020-09-241-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P3041DS secure boot configs as they are no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1024RDB board supportPriyanka Jain2020-09-242-6/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1024RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1021RDB board supportPriyanka Jain2020-09-244-88/+1
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1021RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020MBG board supportPriyanka Jain2020-09-243-8/+3
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020MBG board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020UTM board supportPriyanka Jain2020-09-244-8/+1
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020UTM board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1025RDB board supportPriyanka Jain2020-09-245-49/+4
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1025RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: Remove P1010RDB secure boot configsPriyanka Jain2020-09-241-12/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1010RDB secure boot configs as they are no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove p1023rdb board supportPriyanka Jain2020-09-247-386/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc p1023rdb board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | p1010rdb: Don't compile board_eth_init() for DM_ETHHou Zhiqiang2020-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board_eth_init() is only used by legacy ethernet driver framework, so do not compile it when DM_ETH config has been selected. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | p1_p2_rdb: Don't compile board_eth_init() for DM_ETHHou Zhiqiang2020-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board_eth_init() is only used by legacy ethernet driver framework, so do not compile it when DM_ETH config has been selected. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r()Hou Zhiqiang2020-09-241-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move vsc7835 firmware uploading to board_early_init_r(), so that the switch also can work in DM eTSEC driver. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | sunxi: Drop the FIT-generator scriptSimon Glass2020-09-221-87/+0
| | | | | | | | | | | | | | | | | | This file is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge branch '2020-09-14-generic-phy-error-trace' into nextTom Rini2020-09-211-1/+1
| |\ \ | | | | | | | | | | | | - Add error tracing messages to the generic PHY infrastructure
| | * | board: sunxi: change trace level for phy errors managed by uclassPatrick Delaunay2020-09-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As the error message is now displayed by generic phy functions, the pr_err can be change to pr_idebug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
generated by cgit (git 2.34.1) at 2025-01-26 22:02:18 +0000