summaryrefslogtreecommitdiffstats
path: root/board
Commit message (Collapse)AuthorAgeFilesLines
* sunxi: board: Set fdtfile to match the DT chosen by SPLSamuel Holland2020-11-171-2/+11
| | | | | | | | | | | | | | | | | | | Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE. This meant that, regardless of the DT chosen by SPL (either by changing the header in the image or by the selection code at runtime), Linux always used the default DT. By using the name from the SPL header (which, because of the previous commit, always matches the DT used by U-Boot proper), Linux also sees the same board as U-Boot/SPL, even if the boot script later loads a DT from disk. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: board: Save the chosen DT name in the SPL headerSamuel Holland2020-11-171-1/+27
| | | | | | | | | | | | | | This overwrites the name loaded from the SPL image. It will be different if there was previously no name provided, or if a more accurate name was determined by the board variant selection logic. This means that the DT name in the SPL header now always matches the DT appended to U-Boot. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: move function under CONFIG_SPL_LOAD_FIT guard] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: board: Add PinePhone DT selection logicSamuel Holland2020-11-171-0/+21
| | | | | | | | | | | | There are two different publicly-released revisions of the PinePhone hardware, versions 1.1 and 1.2; and they need different device trees. Since some GPIO pins were rerouted, we can use that to distinguish between them. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: board: Simplify Pine A64 DT selection logicSamuel Holland2020-11-171-8/+4
| | | | | | | | | | | | | | | Instead of using an entirely separate matching algorithm, simply update the name of the DT we want to match. Enabling this logic does not depend on the FIT config name, only on the initial guess of the board name. Importantly, the initial guess must be "sun50i-a64-pine64-plus", because otherwise the logic would trigger when "sun50i-a64-pine64-lts" was written to the SPL header. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: board: Add a helper to get the SPL DT nameSamuel Holland2020-11-171-9/+19
| | | | | | | | | | | | | | | This moves the validity checking and typecasts all to one place away from the string comparison logic, and it detangles the compile-time and runtime control flow. The new helper will also be used by U-Boot proper in a future commit. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: protect new function with CONFIG_SPL_LOAD_FIT] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: board: Use a more descriptive variable nameSamuel Holland2020-11-171-6/+6
| | | | | | | | | | | | | The variable "cmp_str" always leaves me wondering if it is the DT name of the current board (yes) or DT name in the FIT config entry (no). In preparation for expanding the functionality here, rename it to something that obviously means "this is the DT name we are looking for". Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* Merge tag 'ti-v2021.01-rc3' of ↵Tom Rini2020-11-163-8/+49
|\ | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix Nokia RX-51 boot issues - Fix CONFIG_LOGLEVEL on K3 devices - Add phyBOARD REGOR support
| * Nokia RX-51: Make onenand workingIvaylo Dimitrov2020-11-152-0/+22
| | | | | | | | | | | | | | | | set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash. Fix that by setting the correct timings and size from the board code Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Tested-by: Pali Rohár <pali@kernel.org>
| * Nokia RX-51: During init disable lp5523 led instead of resetting itPali Rohár2020-11-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit d5243359e1af ("OMAP24xx I2C: Add support for set-speed") U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c poll ARDY bit which apparently is never set. It is not known what is happening here. Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off very bright led which is powered on by NOLO and expects next boot image (kernel or U-Boot) to turn it off. After testing we observed that just disabling lp5523 led is working fine. So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead of resetting it. Signed-off-by: Pali Rohár <pali@kernel.org> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
| * Nokia RX-51: Fix crashing in U-Boot mmc function omap_hsmmc_stop_clock()Pali Rohár2020-11-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | After commit 04a2ea248f58 ("mmc: disable UHS modes if Vcc cannot be switched on and off") U-Boot started crashing on Nokia RX-51 while initializing mmc and caused reboot loop. It looks like that some clocks were not enabled and this patch fixes U-Boot mmc crash. Signed-off-by: Pali Rohár <pali@kernel.org> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
| * Nokia RX-51: Convert to CONFIG_DM_I2CPali Rohár2020-11-151-6/+19
| | | | | | | | | | | | | | Use twl4030_i2c_read(), i2c_get_chip_for_busnum() and remove CONFIG_SYS_I2C. Signed-off-by: Pali Rohár <pali@kernel.org>
| * ARM: am335x: Add phyBOARD REGOR supportParthiban Nallathambi2020-11-151-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060). CPU : AM335X-GP rev 2.1 Model: Phytec AM335x phyBOARD-REGOR DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 eth0: ethernet@4a100000 Working: - Eth0 - i2C - MMC/SD - NAND - UART - USB (host) Device trees were taken from Linux mainline: commit c4d6fe731176 ("Linux 5.9.0") Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | rockchip: gru: Allow setting up clocks in U-Boot properAlper Nebi Yasak2020-11-131-0/+23
|/ | | | | | | | | | | | | | | | Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in U-Boot proper") fixes some clock issues when chainloading U-Boot on rk3288 chromebooks. Part of that change is still available in veyron's board_early_init_r() function. Since chain-loading U-Boot proper from vendor firmware is possible on gru boards as well, do the same thing for them too. On rk3399, this needs to detect whether SPL was run via handoff, so enable that and bloblist kconfigs it needs for chromebook_bob. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
* x86: coral: Correct max98357 fileSimon Glass2020-11-101-0/+0
| | | | | | | This somehow ended up as an empty file. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini2020-11-065-39/+78
|\ | | | | | | | | | | | | | | | | - Add a new SMBIOS parser and enable it when booting from coreboot - Fix up various driver names to avoid dtoc warnings - Fully enable ACPI support on Google Chromebook Coral - Add a way to set SMBIOS properties using the devicetree - Update existing boards to use devicetree for SMBIOS using a new default sysinfo driver
| * x86: galileo: Use devicetree for SMBIOS settingsSimon Glass2020-11-061-11/+0
| | | | | | | | | | | | | | | | Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * board: Rename uclass to sysinfoSimon Glass2020-11-063-28/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uclass is intended to provide a way to obtain information about a U-Boot board. But the concept of a U-Boot 'board' is the whole system, not just one circuit board, meaning that 'board' is something of a misnomer for this uclass. In addition, the name 'board' is a bit overused in U-Boot and we want to use the same uclass to provide SMBIOS information. The obvious name is 'system' but that is so vague as to be meaningless. Use 'sysinfo' instead, since this uclass is aimed at providing information on the system. Rename everything accordingly. Note: Due to the patch delta caused by the symbol renames, this patch shows some renamed files as being deleted in one place and created in another. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * coreboot: make use of smbios parserChristian Gmeiner2020-11-051-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | board: ge: b1x5v2: Add MAINTAINERSSebastian Reichel2020-11-041-0/+9
| | | | | | | | | | | | | | | | Introduce maintainers file for the GE B1x5 board. Cc: Huan 'Kitty' Wang <HuanWang@ge.com> Cc: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: ge: ppd: Update MAINTAINERSSebastian Reichel2020-11-041-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the PPD MAINTAINERS file doing a couple of changes: * Replace Martyn with myself, since he no longer has the hardware available and add Ian Ray as maintainer * Fix the board directory path, which was still listing freescale/ instead of ge/ * Order the list of files alphabetically * Add board specific device tree files to the file list Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: ge: bx50v3: Update MAINTAINERSSebastian Reichel2020-11-041-3/+8
| | | | | | | | | | | | | | | | This updates the Bx50v3 MAINTAINERS file, so that it also catches changes to the related device tree files. Additionally the list of files has been sorted alphabetically and I added myself as maintainer. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2Sebastian Reichel2020-11-014-0/+1305
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor series (GE Bx50). It consists of a carrier PCB used in combination with a Congatec QMX6 SoM. This adds U-Boot support using device model everywhere and SPL for memory initialization. Proper configuration is provided as 'ge_b1x5v2_defconfig' and the combined image u-boot-with-spi.imx can be flashed directly to 1024 byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can be loaded separately via USB-OTG using e.g. imx_usb. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ge: common: vpd: separate I2C specific codeSebastian Reichel2020-11-014-12/+27
| | | | | | | | | | | | | | | | | | This separates the I2C specific code from the generic GE vital product data code, so that the generic parts can be used on hardware with VPD stored in SPI flash memory. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: ge: common: add config option for RTC and VPD featureSebastian Reichel2020-11-014-1/+13
| | | | | | | | | | | | | | | | While this code is being used by all GE platforms its useful to have it behind a config option for hardware bringup of new platforms. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: ge: common: rename ge_common.c to ge_rtc.cSebastian Reichel2020-11-015-3/+3
| | | | | | | | | | | | | | The file only contains RTC related code, so let's name it accordingly. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
* | board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM supportTeresa Remmet2020-11-016-0/+2059
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
* | arm: Implement show_boot_progress() for imx53's HSC and DDC devicesLukasz Majewski2020-11-011-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides information regarding the boot stage with using LEDs. On the very beginning of U-Boot execution the GREEN LED is turned on. When the execution is passed to Linux kernel the GREEN LED is off and RED one is ON. Afterwards, when Linux takes over the execution, the "heartbeat" driver provides indication if the board is still alive. Please also note that this patch uses {set|clr}bits_le32 macros as turning ON GREEN LED is performed in a _very_ early stage of U-Boot execution before DM_GPIOs are initialized. Signed-off-by: Lukasz Majewski <lukma@denx.de>
* | doc: board: Convert i.MX6ULL EVK README to reSTPeng Fan2020-11-011-36/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX6UL 14x14 EVK README to reSTPeng Fan2020-11-011-82/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX6 Sabresd README to reSTPeng Fan2020-11-011-114/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX6 Sabreauto README to reSTPeng Fan2020-11-011-82/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MXRT1050 EVK README to reSTPeng Fan2020-11-011-31/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MXRT1020 EVK README to reSTPeng Fan2020-11-011-31/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX8QXP MEK README to reSTPeng Fan2020-11-011-50/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX8MQ EVK README to reSTPeng Fan2020-11-011-37/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX8MM EVK README to reSTPeng Fan2020-11-011-37/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX8MN EVK README to reSTPeng Fan2020-11-011-37/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | doc: board: Convert i.MX8MP EVK README to reSTPeng Fan2020-11-011-41/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | board: imx: address dd usage in READMEPeng Fan2020-11-0111-22/+22
|/ | | | | | | | | | | | | | When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)", the last not 512bytes aligned data wat cut off and not burned into SD card. Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only burned 1085440 bytes, the leaving 168 bytes were not burnned and cause boot issue. So update README dd command to add "conv=notrunc" Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Merge tag 'u-boot-rockchip-20201031' of ↵Tom Rini2020-10-308-2/+57
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New PX30 board: Engicam PX30.Core; - Fix USB HID support for rock960; - Remove host endianness dependency for rockchip mkimage; - dts update for rk3288-tinker; - Enable console MUX for some ROCKPi boards; - Add config-based ddr selection for px30;
| * rockchip: Add Engicam PX30.Core C.TOUCH 2.0Jagan Teki2020-10-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
| * rockchip: Add Engicam PX30.Core EDIMM2.2 Starter KitJagan Teki2020-10-304-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
| * board: engicam: Attach i.MX6 common codeJagan Teki2020-10-304-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | The existing common code for Engicam boards uses i.MX6, so attach that into i.MX6 Engicam boards so-that adding new SoC variants of Engicam boards become meaningful. Add support for it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
* | Merge tag 'dm-pull-30oct20' of ↵Tom Rini2020-10-301-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
| * | sandbox: Drop ad-hoc device declarations in SPLSimon Glass2020-10-291-0/+2
| | | | | | | | | | | | | | | | | | | | | Since sandbox's SPL is build with of-platadata, we should not use U_BOOT_DEVICE() declarations as well. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini2020-10-2917-193/+1496
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
| * | xilinx: Consolidate board_fit_config_name_match() for Xilinx platformsMichal Simek2020-10-291-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | mmc: zynq_sdhci: Add common function to set input/output tapdelaysAshok Reddy Soma2020-10-291-157/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mmc: Define timing macro'sAshok Reddy Soma2020-10-271-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define timing macro's for all the available speeds of mmc. This is done similar to linux. Replace speed macro's used with these new timing macro's wherever applicable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | microblaze: Wire generic xilinx board_late_init_xilinx()Michal Simek2020-10-272-14/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2024-10-06 00:14:07 +0000