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* common: Drop image.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop flash.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | | | Move this uncommon header out of the common header. Fix up some style problems in flash.h while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move RAM-sizing functions to init.hSimon Glass2020-01-173-0/+3
| | | | | | | These functions relate to memory init so move them into the init header. Signed-off-by: Simon Glass <sjg@chromium.org>
* riscv: ax25-ae350: Use generic memory size setupRick Chen2019-12-101-19/+2
| | | | | | | | | | To get memory size from device tree instead of get_ram_size(). This can avoid memory access fault in U-Boot proper after PMP configurations in OpenSBI. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
* riscv: ax25-ae350: add SPL configurationRick Chen2019-12-103-0/+40
| | | | | | | | | | | | | | | | | | | | This patch provides four configurations which can support U-Boot SPL to boot from RAM or FLASH and then boot FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices. With ae350_rv[32|64]_spl_defconfigs: U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode and then load FIT image from RAM device on AE350. With ae350_rv[32|64]_spl_xip_defconfigs: U-Boot SPL can be burned into SPI flash and run in flash in machine mode and then load FIT image from SPI flash or MMC device on AE350. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
* riscv: ae350: use the v5l2 driver to configure the cacheRick Chen2019-09-031-0/+9
| | | | | | | | | Find the UCLASS_CACHE driver to configure the cache controller's settings. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flashRick Chen2019-05-091-4/+0
| | | | | | | | | | | | | When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD. Also remove unused code about prior_stage_fdt_address. And modify CONFIG_SYS_FDT_BASE as flash address. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
* riscv: configs: Support AE350 SMP booting from flash flowRick Chen2019-05-091-0/+2
| | | | | | | | | Add two defconfigs to support AE350 SMP booting from flash. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
* riscv: ae350: enable SMPRick Chen2019-04-081-0/+1
| | | | | | | Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
* riscv: configs: Rename ax25-ae350 defconfigRick Chen2018-12-181-3/+2
| | | | | | | | | | | | | | | | Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Also sync MAINTAINERS: Rename a25-ae350_32_defconfig as ae350_rv32_defconfig ax25-ae350_64_defconfig as ae350_rv64_defconfig Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* riscv: ax25: Hide the ax25-specific Kconfig optionBin Meng2018-12-181-0/+4
| | | | | | | | | | There is no need to expose RISCV_NDS to the Kconfig menu as it is an ax25-specific option. Introduce a dedicated Kconfig option for the cache ops of ax25 platform and use that to guard the cache ops. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Rick Chen <rick@andestech.com>
* riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen2018-12-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE to boot from ram which allow the board to override the fdt address originally. But after this patch riscv: save hart ID and device tree passed by prior boot stage It provide prior_stage_fdt_address which offer a temporary memory address to keep the dtb address passing from loader(gdb) to u-boot with a1. So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and can be removed. And it also somehow may corrupted BBL if it was be arranged in CONFIG_SYS_SDRAM_BASE. In board_fdt_blob_setup() When boting from ram: prior_stage_fdt_address will be use to reserved dtb temporarily. When booting from ROM: dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base. Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM) which is provided by HW. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
* Merge git://git.denx.de/u-boot-riscvTom Rini2018-11-261-0/+2
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* riscv: Remove mach typeBin Meng2018-10-031-2/+0
| | | | | | | Since the mach_id is not used by RISC-V, remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
* board: ax25-ae350: Support cfi flashRick Chen2018-05-291-0/+34
| | | | | | | | | | | | | | | | | | | Add smc_init() to get register base from dts and deal with atfsmc020 controler initialzation job. Write protect is enabled by default. So WP shall be disabled when startup, then cfi flash can be detected and erasing and writing can be executed. Adp-ae3xx and adp-ag101p both do smc initilize job in lowlevel_init.S and get register base fron CONFIG_FTSMC020_BASE. They also can be moved those codes to board stage. Remind them as todo jobs. After that CONFIG_FTSMC020_BASE can be removed. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
* board: nx25-ae250: Rename as ax25-ae350Rick Chen2018-05-295-13/+13
| | | | | | | | | | | | Rename nx25 as ax25 ae250 as ae350 nx25-ae250 as ax25-ae350 including filename, variable, string and definition. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-076-15/+6
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* riscv: ae250: Support DT provided by the board at runtimeRick Chen2018-03-301-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_OF_BOAD to support delivery dtb to u-boot at run time instead of embedded. There are two methods to delivery dtb. 1 Pass from loader: When u-boot boot from RAM, gdb or loader can pass dtb via a2 to u-boot dynamically. Of course gdb or loader shall be in charge of dtb delivery. 2 Configure CONFIG_SYS_FDT_BASE: It can be configured as RAM or ROM base statically, no mater u-boot boot from RAM or ROM. If it was configured as ROM base, dtb can be burned into ROM(spi flash) by spi driver. Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is useless in nx25-ae250 configuration. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
* board: Drop ftsdc010 non-dm codeRick Chen2018-03-303-33/+0
| | | | | | | | | Remove board_mmc_init() in adp-ag101p, adp-ae3xx and nx25-ae250 boards. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
* riscv: board: Add nx25-ae250 to support RISC-VRick Chen2018-01-124-0/+115
| | | | | | | | Add nx25-ae250 board to do platform initializations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
* nds32: board: Support ftsdc010 DM.Rick Chen2017-11-301-0/+2
| | | | | | AG101P/AE3XX enable ftsdc010 dm flow. Signed-off-by: Rick Chen <rick@andestech.com>
* nds32: board: Fix andestech adp-ae3xx.c make fail problem.rick2017-09-211-0/+1
| | | | | | Add #include <asm/mach-types.h> to fix it. Signed-off-by: rick <rick@andestech.com>
* nds32: Remove include files from common.hSimon Glass2017-06-051-0/+2
| | | | | | | With a few tweaks we can avoid including these files, which are only needed by two C files. Signed-off-by: Simon Glass <sjg@chromium.org>
* nds32: eth: Support ftmac100 DM.rick2017-05-232-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* nds32: Support AE3XX platform.rick2017-05-225-1/+126
| | | | | | Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
* board_f: Drop setup_dram_config() wrapperSimon Glass2017-04-051-1/+3
| | | | | | | | By making dram_init_banksize() return an error code we can drop the wrapper. Adjust this and clean up all implementations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
* NDS32: Generic Board Support and UnsupportKun-Hua Huang2015-08-289-312/+0
| | | | | | Remove ag101 and ag102 support Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
* NDS32: Generic Board Support and UnsupportKun-Hua Huang2015-08-281-1/+0
| | | | | | Add nds32 ag101p generic board support. Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-133-15/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add board MAINTAINERS filesMasahiro Yamada2014-07-303-0/+18
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-303-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* nds32: convert makefiles to Kbuild styleMasahiro Yamada2013-11-013-60/+3
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Macpaul Lin <macpaul@gmail.com>
* nds32: fix the missing COBJS-y changeken kuo2013-08-091-1/+1
| | | | | | | | | | | | There is a missing in previous commit 951344b778d6ac67b94011d942a5a55da7202027 (nds32: Convert Makefiles to use COBJS-y style) will cause compile error. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com> Cc: Andes <uboot@andestech.com> Signed-off-by: Andes <uboot@andestech.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-256-12/+27
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| * nds32: Convert Makefiles to use COBJS-y styleken kuo2013-07-253-8/+8
| | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * nds32: Enable two banks of SDRAM on Andes boardken kuo2013-07-242-2/+18
| | | | | | | | | | | | | | | | | | The original adp-ag101/adp-ag101p initialize only one bank(64MB) by default at boot time, but it is not enough for some application, so increasing to two banks(128M). Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_initGabor Juhos2013-07-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to improper external function declaration, building U-Boot for the adp-ag102 board shows this warning: adp-ag102.c: In function 'pci_init_board': adp-ag102.c:95: warning: function declaration isn't a prototype Include the 'faraday/ftpci100.h' header which provides the proper declaration and remove the local declaration to get rid of the warning. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-246-99/+6
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* doc: cleanup - move board READMEs into respective board directoriesWolfgang Denk2012-07-291-0/+74
| | | | | | | | | | | | | | | | Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* board/adp-ag102: add board specific filesMacpaul Lin2012-04-222-0/+150
| | | | | | Add board specific files. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* adp-ag101p: Add SoC and board support of ag101pMacpaul Lin2011-11-102-0/+133
| | | | | | Add softcore SoC ag101p and the board adp-ag101p support. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* adp-ag101: add board adp-ag101 supportMacpaul Lin2011-10-222-0/+133
Add evaluation board "adp-ag101" configuration file adp-ag101.h. Add adp-ag101.c board config and related settings. Add board adp-ag101 into boards.cfg Signed-off-by: Macpaul Lin <macpaul@andestech.com>
generated by cgit (git 2.34.1) at 2024-09-29 11:30:54 +0000