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* | x86: edison: Use dwc3-generic driver for Intel EdisonAndy Shevchenko2020-12-162-0/+7
| | | | | | | | | | | | | | | | | | Use generic Synopsys DesignWare 3 driver on Intel Edison. For now it's just a stub which allows future refactoring. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: edison: BINMAN selection is specific to the boardAndy Shevchenko2020-12-161-1/+0
| | | | | | | | | | | | | | | | | | | | The platforms based on Intel Tangier may have different requirements how to create bootloader bundle to supply to a device. Currently the BINMAN approach is for Intel Edison only. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: edison: Add CPU to compatible stringAndy Shevchenko2020-12-161-1/+1
| | | | | | | | | | | | | | | | Like in the rest of x86 boards append CPU to the board compatible string. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: tangier: Find proper memory region for relocationAndy Shevchenko2020-12-161-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that U-Boot works by luck on Intel Edison board because the amount of RAM is less than 1 GB and standard way of calculating the top of it work for this configuration. However, this won't work if the amount of RAM is different and split differently in address space. We have to find the suitable window correctly. Find proper memory region for relocation by scanning MMAP SFI table in board_get_usable_ram_top() callback. According to the address map documentation the Main Memory is guaranteed to lie in the 0..2 GB range, that's why we limit search by this range. Fixes: e71de54a4943 ("x86: Add Intel Tangier support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: zimage: Update cmdline parameter to be an env varSimon Glass2020-12-161-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the updated changes to bootargs substitution[1], the zboot command needs to be updated to get its command line from an environment variable instead of a memory address. This is because the command-line string must be updated to convert %U to ${uuid}, etc. In any case it is more flexible to use a environment variable and it is best to do this before the release to avoid a subsequent change. Update the command accordingly. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | riscv: Complete efi header for RV32/64Leo Yu-Chi Liang2020-12-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch depends on Atish's patch. (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/) Add fields to complete Optional Header "Data Directories" specified in the document. (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format) Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Cc: rick@andestech.com Cc: alankao@andestech.com Cc: atish.patra@wdc.com Cc: xypron.glpk@gmx.de Cc: bmeng.cn@gmail.com Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com>
* | riscv: Fix efi header size for RV32Leo Yu-Chi Liang2020-12-141-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch depends on Atish's patch. (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/) Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification. (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format) Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Cc: rick@andestech.com Cc: alankao@andestech.com Cc: atish.patra@wdc.com Cc: xypron.glpk@gmx.de Cc: bmeng.cn@gmail.com
* | riscv: Fix efi header for RV32Atish Patra2020-12-141-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | RV32 should use PE32 format instead of PE32+ as the efi header format. This requires following changes 1. A different header magic value 2. An additional parameter known as BaseOfData. Currently, it is set to zero in absence of any usage. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
* | riscv: reset after crashHeinrich Schuchardt2020-12-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an exception occurs on ARM or x86, we call panic() which will try to reset the board. Do the same on RISC-V. To avoid -Werror=format-zero-length move a '\n' to the string passed to panic. We don't need a message here as depending on CONFIG_PANIC_HANG we will either see ### ERROR ### Please RESET the board ### or resetting ... as next message. Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | riscv: fix the wrong swap value registerBrad Kim2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | Not s2 register, t1 register is correct Fortunately, it works because t1 register has a garbage value Signed-off-by: Brad Kim <brad.kim@semifive.com> Reviewed-by: Lukas Auer <lukas@auer.io> Reviewed-by: Leo Liang <ycliang@andestech.com>
* | Merge tag 'u-boot-atmel-fixes-2021.01-b' of ↵Tom Rini2020-12-114-14/+26
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel fixes for 2021.01 cycle This set includes very important fixes for: MMC booting on several boards, drive strength on sam9x60ek mmc lines, compile issues for timer.c old driver, removal of unwanted access to sam9x60 bit for oscillator bypass mode, and eeproms read on sama5d2_icp.
| * | ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatibleEugen Hristev2020-12-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The correct compatible for this eeproms is microchip,24aa02e48 The previous compatible string was working up to U-boot 2020.04. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
| * | ARM: mach-at91: fix timer.o compile conditionEugen Hristev2020-11-261-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT91 architecture now has two possible timer blocks, the old PIT timer and the new PIT64B. The timer.c file has an old non DM driver that works for platforms that do not use the ATMEL_PIT_TIMER DM-based driver. Update the Makefile to select this old driver in case neither of the ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected. Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * | ARM: at91: armv7: sama7g5 uses CCF clock driverNicolas Ferre2020-11-262-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older at91 clock.c driver. Remove it from the compilation list and adapt cpu.c arch_cpu_init() to avoid calling at91_clock_init() which is wrong anyway. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| * | ARM: dts: at91: sam9x60: enable slewrate/high drive for sdhci0 pinoutEugen Hristev2020-11-261-6/+12
| | | | | | | | | | | | | | | | | | | | | Align the pin setup for sdhci0 with linux kernel. This means to have slew rate enable and high drive strength. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* | | arm: ls102xa: select USB PHY erratum's only if USB is enabledAleksandar Gerasimovski2020-12-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB support is not by default enabled on all designs, so it does not make seance to have USB specific erratum's enabled on such a designs. On our internal Hitachi-Powergrids design not using the USB controller there is a crash when accessing those specific memory locations selected by the erratum flags. Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNTChris Packham2020-12-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the board isn't strapped to enable USB1 then attempting to access it will result in a hang. Avoid this by allowing boards to define CONFIG_USB_MAX_CONTROLLER_COUNT. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-AAlban Bedel2020-12-101-23/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting from TF-A there is a logic that attempt to detect if the default environment is used, if this is the case it then set the `bootcmd` and `mcinitcmd` depending of the device we booted from. This detection logic is dubious as it access internals of the env implementation and it doesn't always work correctly. First of all it detect any valid environment as not being the default, so after running `env default -a && saveenv` the board doesn't boot anymore as `bootcmd` is then empty. But it also fails in some other ways, for example it always detect a default environment when redundant env is enabled on MMC, so in that case `bootcmd` is overwritten on every boot. Instead of increasing the complexity of the detection just check if `bootcmd` and `mcinitcmd` are set in the environment and set them if they are not. Signed-off-by: Alban Bedel <alban.bedel@aerq.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | layerscape: fdt.c: Check for NULL return value from fdt_getprop()Priyanka Singh2020-12-101-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr() Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> [Fixed checkpatch errors/warnings] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | armv8: lx2162aqds: Add support for LX2162AQDS platformMeenakshi Aggarwal2020-12-1011-5/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add base support for LX2162AQDS board. LX2162AQDS board supports LX2162A family SoCs. This patch add basic support of platform. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: hui.song <hui.song_1@nxp.com> Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Signed-off-by: Vikas Singh <vikas.singh@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | armv8: lx2162a: Add Soc changes to support LX2162AMeenakshi Aggarwal2020-12-1014-34/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Fixed whitespace errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls1028a: add label to pcie nodes in dtsWasim Khan2020-12-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls1043a: add label to pcie nodes in dtsWasim Khan2020-12-101-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls1012a: add label to pcie nodes in dtsWasim Khan2020-12-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls1088a: add label to pcie nodes in dtsWasim Khan2020-12-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls2080a: add label to pcie nodes in dtsWasim Khan2020-12-101-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: ls1046a: add label to pcie nodes in dtsWasim Khan2020-12-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: dts: lx2160a: add label to pcie nodes in dtsWasim Khan2020-12-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | Merge tag 'u-boot-stm32-20201209' of ↵Tom Rini2020-12-0911-12/+35
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board - Update ARM STI and ARM STM STM32MP Arch maintainers emails - Enable internal pull-ups for SDMMC1 on DHCOM SoM
| * | | ARM: dts: stm32: Add USB OTG ID pin on DH AV96Marek Vasut2020-12-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB OTG ID pin mux and switch the USB OTG port from peripheral to OTG mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Enable SDMMC3 on DH DRC02Marek Vasut2020-12-091-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DH DRC02 board has an on-board microSD slot, add DT properties to enable the slot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Disable SDMMC1 CKIN feedback clockMarek Vasut2020-12-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit operation of the same U-Boot image on both SoM with and without voltage level shifter. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoMMarek Vasut2020-12-091-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default state of SD bus and clock line is logical HI. SD card IO is open-drain and pulls the bus lines LO. Always enable the SD bus pull ups to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus voltage level shifter, the pull ups are built into the level shifter, however that has no negative impact. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | treewide: Update email address Patrick Delaunay and Patrice ChotardPatrice Chotard2020-12-098-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini2020-12-0839-1227/+661
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| * | | imx8: allow overriding memory layoutMarcel Ziswiler2020-12-062-29/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce weak function board_mem_get_layout() which allows overriding the memory layout from board code in runtime, useful for handling different SKU versions. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | board: toradex: add apalis-imx8x 2gb wb it v1.1a module supportIgor Opaniuk2020-12-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds initial support for the Toradex Apalis iMX8X 2GB WB IT V1.1A System on Module support [1]. Boot log: U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300) CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial@5a070000 Out: serial@5a070000 Err: serial@5a070000 Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A, Serial# 06617018 Net: eth0: ethernet@5b040000 [PRIME] Hit any key to stop autoboot: 0 Functionality wise the following is known to be working: - eMMC and MMC/SD card - Ethernet (*) - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QXP as of yet. * With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1) ETH PHY encounters bring up problems after reset, this will be fixed soon on SCU FW side. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | ARM: dts: fsl-imx8qxp-apalis: add initial device treeIgor Opaniuk2020-12-063-0/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce initial hierarchy of device trees for Apalis iMX8X System on Module. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | imx8m: fix cache setup for dynamic sdram sizeTim Harvey2020-12-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the mem_map structure containing the size of SDRAM is used in various cache functions in cache_v8.c thus we need to update it with the sdram size the board is configured with as well. Without this the cache functions do not get setup properly and can hang in the case where a board reports more SDRAM than defined in PHYS_SDRAM_SIZE. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | | ARM: dts: imx8mm-verdin: follow changed pmicMax Krummenacher2020-12-062-79/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A. Adjust the device tree accordingly. Remove the old ADC node as the ADC has been changed and has no longer a separate power rail. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | board: ge: reduce VPD EEPROM partition sizeIan Ray2020-12-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce vital product data size to match the latest specification. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | imx: ahab: fix implicit declaration warningOliver Graute2020-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning: arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration] flush_dcache_range(s, e); ^~~~~~~~~~~~~~~~~~ Include cpu_func.h header which declares the flush_dcache_range() function. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | imx: ahab: fix compiler warnings in debugOliver Graute2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’: arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=] debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n", Fix those by using "%lu" specified. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | imx: ahab: Fix compiler warnings in printfOliver Graute2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long long unsigned int}’ [-Wformat=] Fix those by using %llx Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | arm: dts: aristainetos: sync with changes in linuxHeiko Schocher2020-12-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sync with comaptible changes in linux from Krzysztof Kozlowski. https://patchwork.kernel.org/project/linux-arm-kernel/patch/20200930190143.27032-12-krzk@kernel.org/ Signed-off-by: Heiko Schocher <hs@denx.de>
| * | | imx6: add support for aristainetos2c_cslb board variantHeiko Schocher2020-12-066-0/+356
| | | | | | | | | | | | | | | | | | | | | | | | add support for aristainetos2c_cslb board variant. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | | imx6: remove not longer supported aristainetos boardsHeiko Schocher2020-12-0627-1429/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed aristainetos2, 2b, 2b-csl. This boards have been recalled and destroyed. Adapt board code to remove stuff not needed anymore. Fix checkpatch warning, remove fdt_high and initrd_high from default environment. Signed-off-by: Heiko Schocher <hs@denx.de> zu remove
* | | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-12-076-222/+188
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Espressobin: Simplify DT handling of board variants (Pali) - Add Luka Perkov to maintainers of Puzzle-M801 (Luka) - Armada 38x: Enable board specific USB2 high-speed impedance threshold configuration (Joshua)
| * | | | arm: mvebu: Espressobin: Add support for emmc into dts filePali Rohár2020-12-071-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To simplify setup, configuration and compilation of u-boot, define emmc node for all Espressobin boards. Espressobin boards without populated emmc works correctly, just detection and initialization of emmc obviously fails. Code for emmc is extracted from commit f1a43c84a960 ("arm64: dts: a3720: add support for espressobin with populated emmc"). Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Gérald Kerma <gerald@gk2.net>
| * | | | Revert "arm64: dts: a3720: add support for espressobin with populated emmc"Pali Rohár2020-12-072-45/+0
| | | | | | | | | | | | | | | | | | | | This reverts commit f1a43c84a960265309fa8365759de271a70c5a7e.
generated by cgit (git 2.34.1) at 2025-10-02 08:55:15 +0000