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| * | | dm: Switch over to use new sequence number for dev_seq()Simon Glass2020-12-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this function to use the new sequence number and fix up the test that deals with this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Drop unnecessary mp_init logicSimon Glass2020-12-183-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that sequence numbers are set up when devices are bound, this code is not needed. Also, we should use dev_seq() instead of req_seq. Update the whole file accordingly. Also fix up APL cpu while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: Avoid accessing seq directlySimon Glass2020-12-183-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | linker_lists: Fix alignment issueSimon Glass2020-12-181-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker script uses alphabetic sorting to group the different linker lists together. Each group has its own struct and potentially its own alignment. But when the linker packs the structs together it cannot ensure that a linker list starts on the expected alignment boundary. For example, if the first list has a struct size of 8 and we place 3 of them in the image, that means that the next struct will start at offset 0x18 from the start of the linker_list section. If the next struct has a size of 16 then it will start at an 8-byte aligned offset, but not a 16-byte aligned offset. With sandbox on x86_64, a reference to a linker list item using ll_entry_get() can force alignment of that particular linker_list item, if it is in the same file as the linker_list item is declared. Consider this example, where struct driver is 0x80 bytes: ll_entry_declare(struct driver, fred, driver) ... void *p = ll_entry_get(struct driver, fred, driver) If these two lines of code are in the same file, then the entry is forced to be aligned at the 'struct driver' alignment, which is 16 bytes. If the second line of code is in a different file, then no action is taken, since the compiler cannot update the alignment of the linker_list item. In the first case, an 8-byte 'fill' region is added: .u_boot_list_2_driver_2_testbus_drv 0x0000000000270018 0x80 test/built-in.o 0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv .u_boot_list_2_driver_2_testfdt1_drv 0x0000000000270098 0x80 test/built-in.o 0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv *fill* 0x0000000000270118 0x8 .u_boot_list_2_driver_2_testfdt_drv 0x0000000000270120 0x80 test/built-in.o 0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv .u_boot_list_2_driver_2_testprobe_drv 0x00000000002701a0 0x80 test/built-in.o 0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv With this, the linker_list no-longer works since items after testfdt1_drv are not at the expected address. Ideally we would have a way to tell gcc not to align structs in this way. It is not clear how we could do this, and in any case it would require us to adjust every struct used by the linker_list feature. One possible fix is to force each separate linker_list to start on the largest possible boundary that can be required by the compiler. However that does not seem to work on x86_64, which uses 16-byte alignment in this case but needs 32-byte alignment. So add a Kconfig option to handle this. Set the default value to 4 so as to avoid changing platforms that don't need it. Update the ll_entry_start() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-1342-105/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Update 'auto' declarations to be on one lineSimon Glass2020-12-131-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix up the code style for those declarations that should now fit onto one line, which is all of them that currently do not. This is needed for dtoc to detect the structs correctly, at present. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-1312-27/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-137-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-1322-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1320-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: Remove uses of device_bind_offset()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: Rename device_bind() to device_bind_offset()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | test: unit test for exception commandHeinrich Schuchardt2020-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test that an exception SIGILL is answered by a reset on the sandbox if CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: add handler for exceptionsHeinrich Schuchardt2020-12-134-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a handler for SIGILL, SIGBUS, SIGSEGV. When an exception occurs print the program counter and the loaded UEFI binaries and reset the system if CONFIG_SANDBOX_CRASH_RESET=y or exit to the OS otherwise. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | bootm: Support string substitution in bootargsSimon Glass2020-12-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases it is necessary to pass parameters to Linux so that it will boot correctly. For example, the rootdev parameter is often used to specify the root device. However the root device may change depending on whence U-Boot loads the kernel. At present it is necessary to build up the command line by adding device strings to it one by one. It is often more convenient to provide a template for bootargs, with U-Boot doing the substitution from other environment variables. Add a way to substitute strings in the bootargs variable. This allows things like "rootdev=${rootdev}" to be used in bootargs, with the ${rootdev} substitution providing the UUID of the root device. For example, to substitute the GUID of the kernel partition: setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1 kern_guid=${uuid}" part uuid mmc 2:2 uuid bootm This is particularly useful when the command line from another place. For example, Chrome OS stores the command line next to the kernel itself. It depends on the kernel version being used as well as the hardware features, so it is extremely difficult to devise a U-Boot script that works on all boards and kernel versions. With this feature, the command line can be read from disk and used directly, with a few substitutions set up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: zimage: Add silent-console processingSimon Glass2020-12-041-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present zimage does its own command-line processing and does not support the 'silent console' feature. There doesn't seem to be any good reason for this. Add support for silent console to zimage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | bootm: Add tests for fixup_silent_linux()Simon Glass2020-12-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function currently has no tests. Export it so that we can implement a simple test on sandbox. Use IS_ENABLED() to remove the unused code, instead #ifdef. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | board: sl28: add OP-TEE Trusted OS support (bl32)Michael Walle2020-12-041-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | Add support to load the OP-TEE Trusted OS by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
| * | | board: sl28: add ATF support (bl31)Michael Walle2020-12-041-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to load the bl31 part of the ARM Trusted Firmware by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
| * | | board: sl28: remove u-boot from loadable DT nodeMichael Walle2020-12-041-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | It is not needed. Remove it. Signed-off-by: Michael Walle <michael@walle.cc>
| * | | armv8: layerscape: don't initialize GIC in SPLMichael Walle2020-12-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BL31 expects the GIC to be uninitialized. Thus, if we are loading the BL31 by the SPL we must not initialize it. If u-boot is loaded by the SPL directly, it will initialize the GIC again (in the same lowlevel_init()). This was tested on a custom board with SPL loading the BL31 and jumping to u-boot as BL33 as well as loading u-boot directly by the SPL. In case the ATF BL1/BL2 is used, this patch won't change anything, because no SPL is used at all. Signed-off-by: Michael Walle <michael@walle.cc>
| * | | treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORTMichael Walle2020-12-045-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT. Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Michal Simek <michal.simek@xilinx.com>
| * | | IPQ40xx: clk: add USB clock handlingRobert Marko2020-12-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown. This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL. So to fix that lets add all of the USB clocks to the driver. Fixes: 430e1dcf ("IPQ40xx: Add USB nodes") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | | IPQ40xx: clk: dont always return 0Robert Marko2020-12-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the driver will go through the clock ID-s and set/enable them as needed. But if the ID is unknown it will fall through the switch case to the default case which will always return 0. This is not correct and default cases should return a error code since clock ID is unknown. So lets return -EINVAL instead. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | | IPQ40xx: clk: drop breaks in switch caseRobert Marko2020-12-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point in having break statements in the switch case as there is already a return before break. So lets drop them from the driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | | IPQ40xx: clk: use dev_read_addr()Robert Marko2020-12-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr(). While we are here, lets also alphabetise the includes. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | | | rockchip: pinebook-pro: default to SPI bus 1 for SPI-flashHugh Cole-Baker2021-01-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Suggested-by: Simon Glass <sjg@chromium.org> Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
* | | | ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02Marek Vasut2021-01-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0. Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the correctness of the DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | | ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITXMarek Vasut2021-01-061-1/+1
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0. Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and using output-low DT property leads to the GPIO being set high instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | Merge tag 'u-boot-imx-20201227' of ↵Tom Rini2020-12-2816-55/+234
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2021.1 ---------------- CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680 - fixes for Variscite dart6ul - imx8mp : increase malloc area - fixes for bx50v3 - imx8m: HS400ES and UHS for EVK - imx8qm-rom7720: fix phy bind
| * | | imx: mx7: clock: use correct format stringsHeinrich Schuchardt2020-12-261-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use %u and not %d for unsigned values. Print kHz and not khz. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | | arm: dart6ul: read and print SoM info from eeprom on startupMarc Ferland2020-12-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dart6ul has an i2c eeprom at 0x50 which contains, among other things, the manufacturing/revision/options info of the SoM. This patch replaces the current checkboard() implementation with a more exhaustive one based on the content of the eeprom. Since this code uses the new driver model, some changes were also required in the DTS to make the nodes related to i2c available before relocation. This code was inspired from the supported u-boot code from Variscite which can be found here: https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02 New output example: Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17 Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G Signed-off-by: Marc Ferland <ferlandm@amotus.ca> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * | | arm: dart6ul: change compatible string for eepromMarc Ferland2020-12-261-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a 4Kbit (512x8) capacity, change the compatible string to reflect this fact. Also, add an alias to easily refer to this eeprom with fdt_path_offset() which will be in another commit. Signed-off-by: Marc Ferland <ferlandm@amotus.ca> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * | | imx: ahab: allow to bypass confirmation for ahab_close cmdClément Péron2020-12-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling ahab_close cmd force the user to interact for confirmation. This is not user-friendly when using this cmd during factory process. Allow the user to pass '-y' option to bypass this confirmation. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
| * | | board: ge: bx50v3: cleanup phy configSebastian Reichel2020-12-261-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current PHY rework does the following things: 1. Configure 125MHz clock 2. Setup the TX clock delay (RX is enabled by default), 3. Setup reserved bits to avoid voltage peak The clock delays are nowadays already configured by the PHY driver (in ar803x_delay_config). The code for that can simply be dropped. The clock speed can also be configured by the PHY driver by adding the device tree property "qca,clk-out-frequency". What is left is setting up the undocumented reserved bits to avoid the voltage peak problem. I slightly improved its documentation while updating the board's PHY rework code. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | ARM: dts: imx8m: add UHS or HS400/HS400ES propertiesAndrey Zhizhikin2020-12-266-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them. Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com>
| * | | ARM: dts: imx8m: increase off-on delay on the SD Vcc regulatorAndrey Zhizhikin2020-12-266-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration. Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly. Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | arm64: dts: imx8mm-beacon: Re-sync dts file with Linux 5.10-rc6Adam Ford2020-12-262-19/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been some updates to the device trees, so re-sync. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
| * | | arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6Adam Ford2020-12-261-20/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been some updates to the device tree since 5.6. This also includes some clocks, and makes it easier to keep board device tree files in sync with Linux Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
| * | | ARM: dts: imx: imx8qm-rom7720: Fix AR8031 phy-modeOliver Graute2020-12-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed wrong PHY Interface Mode As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode) the correct phy-mode should be "rgmii-id", so fix it accordingly to fix the Ethernet regression. This problem has been exposed by commit: commit 13114f38e2ccea9386726d8b9831dfc310589548 Fix the phy-mode accordingly to fix the regression. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
* | | | arm: mvebu: armada-xp-gp.dts: Add spi0 aliasStefan Roese2020-12-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For correct spi bus detection the spi0 alias is needed in the DT. Otherwise this error will ocurr in U-Boot: Invalid bus 0 (err=-19) Failed to initialize SPI flash at 0:0 (error -19) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dennis Gilmore <dgilmore@redhat.com> Tested-by: Dennis Gilmore <dgilmore@redhat.com>
* | | | arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot propertiesStefan Roese2020-12-281-0/+19
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI controller and SPI NOR flash node to enable usage in SPL. Otherwise these devices will not be available. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dennis Gilmore <dgilmore@redhat.com> Tested-by: Dennis Gilmore <dgilmore@redhat.com>
* | / fsp: Move and rename fsp_types.h fileSughosh Ganu2020-12-222-63/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | board: kontron: sl28: reorder mmc devicesMichael Walle2020-12-201-2/+2
| | | | | | | | | | | | | | | | | | Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64: dts: ls1028a: make the eMMC and SD card controllers use fixed indices") mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to avoid any confusion by the user and to be aligned with linux. Signed-off-by: Michael Walle <michael@walle.cc>
* | Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini2020-12-1810-20/+79
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| * | riscv: Add device tree bindings for SPISean Anderson2020-12-182-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix Bit. Signed-off-by: Sean Anderson <seanga2@gmail.com> Acked-by: Rick Chen <rick@andestech.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: dw: Add SoC-specific compatible stringsSean Anderson2020-12-189-17/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds SoC-specific compatible strings to all users of the designware spi device. This will allow for the correct driver to be selected for each device. Where it is publicly documented, a compatible string for the specific device version has also been added. Devices without publicly-documented device versions include MSCC SoCs, and Arc Socs. All compatible strings except those for SoCFPGAs and some of the versioned strings have been taken from Linux. Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly necessary. However, it is a good cleanup and brings things closer to Linux. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: dw: Rename "cs-gpio" to "cs-gpios"Sean Anderson2020-12-182-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This property is named differently than other SPI drivers with the same property, as well as the property as used in Linux. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | | ARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4Marek Szyprowski2020-12-181-0/+4
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN pin to the high impedance mode, otherwise the board is stuck in the middle of loading early stages of the bootloader from SD card. This can be achieved by using the OPEN_DRAIN flag instead if the ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin has the pull-up) and solve the issue. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | x86: edison: Switch to DM_USB_GADGETAndy Shevchenko2020-12-162-4/+8
| | | | | | | | | | | | | | | | | | | | | | DM is the modern default approach for the drivers in U-Boot. It also allows to configure code via Device Tree. Move Intel Edison to use DM_USB_GADGET and drop hard coded values. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit (git 2.34.1) at 2025-10-02 05:48:29 +0000