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* | | | sunxi: dram: h6: Improve DDR3 config detectionJernej Skrabec2021-01-111-44/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that in rare cases, current analytical approach to detect correct DRAM bus width and rank on H6 doesn't work. On some TV boxes with DDR3, incorrect DRAM configuration triggers write leveling error which immediately stops initialization process. Exact reason why this error appears isn't known. However, if correct configuration is used, initalization works without problem. In order to fix this issue, simply try another configuration when any kind of error appears during initialization, not just those related to rank and bus width. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Tested-by: Thomas Graichen <thomas.graichen@googlemail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | | sunxi: board: Move USB ethernet initialization to board_late_init()Andy Shevchenko2021-01-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the sake of consistency (*) and order of initialization, i.e. after we have got the ethernet address, interrupt and timer initialized, try to initialize USB ethernet gadget. *) for example, zynqmp uses same order. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | | sunxi: Add arm64 FEL supportAndre Przywara2021-01-113-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far we did not support the BootROM based FEL USB debug mode on the 64-bit builds for Allwinner SoCs: The BootROM is using AArch32, but the SPL runs in AArch64. Returning back to AArch32 was not working as expected, since the RMR reset into 32-bit mode always starts execution in the BootROM, but not in the FEL routine. After some debug and research and with help via IRC, the CPU hotplug mechanism emerged as a solution: If a certain R_CPUCFG register contains some magic, the BootROM will immediately branch to an address stored in some other register. This works well for our purposes. Enable the FEL feature by providing early AArch32 code to first save the FEL state, *before* initially entering AArch64. If we eventually determine that we should return to FEL, we reset back into AArch32, and use the CPU hotplug mechanism to run some small AArch32 code snippet that restores the initially saved FEL state. That allows the normal AArch64 SPL build to be loaded via the sunxi-fel tool, with it returning into FEL mode, so that other payloads can be transferred via FEL as well. Tested on A64, H5 and H6. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> (on Olimex A64-Olinuxino)
* | | | sunxi: Fix is_boot0_magic macroAndre Przywara2021-01-111-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The is_boot0_magic macro is missing parentheses around the macro argument, breaking any usage with a more complex argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | | sunxi: Factor out eGON BROM header descriptionAndre Przywara2021-01-111-64/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be able to easily share the Allwinner eGON BROM header structure between the tools and the SPL code, move the struct definition into a separate header file. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org>
* | | | sunxi: add PineCube boardIcenowy Zheng2021-01-111-0/+1
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PineCube is an IP camera development kit released by Pine64. It comes with the following compoents: - A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC, a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps Ethernet port and FPC connectors for camera and daughter board. - An OV5640-based camera module which is connected to the parallel CSI bus of the mainboard. - A daughterboard with several buttons, a SD slot, some IR LEDs, a microphone and a speaker connector. As the device tree is synchronized in a previous commit, just add it to Makefile, create a new MAINTAINER item and provide a defconfig. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | Merge branch 'next'Tom Rini2021-01-11148-457/+902
|\ \ \ | |_|/ |/| | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
| * | Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini2021-01-063-33/+75
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
| | * | arm64: zynqmp: Add Ethernet node for zcu1285 revAHarini Katakam2021-01-051-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add ethernet node gem1 to zcu1285 RevB. GMII to RGMII converter sits between MAC and external phy connected over GMII to MAC and RGMMI to external phy Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Add ethernet node for zcu1275 revBSiva Durga Prasad Paladugu2021-01-051-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add ethernet node gem1 to zcu1275 RevB. GMII to RGMII converter sits between MAC and external phy connected over GMII to MAC and RGMMI to external phy. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Sync DT with Linux kernelMichal Simek2021-01-041-33/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All changes are recorded in lore.kernel.org. Here are links to that patches for the record. Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/20200629081744.13916-1-krzk@kernel.org And there are other minor changes (just moving things around). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini2021-01-0582-215/+372
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| | * | | dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass2021-01-0529-41/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass2021-01-059-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | dm: core: Access device ofnode through functionsSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: Drop rtc from SPLSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC is not currently used in SPL. Drop it so that it does not take up space. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: coral: Remove unwanted nodes from SPL/TPLSimon Glass2021-01-051-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices are not needed in SPL/TPL. For TPL this causes the generation of unnecessary of-platadata structs. Make some adjustments to fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: apl: Adjust how the UART gets its platform dataSimon Glass2021-01-052-20/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this driver calls malloc() to start a new platform data structure, fills it in and tells driver model to use it. We want to avoid malloc, particularly with the new version of of-platdata. Create a new struct which encompasses both the dtd struct and the ns16550 one, to avoid this. Unfortunately we must copy the data into the right place for the ns16550 driver. Add some comments about this. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: sysreset: Move priv/plat structs to headersSimon Glass2021-01-051-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them and add the dtd struct too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | x86: apl: Use struct spi_nor instead of struct spi_flashSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This construct effectively uses struct spi_nor due to a #define in spi-nor.h so we may as well use that struct here. This allows dtoc to parse it correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: Move priv/plat structs for intel_common to headersSimon Glass2021-01-054-27/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: apl: Move priv/plat structs to headersSimon Glass2021-01-055-26/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | sandbox: Update dts files to reduce SPL sizeSimon Glass2021-01-052-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present there are require a few devices in the devicetree which are not actually used in SPL. This will cause problems with the new of-platdata, since it will try to instantiate devices which are not compiled into U-Boot. Update the devicetree to remove these devices from SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | sandbox: i2c: Move priv into a header fileSimon Glass2021-01-051-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | sandbox: serial: Move priv into a header fileSimon Glass2021-01-051-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | sandbox: remove ram buffer file when U-Boot is loaded by SPLPatrick Delaunay2021-01-053-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update management of "--rm_memory" sandbox's option and force this option when U-Boot is loaded by SPL in os_spl_to_uboot() and remove the ram file after reading in main() as described in option help message: "Remove memory file after reading". This patch avoids that the file "/tmp/u-boot.mem.XXXXXX" [created in os_jump_to_file() when U-Boot is loaded by SPL] is never deleted because state_uninit() is not called after U-Boot execution (CtrlC or with running pytest for example). This issue is reproduced by > build-sandbox_spl/spl/u-boot-spl and CtrlC in U-Bot console > make qcheck One temp file is created after each SPL and U-Boot execution (7 tims in qcheck after test_handoff.py, test_ofplatdata.py, test_spl.py execution). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | | x86: Fix header guard in asm/pmu.hSimon Glass2021-01-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has the wrong name. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: tpl: Remove unwanted devicetree stringSimon Glass2021-01-051-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to use of_match_ptr(). This reduces the TPL binary size by about 32 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: apl: Reduce size for TPLSimon Glass2021-01-058-11/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update various drivers to use of_match_ptr() and to avoid including debug strings in TPL. Omit the WiFi driver entirely, since it is not used in TPL. This reduces the TPL binary size by about 608 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: apl: Update hostbridge to remove unwanted TPL codeSimon Glass2021-01-051-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present several strings from this file appear in the TPL binary. Add preprocessor checks to drop them. This reduces the TPL binary size by about 128 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: coral: Move fsp-m settings to a subnodeSimon Glass2021-01-052-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present these settings are in the node for host-bridge and so are visible in TPL as well as SPL. But they are only used for SPL. Move them to a subnode so that TPL does not included them. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: Move call64 into its own sectionSimon Glass2021-01-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When this code is not used (e.g. by TPL) we want it to be excluded from the image. Put it in its own section so that this happens. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | x86: apl: Use const for driver operationsSimon Glass2021-01-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update these declarations to const to ensure that the data ends up in the rodata section. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | arc: m68k: nds32: nios2: sh: xtensa: Add empty spl.h headerSimon Glass2021-01-056-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present it is not possible to include spl.h in on these architectures since the asm/spl.h file is not present. We want to be able to use the spl_phase() function, so add empty headers to make things build. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | dm: Use access methods for dev/uclass private dataSimon Glass2021-01-054-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
| | * | | x86: apl: Drop support for !OF_PLATDATA_PARENTSimon Glass2021-01-052-28/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code was kept around after of-platdata started supporting parent devices. That feature seems stable now, so let's drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | spl: Drop bd_info in the data sectionSimon Glass2021-01-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uses up space in the SPL binary but it always starts as zero. Also some boards cannot support data in TPL (e.g. Intel Apollo Lake). Use malloc() to allocate this structure instead, by moving the init a little later, after malloc() is inited. Make this function optional since it pulls in malloc(). This reduces the TPL binary size on coral by about 64 bytes Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | sandbox: Drop unnecessary test nodeSimon Glass2021-01-051-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spl-test4 node deliberately has an invalid compatible string. This causes a warning from dtoc and the check it does is not really necessary. Drop it, to avoid the warning and associated confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | | serial: Rename ns16550 functions to lower caseSimon Glass2021-01-053-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lower case should be used for function names. Update this driver and its callers accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | serial: Update NS16550_t and struct NS16550Simon Glass2021-01-055-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Typedefs should not be used in U-Boot and structs should be lower case. Update the code to use struct ns16550 consistently. Put a header guard on the file while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | | Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-05135-1913/+2012
| |\ \ \ \ | | |/ / / | |/| / / | | |/ / | | | | | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | fsp: Move and rename fsp_types.h fileSughosh Ganu2020-12-312-63/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | qemu: arm: Initialise virtio devices in board_late_initSughosh Ganu2020-12-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the qemu arm platform, the virtio devices are initialised in the board_init function, which gets called before the initr_pci. With this sequence, the virtio block devices on the pci bus are not initialised. Move the initialisation of the virtio devices to board_late_init which gets called after the call to initr_pci. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
| * | | test: spi: Add sandbox_spi_get_{speed, mode} interfaceOvidiu Panait2020-12-221-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce sandbox_spi_get_{speed, mode} public interface to retrieve the sandbox spi bus internal state. They are meant to be used in sandbox spi testcases. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: test: Add a second SPI slave on sandbox_spi busOvidiu Panait2020-12-221-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Place a second spi slave on the sandbox_spi bus, to be used by the spi_claim_bus() testcase we are about to introduce. We need to make sure that jumping between slaves calling spi_claim_bus() sets the bus speed and mode appropriately. Use different max-hz and mode properties for this new slave. Also, update sandbox_spi cs_info call to allow activity on CS0/CS1 and adapt dm_test_spi_find() testcase for this new setup. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: spi: Drop unused sandbox_spi_parse_spec functionOvidiu Panait2020-12-221-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1289e96797bf ("sandbox: spi: Drop command-line SPI option") dropped support for specifying SPI devices on the command line, removing the only user of sandbox_spi_parse_spec(). Remove the function too. Fixes: 1289e96797bf ("sandbox: spi: Drop command-line SPI option") Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: implement invalidate_icache_all()Heinrich Schuchardt2020-12-222-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before executing code that we have loaded from a file we need to flush the data cache and invalidate the instruction flash. Implement functions flush_cache() and invalidate_icache_all(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: implement runtime system resetHeinrich Schuchardt2020-12-221-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a reset function that we can call after ExitBootServices(), when all driver model devices are gone. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | dm: Drop the unused arg in uclass_find_device_by_seq()Simon Glass2020-12-183-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that there is only one sequence number (rather than both requested and assigned ones) we can simplify this function. Also update its caller to simplify the logic. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: test: Add a test for DM_UC_FLAG_NO_AUTO_SEQSimon Glass2020-12-181-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Check that this flag operates as expected. This patch is not earlier in this series since is uses the new behaviour of dev_seq(). Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-10-01 16:31:02 +0000