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| * | | x86: Move coreboot timestamp info into coreboot_tables.hSimon Glass2021-03-273-36/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Make coreboot sysinfo available to any x86 boardSimon Glass2021-03-275-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | cbfs: Allow access to CBFS without a headerSimon Glass2021-03-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: coral: Update the SD card-detect GPIOSimon Glass2021-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the recent bug fix, it doesn't matter which GPIO phandle is used so long as the GPIO number is right. Still, we may as well use the correct one to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | x86: coral: Put the eMMC firstSimon Glass2021-03-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the eMMC device does not have an alias so it appears after the SD card which is device 1. There is no device 0 which is odd. Make the eMMC device be the first one. Update the boot script to use the new device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | sandbox: dtsi: add rngVincent Stehlé2021-03-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having an rng in the sandbox is useful not only for tests but also for e.g. UEFI. Therefore, copy the rng node from test.dts to sandbox.dtsi. In the case of UEFI, it can then be verified with `efidebug dh' that a "Random Number Generator" protocol is indeed present. This also fixes the following `bootefi' error: Missing RNG device for EFI_RNG_PROTOCOL Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Simon Glass <sjg@chromium.org>
| * | | x86: dts: Drop unused CONFIG_SPLSimon Glass2021-03-261-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This cannot be used since the previous #elif has already dealt with SPL. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Make use of binman expanded entriesSimon Glass2021-03-261-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to spell out the separate pieces of U-Boot phase binaries anymore. Revert to using the simple entry and let binman do the expansion itself as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: apl: Use read-only SPL and new of-platdataSimon Glass2021-03-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With Apollo Lake, SPL is placed in read-only memory. Set this new option so that OF_PLATDATA_INST can be used. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: coral: Drop TPM and ACPI interrupts from TPLSimon Glass2021-03-261-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These devices are not actually built in TPL but are currently active in the TPL devicetree. For of-platdata-inst this means that we will try to generate devices for them, which fails. Update them to be active only in U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Don't include reset driver in SPLSimon Glass2021-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't normally need this driver in TPL/SPL, so drop it for now. It can be enabled by individual boards if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Support a fake PCI device with of-platdata-instSimon Glass2021-03-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With TPL we don't need full PCI support and it adds to code size. Instead, a simple_bus driver is good enough to be able to read and write the PCI config and do a little basic setup. So at present there are two drivers in U-Boot called pci_x86. One is in UCLASS_PCI, used in SPL and U-Boot proper. The other is in UCLASS_SIMPLE_BUS and used only in TPL. Add a tag to tell dtoc about this, so it knows which one to use when generating the devices and uclasses. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: itss: Tidy up bind() for of-platdata-instSimon Glass2021-03-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the standard of-platdata we must fix up driver_data manually. With of-platadata-inst this is not necessary, since it is added to the device by dtoc. Update the code to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: apl: Tell of-platdata about a required header fileSimon Glass2021-03-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enum is needed to generate build-time devices. Tell dtoc where to find the header, to avoid compile errors in the generated code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: apl: Fix the header order in pmcSimon Glass2021-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dm.h header should come first. In fact it needs to, since otherwise the driver model definitions are not available to dt-structs.h Fix this, since it causes problems with OF_PLATDATA_INST. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Define a region for device priv/plat dataSimon Glass2021-03-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Collect this together in one place, so driver model can access set it up in a new place if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Define a region for device priv/plat dataSimon Glass2021-03-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Collect this together in one place, so driver model can access set it up in a new place if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Revert "sandbox: Disable I2C emulators in SPL"Simon Glass2021-03-261-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent changes this can be supported again. Add it back. This reverts commit d85f2c4f2970d0ec2f5f075de734afd11200d153. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: i2c: Move platdata structs to header filesSimon Glass2021-03-262-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the structs used by these drivers are declared in the C files and so are not accessible to dtoc. Move them to header files, as required. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | clk: sandbox: Create a special fixed-rate driverSimon Glass2021-03-262-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a version of this driver for sandbox so that it can use the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | clk: sandbox: Move priv/plat data to a header fileSimon Glass2021-03-261-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the structs used by this driver are not accessible outside it, so cannot be used with OF_PLATDATA_INST. Move them to a header file to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Drop debug message in os_spl_to_uboot()Simon Glass2021-03-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is not needed in normal operation. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | sandbox: i2c: Rename driver names to work with of-platdataSimon Glass2021-03-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of these do not follow the rules. Make sure the driver name matches the compatible string in all cases. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Make sandbox,emul more conventionalSimon Glass2021-03-221-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this property is a phandle but does not have a #xxx-cells property to match it. Add one so that is works the same as gpio and clock phandles. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: enable cros-ec-keyb in test.dtbHeinrich Schuchardt2021-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently keyboard input fails in the GUI window opened by ./u-boot -T -l Add the missing include to test.dts. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | board: mt7629: enable compression of u-boot to reduce the size of final imageWeijie Gao2021-03-202-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes use of the decompression mechanism implemented for mt7628 previously to reduce the total image size. Binman will be also removed. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | dts: mt7629: enable JTAG pins by defaultWeijie Gao2021-03-202-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely used. These LED pins on reference boards are used as JTAG socket. So it's a good idea to change the default state to JTAG, and this will make it convenience for debugging. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | board: Add MT8183 pumpkin board supportFabien Parent2021-03-203-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | Add the MT8183 pumpkin board support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
| * | | ARM: mediatek: Add MT8183 supportFabien Parent2021-03-205-0/+367
| | | | | | | | | | | | | | | | | | | | | | | | Add the MT8183 SoC support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
| * | | board: mediatek: rename pumpkin board into mt8516Fabien Parent2021-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More than one pumpkin board has been made with different MediaTek SoCs. Rename the pumpkin board to follow the naming convention of all other MediaTek boards and also to not be confusing when other pumpkin boards will be added in follow-up commits. Signed-off-by: Fabien Parent <fparent@baylibre.com>
| * | | board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar2021-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | | arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-167-0/+625
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | | pinctrl: renesas: Add support for R8A774C0Lad Prabhakar2021-03-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | | arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11Lad Prabhakar2021-03-161-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | | arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das2021-03-164-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | | arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das2021-03-164-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | | arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das2021-03-162-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | | arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11Biju Das2021-03-162-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize r8a774e1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | | arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11Biju Das2021-03-162-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize r8a774b1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | | Merge tag 'v2021.04-rc4' into nextTom Rini2021-03-1573-199/+6191
| |\ \ \ | | | | | | | | | | | | | | | Prepare v2021.04-rc4
| * | | | sandbox: imply SCP03 and CMD_SCP03Igor Opaniuk2021-03-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable by default SCP_03/CMD_SCP03 for sandbox target. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sandbox: Update os_find_u_boot() to find the .img fileSimon Glass2021-03-122-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this function can only locate the u-boot ELF file. For SPL it is handy to be able to locate u-boot.img since this is what would normally be loaded by SPL. Add another argument to allow this to be selected. While we are here, update the function to load SPL when running in TPL, since that is the next stage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test: Allow SPL to run any available testSimon Glass2021-03-121-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present SPL only runs driver model tests. Update it to run all available tests, i.e. in any test suite. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test: Rename test-main.c to test-dm.cSimon Glass2021-03-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the main test function for driver model but not for other tests. Rename the file and the function so this is clear. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | sandbox: Drop the 'starting...' messageSimon Glass2021-03-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This message is annoying since it is only useful for testing. Drop it and update the test to cope. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | Merge tag 'next-2021-03-04' of ↵Tom Rini2021-03-041-4/+5
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video into next - convert sunxi_display to DM_VIDEO
| | * | | | video: sunxi_display: Convert to DM_VIDEOJagan Teki2021-03-031-4/+5
| | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DM_VIDEO migration deadline is already expired, but around 80 Allwinner boards are still using video in a legacy way: ===================== WARNING ====================== This board does not use CONFIG_DM_VIDEO Please update the board to use CONFIG_DM_VIDEO before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Convert the legacy video driver over to the DM_VIDEO framework. This is a minimal conversion: it doesn't use the DT for finding its resources, nor does it use DM clocks or DM devices for the outputs (LCD, HDMI, CVBS). Tested in Bananapi M1+ Plus 1920x1200 HDMI out. (Jagan) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: rebase and smaller fixes] Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | gpio: Add a way to read 3-way strapping pinsSimon Glass2021-03-031-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the internal vs. external pull resistors it is possible to get 27 different combinations from 3 strapping pins. Add an implementation of this. This involves updating the sandbox GPIO driver to model external and (weaker) internal pull resistors. The get_value() method now takes account of what is driving a pin: sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the value outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the external state and we work the final state using those flags and the internal GPIOD_PULL_UP/DOWN flags Of course the outside source does not really exist in sandbox. We are just modelling it for test purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | gpio: sandbox: Track whether a GPIO is drivenSimon Glass2021-03-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new flag to keep track of whether sandbox is driving the pin, or whether it is expecting an input signal. If it is driving, then the value of the pin is the value being driven (0 or 1). If not driving, then we consider the value 0, since we don't currently handle things like pull-ups yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | | gpio: x86: Drop the deprecated methods in intel_gpioSimon Glass2021-03-031-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to implement direction_input() and direction_output() anymore. Drop them and use update_flags() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-09-30 07:39:06 +0000