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| | * | x86: zboot: Move kernel-version code into a functionSimon Glass2020-09-251-16/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To help reduce the size and complexity of load_zimage(), move the code that reads the kernel version into a separate function. Update get_boot_protocol() to allow printing the 'Magic signature' message only once, under control of its callers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | x86: zimage: Avoid using #ifdefSimon Glass2020-09-251-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use IS_ENABLED() instead of #ifdef in this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | x86: zimage: Use a state struct to hold the stateSimon Glass2020-09-251-15/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the 'zboot' command does everything in one go. It would be better if it supported sub-commands like bootm, so it is possible to examine what will be booted before actually booting it. In preparation for this, move the 'state' of the command into a struct. This will allow it to be shared among multiple functions in this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | x86: Update the bootparam headerSimon Glass2020-09-251-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This header is missing a few of the newer features from the specification. Add these as well as a link to the spec. Also use the BIT() macros where appropriate. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | Merge tag 'xilinx-for-v2021.01' of ↵Tom Rini2020-09-2412-33/+94
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
| | * | xilinx: r5: Fix MPU setting for R5Michal Simek2020-09-231-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Map all resource for R5 to operate properly. The patch is done based on the commit 23f7b1a77602 ("armv7R: K3: am654: Enable MPU regions") which also map the whole 4GB at first and then change mapping for DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGAMichal Simek2020-09-232-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile and zynqmp.c to simplify if/endif logic in zynqmp.c. This change is mostly done to be able to use CONFIG_IS_ENABLED macro and obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync. And removing one line from Topic Miami boards which is not needed because symbol is not enabled via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | ARM: zynqmp: Fix SPL_DM_SPI dependenciesMichal Simek2020-09-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing dependencies for DM_SPI_FLASH. Kconfig reports it as: WARNING: unmet direct dependencies detected for SPL_DM_SPI_FLASH Depends on [n]: SPL [=n] && SPL_DM [=n] Selected by [y]: - ARCH_ZYNQMP [=y] && <choice> && SPL_DM_SPI [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Change bl2_plat_get_bl31_params() guardingMichal Simek2020-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It was protected just for SPL_OS_BOOT but this function is only called when SPL_ATF is enabled that's why change macro name. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Correct value of shunt resistor for VCCINT and VCC_SOCSaeed Nowshadi2020-09-231-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Value of shunt resistor for INA226s that monitor VCCINT and VCC_SOC power rails are incorrect. This patch corrects those values. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
| | * | arm64: zynqmp: Add device tree node for 2nd mux on I2C1 busSaeed Nowshadi2020-09-231-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1 ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and channel 2 is connected to J288 connector for QSFP1. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | microblaze: Add support for little/big endian in/out api'sT Karthik Reddy2020-09-231-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add read/write memory utilities for 16 and 32 bits. Add these api's for both little and big endian systems similar to arm architecture. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: kconfig: Move sourcing of board Kconfig to mach foldersMichal Simek2020-09-234-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not source xilinx board Kconfig by other boards. These configs should be available only when Xilinx platforms are selected. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: Add support for larger PIE U-BootEdgar E. Iglesias2020-09-222-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linking a U-Boot larger than 1MB fails with PIE enabled: u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end' defined in .bss_start section in u-boot. This extends the supported range by using adrp & add to load symbols early while starting up. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: Trap PIE builds early if load address is not 4K alignedEdgar E. Iglesias2020-09-221-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PIE requires a 4K aligned load address. If this is not met, trap the startup sequence in a WFI loop rather than running into obscure failures. Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: André Przywara <andre.przywara@arm.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: Mention 4K aligned load addresses in the PIE Kconfig helpEdgar E. Iglesias2020-09-221-2/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Mention the requirement of 4K aligned load addresses in the help section for the POSITION_INDEPENDENT option. Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | board/freescale: Remove P5020DS board supportPriyanka Jain2020-09-241-8/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P5020DS board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1024RDB board supportPriyanka Jain2020-09-241-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1024RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1021RDB board supportPriyanka Jain2020-09-241-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1021RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020MBG board supportPriyanka Jain2020-09-241-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020MBG board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020UTM board supportPriyanka Jain2020-09-241-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020UTM board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1025RDB board supportPriyanka Jain2020-09-241-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1025RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove p1023rdb board supportPriyanka Jain2020-09-241-8/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc p1023rdb board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: powerpc: p2020rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-248-2/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P2020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII switch VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: powerpc: p1010rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-242-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1010RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII PHY AR8033 eTSEC2: Connected to SGMII PHY AR8033 eTSEC3: Connected to SGMII PHY AR8033 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: powerpc: p1020rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-2411-2/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII switch VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | mpc8xxx: Don't compile board_eth_init() for DM_ETHHou Zhiqiang2020-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu_eth_init() is only used by the legacy ethernet driver framework. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P1010RDB: Add eSPI slave DT nodesHou Zhiqiang2020-09-243-0/+19
| | | | | | | | | | | | | | | | | | | | | Add DT nodes for eSPI slave device SPI flash. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P1010: Add eSPI controller DT nodeHou Zhiqiang2020-09-241-0/+10
| | | | | | | | | | | | | | | | | | | | | Add eSPI controller DT node for P1010. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T4240RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for T4240RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T4240: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for T4240. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T2080RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for T2080RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T1042D4RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for T1042D4RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T104x: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for T104x. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T1024RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for T1024RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: T102x: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for T102x. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P5040DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P5040DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P5040: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P5040. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P4080DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P4080DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P4080: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P4080. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P3041DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P3041DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P3041: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P3041. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P2041RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P2041RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P2041: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P2041. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P2020RDB: Add ESPI slave device nodeXiaowei Bao2020-09-242-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P2020RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P2020: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P2020. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P1020RDB: Add ESPI slave device nodeXiaowei Bao2020-09-243-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI slave node for P1020RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dts: P1020: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add ESPI controller DT node for P1020. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | powerpc: dts: t2080qds: add espi slave nodes supportChuanhua Han2020-09-241-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add espi slave nodes to support t2080qds. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | powerpc: dts: t2080: add espi controller node supportChuanhua Han2020-09-241-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add espi controller node to support t2080. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit (git 2.34.1) at 2025-10-03 15:58:31 +0000