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* board/freescale: Remove p1023rdb board supportPriyanka Jain2020-09-241-8/+0
| | | | | | | Remove NXP powerpc p1023rdb board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: powerpc: p2020rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-248-2/+170
| | | | | | | | | | | | P2020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII switch VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: powerpc: p1010rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-242-0/+75
| | | | | | | | | | | | P1010RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII PHY AR8033 eTSEC2: Connected to SGMII PHY AR8033 eTSEC3: Connected to SGMII PHY AR8033 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: powerpc: p1020rdb: Add eTSEC DT nodesHou Zhiqiang2020-09-2411-2/+273
| | | | | | | | | | | | | P1020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII switch VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* mpc8xxx: Don't compile board_eth_init() for DM_ETHHou Zhiqiang2020-09-241-0/+2
| | | | | | | | | The cpu_eth_init() is only used by the legacy ethernet driver framework. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P1010RDB: Add eSPI slave DT nodesHou Zhiqiang2020-09-243-0/+19
| | | | | | | Add DT nodes for eSPI slave device SPI flash. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P1010: Add eSPI controller DT nodeHou Zhiqiang2020-09-241-0/+10
| | | | | | | Add eSPI controller DT node for P1010. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T4240RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | Add ESPI slave node for T4240RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T4240: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for T4240. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T2080RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | Add ESPI slave node for T2080RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T1042D4RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+15
| | | | | | | | Add ESPI slave node for T1042D4RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T104x: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for T104x. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T1024RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+12
| | | | | | | | | Add ESPI slave node for T1024RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: T102x: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for T102x. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P5040DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | Add ESPI slave node for P5040DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P5040: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P5040. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P4080DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | Add ESPI slave node for P4080DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P4080: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P4080. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P3041DS: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | Add ESPI slave node for P3041DS. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P3041: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P3041. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P2041RDB: Add ESPI slave device nodeXiaowei Bao2020-09-241-0/+13
| | | | | | | | | Add ESPI slave node for P2041RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P2041: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P2041. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P2020RDB: Add ESPI slave device nodeXiaowei Bao2020-09-242-0/+30
| | | | | | | | Add ESPI slave node for P2020RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P2020: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P2020. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P1020RDB: Add ESPI slave device nodeXiaowei Bao2020-09-243-0/+45
| | | | | | | | Add ESPI slave node for P1020RDB. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* dts: P1020: Add ESPI DT nodesXiaowei Bao2020-09-241-0/+9
| | | | | | | | Add ESPI controller DT node for P1020. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: dts: t2080qds: add espi slave nodes supportChuanhua Han2020-09-241-0/+33
| | | | | | | | | Add espi slave nodes to support t2080qds. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: dts: t2080: add espi controller node supportChuanhua Han2020-09-241-0/+10
| | | | | | | | | Add espi controller node to support t2080. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* fdtdec: optionally add property no-map to created reserved memory nodeEtienne Carriere2020-09-221-1/+1
| | | | | | | | | | | | | | | | | | Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* binman: sunxi: Add help message for missing sunxi ATF BL31Simon Glass2020-09-221-0/+1
| | | | | | Add a special help message pointing to the relevant README. Signed-off-by: Simon Glass <sjg@chromium.org>
* sunxi: Convert 64-bit boards to use binmanSimon Glass2020-09-221-1/+60
| | | | | | | | | | At present 64-bit sunxi boards use the Makefile to create a FIT, using USE_SPL_FIT_GENERATOR. This is deprecated. Update sunxi to use binman instead. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge branch '2020-09-14-generic-phy-error-trace' into nextTom Rini2020-09-211-4/+4
|\ | | | | | | - Add error tracing messages to the generic PHY infrastructure
| * arm: meson: change trace level for phy errors managed by uclassPatrick Delaunay2020-09-081-4/+4
| | | | | | | | | | | | | | | | As the error message is now displayed by generic phy functions, the pr_err can be change to pr_debug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
* | Merge branch 'master' into nextTom Rini2020-09-2119-43/+66
|\ \ | | | | | | | | | Merge in v2020.10-rc5
| * | x86: acpi: Add memset to initialize SPCR tableWolfgang Wallner2020-09-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing memset to acpi_create_spcr(). The other acpi_create_xxxx() functions perform a memset on their structures, acpi_create_spcr() does not and as a result the contents of this table are partly uninitialized (and thus random after every reset). Fixes: b288cd960072 ("x86: acpi: Generate SPCR table") Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix the tags format in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: acpi: Fix calculation of DSDT lengthWolfgang Wallner2020-09-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the calculation for the length of the DSDT table includes any bytes that are added for alignment, but those bytes are not initialized. This is because the DSDT length is calculated after a call to acpi_inc_align(). Split this up into the following sequence: * acpi_inc() * Calculate DSDT length * acpi_align() Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: fsp: Replace e-mmc with emmc in devicetree bindingsWolfgang Wallner2020-09-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The term eMMC is used inconsistently within the FSP devicetree bindings (e-mmc and emmc), especially for "emmc-host-max-speed" documentation and code disagree. Change all eMMC instances within the FSP bindings to consistently use "emmc". The term "emmc" is already used a lot within U-Boot, while "e-mmc" is only used in the FSP bindings. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct one typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | apalis-imx8qm: rename all occurences to apalis-imx8Philippe Schenker2020-09-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The Toradex product is called apalis-imx8 consisting of SoM with i.MX8QM and i.MX8QP SoCs. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * | colibri-imx8qxp: rename all occurences to colibri-imx8xPhilippe Schenker2020-09-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The Toradex product is called colibri-imx8x consisting of SoM with i.MX8QXP and i.MX8DX SoCs. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * | ARM: mx6: ddr: Add support for iMX6UL/ULL/SL/SDLMarek Vasut2020-09-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8. Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * | imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 supportPeng Fan2020-09-174-18/+5
| | | | | | | | | | | | | | | | | | | | | | | | Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so update u-boot to remove decoding and support for those parts. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8m: clock_imx8mm: add missed returnPeng Fan2020-09-171-0/+1
| | | | | | | | | | | | | | | | | | Add missed return Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8mq: fix SSCG_PLL_REFCLK_SEL_xPeng Fan2020-09-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16 Reported-by: Coverity 3448860 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
| * | imx8mq: fix FRAC_PLL_REFCLK_SEL_MASKPeng Fan2020-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK was wrongly set. Reported-by: Coverity 10045172 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
| * | imx7: ccm: correct target interface numPeng Fan2020-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1 The target interface CCM root index ranges [0,124], so the number should be 125. Reported-by: Coverity 18045 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
| * | Merge tag 'efi-2020-10-rc5' of ↵Tom Rini2020-09-161-0/+9
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc5 The following bugs are fixed: * unaligned access in br_i32_decode() * missing restore of global data pointer in UEFI selftest * missing restore of global data pointer on RISC-V in UEfI subsystem * efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
| | * | riscv: define function set_gd()Heinrich Schuchardt2020-09-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Function set_gd() is needed in the UEFI sub-system if the global data pointer is stored in a register. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | rockchip: make_fit_atf: ignore empty PT_LOAD segmentHeinrich Schuchardt2020-09-161-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker sometimes creates PT_LOAD segments with length (p_filesz) zero as described in https://man7.org/linux/man-pages/man5/elf.5.html. This leads to build failures. We should ignore empty segments. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | rockchip: rv1108: Enable grf as pre-reloc nodeKever Yang2020-09-161-0/+4
| |/ / | | | | | | | | | | | | | | | The grf node will be used before relocate, enable it in dts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: MediaTek: amend IC description for MediaTek MT8512Mingming Lee2020-09-121-3/+3
| | | | | | | | | | | | | | | | | | The description for MT8512 has some mistake, so correct it. Signed-off-by: Mingming Lee <Mingming.Lee@mediatek.com>
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