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* powerpc, 8xx: move FEC Ethernet driver in drivers/netChristophe Leroy2017-07-083-852/+1
| | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc, 8xx: Migrate to KconfigChristophe Leroy2017-07-084-10/+153
| | | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: Properly set CPM frequency in the device treeChristophe Leroy2017-07-081-0/+2
| | | | | | | | | For processors whose core runs at twice the bus frequency, the fallback frequency calculation in Linux provides a wrong result. Therefore, U-boot needs to pass the correct value. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: Handle checkpatch errors and some of the warnings/checksChristophe Leroy2017-07-0812-335/+277
| | | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: Implement GLL2 ERRATAChristophe Leroy2017-07-081-0/+20
| | | | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: Use IO accessors to access IO memoryChristophe Leroy2017-07-0811-664/+738
| | | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: move specific reginfoChristophe Leroy2017-07-082-0/+65
| | | | | Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/Christophe Leroy2017-07-086-13/+10
| | | | | | | | | immap.c used to be common to several CPUs. It is now only linked to the 8xx, so this patch moves it into arch/powerpc/cpu/mpc8xx/ Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
* powerpc: Partialy restore core of mpc8xxChristophe Leroy2017-07-0823-1/+4540
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CS Systemes d'Information (CSSI) manufactures 8xx boards for critical communication systems. Those boards have been running U-Boot since 2010 and will have to be maintained until at least 2027. commit 5b8e76c35ec312a3f73126bd1a2d2c0965b98a9f ("powerpc, 8xx: remove support for 8xx") orphaned those boards by removing support for the mpc8xx CPU. This commit partially restores support for the 8xx, with the following limitations: - Restores support for MPC866 and MPC885 only - Does not restore IDE, PCMCIA, I2C, USB - Does not restore examples - Does not restore POST - Does not restore Ethernet on SCC - Does not restore console on SCC - Does not restore bedbug and kgdb support As the 866 and 885 do not support the following features, they are not restored either: - VIDEO / LCD - RTC clock The CPM uCODE patch is not restored either, because: - 866 and 885 already have support for I2C and SPI relocation without a uCODE patch - relocation of SMC, I2C or SPI is only needed for using SCCs for Ethernet or QMC The dynamic setup/calculation of clocks is removed, we expect the target being use with the clock and PLPRCR register defined in the configuration. All the clock settings for 8xx prior to 866 is removed as well as we now only support 866 and 885. This code is mature and addresses mature boards. Therefore all code enclosed in '#if 0/#endif' and '#if XX_DEBUG/#endif' is unneeded. The following files are not restored by this patch: - arch/powerpc/cpu/mpc8xx/bedbug_860.c - arch/powerpc/cpu/mpc8xx/fec.h - arch/powerpc/cpu/mpc8xx/kgdb.S - arch/powerpc/cpu/mpc8xx/plprcr_write.S - arch/powerpc/cpu/mpc8xx/scc.c - arch/powerpc/cpu/mpc8xx/upatch.c - arch/powerpc/cpu/mpc8xx/video.c - arch/powerpc/include/asm/status_led.h - arch/powerpc/lib/ide.c - arch/powerpc/lib/ide.h - doc/README.MPC866 - drivers/pcmcia/mpc8xx_pcmcia.c - drivers/rtc/mpc8xx.c - drivers/usb/gadget/mpc8xx_udc.c - drivers/video/mpc8xx_lcd.c - examples/standalone/test_burst.c - examples/standalone/test_burst.h - examples/standalone/test_burst_lib.S - examples/standalone/timer.c - include/mpc823_lcd.h - include/usb/mpc8xx_udc.h - post/cpu/mpc8xx/Makefile - post/cpu/mpc8xx/cache.c - post/cpu/mpc8xx/cache_8xx.S - post/cpu/mpc8xx/ether.c - post/cpu/mpc8xx/spr.c - post/cpu/mpc8xx/uart.c - post/cpu/mpc8xx/usb.c - post/cpu/mpc8xx/watchdog.c Some of the restored files are not located in a proper location. In order to keep traceability of the changes, they will be moved to their correct location and moved to Kconfig in a followup patch. This patch also declares CSSI as point of contact for the update of the 8xx platform, as those boards are the only ones still being maintained on the 8xx area. A later patch will add those boards to the tree. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* avr32: Retire AVR32 for goodAndy Shevchenko2017-07-0658-4337/+0
| | | | | | | | | | | | | | AVR32 is gone. It's already more than two years for no support in Buildroot, even longer there is no support in GCC (last version is heavily patched 4.2.4). Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully). There is no good point to keep this support in U-Boot either. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* stm32: Correct positioning of declarationSimon Glass2017-07-061-1/+3
| | | | | | | | | | | | | | | | | The current code gives a warning: arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init': arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) ^ arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code Fix it by moving the declaration to the top of the function. Signed-off-by: Simon Glass <sjg@chromium.org> Series-cc trini
* arm64: use psci reset on snapdragonRob Clark2017-07-061-1/+1
| | | | | | | | This actually works on snapdragon.. not sure why we weren't using it. Fixes reboot/poweroff when using UEFI. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
* powerpc: remove 4xx supportHeiko Schocher2017-07-0386-28455/+6
| | | | | | | | | There was for long time no activity in the 4xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 4xx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
* Revert "armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel"Tom Rini2017-06-291-1/+0
| | | | | | | | | The author of the commit discovered later on that this was already being done in cleanup_before_linux() on arch/arm/cpu/armv7m/cpu.c. This reverts commit 8f079cccb369995e46a2ab530d5d60b88c1e70bb. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-arcTom Rini2017-06-295-6/+82
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| * arc: Add support for HS Development Kit boardAlexey Brodkin2017-06-293-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC HS Development Kit board is a new low-cost development platform sporting ARC HS38 in real silicon with nice set of features such as: * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz * 4Gb of DDR (we use only lowest 1Gb out of it now) * Lots of DesigWare peripherals * Different connectivity modules: - Synopsys HAPS HT3 - Arduino-compatible connector - MikroBUS This initial commit supports the following peripherals: * UART (DW 8250) * Ethernet (DW GMAC) * SD/MMC (DW Mobile Storage) * USB 1.1 & 2.0 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * arcv2: Set IOC aperture so it covers available DDRAlexey Brodkin2017-06-291-6/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to use the same memory layout and size for a couple of boards and thus we just hardcoding IOC aperture start and size. Now when we're getting more boards with more memory on board we need to have an ability to set IOC so it matches real DDR layout and size. Even though it is not really a must but for simplicity we assume IOC covers all the DDR we have, that gives us a chance to not bother where DMA buffers are allocated - any part of DDR is OK. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * arc: arcv1: Disable master/slave checkAlexey Brodkin2017-06-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ARCompact cores are not supposed to be used in SMP designs (this doesn't stop people from creation of heterogeneous chips, for an example keep reading) so there's no point in checking ARCNUM and halting somebody if we build for ARC700. Moreover on AXS101 board we have ARC770 in the ASIC together with other ARC cores and ARC770 happens to be the last node in JTAG chain with ARCNUM = 4. And existing check halts the one and only core we want keep running. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | ARM: atmel: Rename MA5D4EVKMarek Vasut2017-06-291-2/+2
| | | | | | | | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
* | atmel, at91: fix taurus boardHeiko Schocher2017-06-291-0/+2
| | | | | | | | | | | | | | | | | | since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" taurus board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
* | atmel, at91: fix smartweb boardHeiko Schocher2017-06-291-0/+2
| | | | | | | | | | | | | | | | | | since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" smartweb board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
* | ARM: make memset and memcpy prompt message more clearlyAndy Yan2017-06-291-2/+2
| | | | | | | | | | | | | | | | | | The origin SPL_USE_ARCH_MEMSET/MEMCPY use same prompt message as USE_ARCH_MEMSET/MEMCPY, which makes it's hard to distinguish them in menuconfig interface. This patch gives them different prompt messages for spl and none-spl config. Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
* | ti816x: Enable ethernet supportTom Rini2017-06-282-0/+39
|/ | | | | | | | | | The ti816x SoC revision of the ethernet IP block is handled by the "davinci_emac" driver, rather than the "cpsw" driver as done by later members of the family. Enable the relevant plumbing. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-x86Tom Rini2017-06-275-2/+43
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| * Revert "x86: Convert MMC to driver model"Bin Meng2017-06-275-2/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555. With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops->read) in block_dread() function. The fix (SCSI driver converted to DM) is ready in u-boot-dm branch, but it is too late for this relese to get that in. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-imxTom Rini2017-06-275-2/+42
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
| * | mx6: soc: Fix typo in temperature unit nameFabio Estevam2017-06-271-1/+1
| | | | | | | | | | | | | | | | | | The correct name is 'Celsius', so fix it accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx25: Add function to set PER clocksBenoît Thébaudeau2017-05-312-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Introduce the imx_set_perclk() function to make it possible to set the PER clocks. Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx25: Fix imx_get_perclk()Benoît Thébaudeau2017-05-311-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | imx_get_perclk() used the AHB clock as the clock source for all PER clocks, but the USB PLL output can also be a PER clock source if the corresponding PER CLK MUX bit is set in CCM.MCR. Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | drivers: pci: imx: add imx_pcie_remove functionTim Harvey2017-05-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>
| * | pico-imx7d: Add initial supportVanessa Maegima2017-05-311-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the initial support for pico-imx7d board based on Wig Cheng's source code. Add support for eMMC, USB gadget, I2C, PMIC and Ethernet. For more information about this board, please visit: http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* | | Merge git://git.denx.de/u-boot-uniphierTom Rini2017-06-2435-363/+188
|\ \ \ | |_|/ |/| | | | | | | | | | | - fix sparse warnings - sync DT with Linux - add new board support (LD11/LD20 global)
| * | arm64: dts: uniphier: add support for LD20 Global boardKunihiko Hayashi2017-06-252-0/+62
| | | | | | | | | | | | | | | | | | | | | Add initial device tree support for LD20 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | arm64: dts: uniphier: add support for LD11 Global boardKunihiko Hayashi2017-06-252-0/+80
| | | | | | | | | | | | | | | | | | | | | Add initial device tree support for LD11 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: dts: uniphier: sync DT with Linux next-20170622Masahiro Yamada2017-06-2524-353/+29
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: fix various sparse warningsMasahiro Yamada2017-06-258-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warnings reported by sparse: - ... was not declared. Should it be static?" - cast to restricted __be32 While fixing those, the type conflict of cci500_init() was found. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | atmel, at91: fix corvus boardHeiko Schocher2017-06-231-0/+2
| | | | | | | | | | | | | | | | | | | | | since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" corvus board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | ARM: dts: OMAP5+: Update spl specific dtsLokesh Vutla2017-06-231-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ARM: dts: am43xx: Update spl specific dtsLokesh Vutla2017-06-231-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ti816x: Add additional boot device detection logicTom Rini2017-06-231-0/+17
|/ / | | | | | | | | | | | | | | | | It has been observed that between PG1.0 and PG2.0/2.1 depending on which device we boot from, we may see a different value here than is documented in the TRM. Update the values for NAND and MMC1 based on real life usage on each revision. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2017-06-218-143/+303
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| * | ARM: dts: exynos5422-odroidxu3: add the LDO's nodesJaehoon Chung2017-06-051-0/+209
| | | | | | | | | | | | | | | | | | | | | Add the LDO's nodes that taken from Linux Kernel. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | ARM: dts: exynos4: change the nodes relevant to mmc/sdJaehoon Chung2017-06-057-143/+94
| | | | | | | | | | | | | | | | | | | | | | | | Change the nodes relevant to mmc/sd for using DM. compatible are also changed to each SoCs. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblazeTom Rini2017-06-218-10/+157
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup - unmap OCM - Support for SMC Zynq: - add ddrc to Kconfig - add topic-miamilite board support
| * | | arm: zynq: Add support for the topic-miamilite system-on-moduleMike Looijmans2017-06-202-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM, 64MB dual-parallel QSPI NOR flash and clock sources. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | arm64: zynqmp: Check pmufw versionMichal Simek2017-06-202-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If PMUFW version is not v0.3 then panic. ZynqMP switch to CCF based clock driver which requires PMUFW to be present at certain version. This patch ensure that you use correct and tested PMUFW binary. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | arm64: zynqmp: Define routines for mmio write and readSiva Durga Prasad Paladugu2017-06-202-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | arm: zynq: Add Kconfig option for any DDR specific initializationSiva Durga Prasad Paladugu2017-06-202-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | arm64: zynqmp: Do not map unused OCM/TCM regionMichal Simek2017-06-201-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When OCM or TCM is protected this mapping still exist and it is causing access violation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | arm64: zynqmp: Add comment about level shifter mode v1Michal Simek2017-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Silicon v1 didn't support SD boot mode with level shifter. Because system can't boot any error message is not shown that's why comment is just a record if someone tries to debug it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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