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* mips: bmips: add bcm6345-rst driver support for BCM6358Álvaro Fernández Rojas2017-05-101-0/+7
| | | | | | | This driver can control up to 32 resets. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-clk driver support for BCM63268Álvaro Fernández Rojas2017-05-101-0/+13
| | | | | | | This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-clk driver support for BCM6328Álvaro Fernández Rojas2017-05-101-0/+7
| | | | | | | This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-clk driver support for BCM6358Álvaro Fernández Rojas2017-05-101-0/+7
| | | | | | | This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add NeufBox 4 (Sercomm) boardÁlvaro Fernández Rojas2017-05-101-0/+93
| | | | | | | This serves as an example for bcm6358-leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6358-led driver support for BCM6358Álvaro Fernández Rojas2017-05-101-0/+9
| | | | | | | This driver can control up to 32 serial leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add Comtrend VR-3032u bcm6328-ledsÁlvaro Fernández Rojas2017-05-101-0/+43
| | | | | | | This board has several LEDs attached to its BCM6328 led controller. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add Comtrend AR-5387un bcm6328-ledsÁlvaro Fernández Rojas2017-05-101-0/+30
| | | | | | | This board has several LEDs attached to its BCM6328 led controller. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6328-led driver support for BCM63268Álvaro Fernández Rojas2017-05-101-0/+9
| | | | | | | This driver can control up to 24 LEDs and supports HW blinking and serial leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6328-led driver support for BCM6328Álvaro Fernández Rojas2017-05-101-0/+9
| | | | | | | This driver can control up to 24 LEDs and supports HW blinking and serial leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add Huawei HG556a gpio-ledsÁlvaro Fernández Rojas2017-05-101-0/+73
| | | | | | | This board has several LEDs attached to gpio0. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-gpio driver support for BCM63268Álvaro Fernández Rojas2017-05-101-0/+19
| | | | | | | | This SoC has one gpio bank divided into two 32 bit registers, with a total of 52 GPIOs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-gpio driver support for BCM6328Álvaro Fernández Rojas2017-05-101-0/+9
| | | | | | | This SoC has one gpio bank with a total of 32 GPIOs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mips: bmips: add bcm6345-gpio driver support for BCM6358Álvaro Fernández Rojas2017-05-101-0/+19
| | | | | | | | This SoC has one gpio bank divided into two 32 bit registers, with a total of 40 GPIOs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Comtrend VR-3032u boardÁlvaro Fernández Rojas2017-05-103-0/+34
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM63268 SoC familyÁlvaro Fernández Rojas2017-05-102-0/+101
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Comtrend AR-5387un boardÁlvaro Fernández Rojas2017-05-103-0/+34
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM6328 SoC familyÁlvaro Fernández Rojas2017-05-102-0/+100
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Huawei HG556a boardÁlvaro Fernández Rojas2017-05-103-0/+44
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM6358 SoC familyÁlvaro Fernández Rojas2017-05-103-1/+160
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add initial infrastructure for Broadcom MIPS SoCsÁlvaro Fernández Rojas2017-05-106-0/+81
| | | | | | | | | | | | CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: allow using generic sysreset driversÁlvaro Fernández Rojas2017-05-101-0/+2
| | | | | | | Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: call debug_uart_init right before board_init_fDaniel Schwierzeck2017-05-101-0/+14
| | | | | | | | | | | | | All MIPS boards that support debug uart are calling debug_uart_init right at the beginning of board_early_init_f. Instead of doing that, let's provide a generic call to debug_uart_init right before the call to board_init_f if debug uart is enabled for boards without stack in SRAM. On the other hand, boards with stack in SRAM can call earlier (right before low level init). Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* MIPS: add support for generating u-boot.elfÁlvaro Fernández Rojas2017-05-101-0/+2
| | | | | | Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* u-boot.elf: remove hard-coded arm64 flagsÁlvaro Fernández Rojas2017-05-101-0/+6
| | | | | | | | | This is needed in order to allow building it for other archs. Move relocation comment to a better place. Remove no longer needed dts FIXME. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2017-05-0940-263/+6664
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| * dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"Jean-Jacques Hiblot2017-05-091-0/+4
| | | | | | | | | | | | | | | | This is needed to probe devices under that bus such as the SATA PHY. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: test: Add tests for the generic PHY uclassJean-Jacques Hiblot2017-05-091-0/+17
| | | | | | | | | | | | | | | | | | | | | | Those tests check: - the ability for a phy-user to get a phy based on its name or its index - the ability of a phy device (provider) to manage multiple ports - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9263ekWenyou Yang2017-05-093-89/+340
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9263ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9rlekWenyou Yang2017-05-093-0/+1380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9rlek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9260ek/9g20ekWenyou Yang2017-05-097-68/+617
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9g20ek and at91sam9260ek boards are copied from the Linux v4.10, do the changes below. - Fix the build error for the usb0 node. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Add the clk pinctrl of the mmc0 node. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9m10g45ekWenyou Yang2017-05-093-105/+474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9m10g45ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9n12ekWenyou Yang2017-05-093-0/+1331
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9n12ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the pinctrl-names of mmc0 node. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: at91: Add dts files for at91sam9x5ekWenyou Yang2017-05-0921-0/+2461
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree source files of at91sam9x5ek board are copied from the Linux v4.10, do the changes below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * board: sama5d4ek: fix DD2 configurationWenyou Yang2017-05-091-1/+6
| | | | | | | | | | | | Fix the DDR2 configuration to make SPL work. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * ARM: dts: sama5d2_xplained: update for SPLWenyou Yang2017-05-092-0/+32
| | | | | | | | | | | | | | Add the "u-boot,dm-pre-reloc" property to determine which nodes which are needed by SPL and by the board_init_f stage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * ARM: dts: sama5d2: add clock property for uart1 nodeWenyou Yang2017-05-091-0/+2
| | | | | | | | | | | | Add clock property for uart1 node. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-05-0914-126/+397
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| * | ARM: mvebu: switch db-88f6820-amc to DM for i2cChris Packham2017-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move existing configuration from header file to defconfig or dts as appropriate. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * | fix: phy: marvell: cp110: update comphy selector optionStefan Roese2017-05-092-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align PHY selectors register with Armada-CP-110 functional SPEC update all relevant device trees with this change. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | phy: marvell: cp110: update utmi phy connection typeStefan Roese2017-05-092-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches. Signed-off-by: zachary <zhangzg@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | phy: marvell: Replace PHY_TYPE_KR with PHY_TYPE_SFIStefan Roese2017-05-092-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Use correct naming as done in the latest Marvell U-Boot version as well. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Minor fixes in the AXP / A38x SERDES codeUwe Kleine-König2017-05-094-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix spelling error of SERDES_VERSION - Remove superfluous definition of this macro - Remove unnecessary include of i2c.h Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm64: a8k: dts: Add support for NAND devices on A8K platformKonstantin Porotchkin2017-05-094-0/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND to CP master device tree. Add armada-7040-db-nand device tree for the board configured with NAND boot device. Add comment about boot device ID to armada-7040-db DTS. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm64: mvebu: a8k: Add support for NAND clock getKonstantin Porotchkin2017-05-091-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement mvebu_get_nand_clock call for A8K family. This function is used by PXA3XX NAND driver. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm64: mvebu: Trigger PCI devices scan at early init stageKonstantin Porotchkin2017-05-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCIe initialization at early init stage. This operation has a side effect of detecting all PCIe plug-in cards, so the operator is not obligated to issue "pci enum" command though CLI for this purpose. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | mvebu: dts: a80x0: Sync the DB DTS with standard config AKonstantin Porotchkin2017-05-091-107/+115
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the default configuration of Armada-8040-DB with Marvell u-boot-2015 standard configuration "A" for the same board. The standard configuration "A" enables 2 PCIe slots on CP0 and 3 PCIe slots on CP1. This is the main configuration used for u-boot and Linux tests. This patch also re-arranges the DTS file entries by grouping all nodes related to CP0 and CP1. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | ARM: keystone: Enable DM_I2C by defaultCooper Jr., Franklin2017-05-091-0/+4
| | | | | | | | | | | | | | | | | | Enable by default DM_I2C for all Texas Instruments Keystone 2 based evms. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | ARM: dts: keystone-k2g-evm: Enable I2C0 and I2C1Cooper Jr., Franklin2017-05-091-0/+8
| | | | | | | | | | | | | | | | Enable I2C0 and I2C1 which is needed to enable usage of DM I2C. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | ARM: dts: keystone2: add I2C aliases for davinci I2C nodesCooper Jr., Franklin2017-05-091-0/+3
| | | | | | | | | | | | | | | | | | Add aliases for I2C nodes required for the DM framework to probe the davinci-i2c driver. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
generated by cgit (git 2.34.1) at 2025-01-29 20:09:39 +0000