summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* sandbox: Sync up sandbox64.dts with main DTSimon Glass2019-07-101-0/+67
| | | | | | | Various nodes have been added and adjusted with sandbox. Move these changes over to sandbox64.dts to keep these in sync. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'u-boot-atmel-2019.10-a' of ↵Tom Rini2019-07-091-19/+17
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features and fixes for 2019.10 cycle This includes the Atmel QSPI driver and support for the at91 boards. This is the port of the driver from Linux, mostly done by Tudor Ambarus.
| * ARM: dts: at91: sama5d2_xplained: fix QSPI0 nodeCyrille Pitchen2019-07-091-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | Fix the following: - use "jedec,spi-nor" binding, we use jedec compatible flashes - set bus width to 4, we use quad capable flashes - differentiate bewteen data and clk and cs pins - drop partions as we don't use them in u-boot. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
* | Merge tag 'u-boot-amlogic-20190704' of ↵Tom Rini2019-07-084-0/+62
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix khadas-vim README - add support for unique generated MAC adresses from SoC serial, limited to Amlogic GXL/GXM boards for now
| * | ARM: meson: add unique MAC address generationNeil Armstrong2019-07-043-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for generating an unique MAC address using the SoC internal serial number from the Secure Monitor interface. The algorithm generates an unicast locally administered 6bytes minus 2bits address using an crc16 of the serial for the top 16bits with the lower 2 bits masked to setup the unicast locally administered property and a crc24 for the lower 24bits. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | ARM: meson: sm: Add secure monitor calls to retrieve SoC serial numberNeil Armstrong2019-07-042-0/+25
| | | | | | | | | | | | | | | | | | | | | The Secure Monitor interface permits retrieving the SoC Serial Number, add a function to retrieve it. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | Merge tag 'mmc-6-23' of https://github.com/MrVan/u-bootTom Rini2019-07-0811-27/+27
|\ \ \ | |_|/ |/| | | | | - Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
| * | Convert to use fsl_esdhc_imx for i.MX platformsYangbo Lu2019-06-2311-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
* | | Merge tag 'mips-fixes-for-2019.07' of ↵Tom Rini2019-07-082-1/+27
|\ \ \ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - mtmips: network stability fixes for gardena-smart-gateway
| * | | mips: mt76xx: Implement new d-cache fix in last_stage_init()Stefan Roese2019-07-052-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit 06985289d452 ("watchdog: Implement generic watchdog_reset() version") the init sequence has changed in arch_misc_init(), resulting in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena). When this happens, the first (or sometimes later ones as well) TFTP command hangs and does not complete correctly. This leads to the assumption that the d-cache is not in a clean state once the ethernet driver is called (d-cache is used here for the buffers). The old work- around with the cache flush somehow does not work any more now with the new code change. Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix this issue. With v2019.07-rc3 it shows again. The time of accessing the data seems to be very important here. It needs to be "very late" in the boot process. Testing has shown, that copying a 64KiB area in DDR at a very late bootup time, directly before calling into the prompt, fixes this issue. Flushing of the complete d-cache does not seem to necessary, as this copy alone seems to fix this problem. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | | arm: mediatek: remove arch_misc_initWeijie Gao2019-07-072-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The watchdog of mediatek chips is enabled by bootrom before u-boot is running. Previously we choose to enable the wdt driver only to disable the watchdog hardware. Now wdt service is enabled by default. The function arch_misc_init which is only used to disable wdt is no longer needed. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbTom Rini2019-07-071-0/+12
|\ \ \ \ | | | | | | | | | | | | | | | - DWC and i.MX6 fixes
| * | | | dm: Add a No-op uclassJean-Jacques Hiblot2019-07-051-0/+12
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uclass is intended for devices that do not need any features from the uclass, including binding children. This will typically be used by devices that are used to bind child devices but do not use dm_scan_fdt_dev() to do it. That is for example the case of several USB wrappers that have 2 child devices (1 for device and 1 for host) but bind only one at a any given time. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | Merge tag 'rockchip-for-v2019.07-rc5-3' of ↵Tom Rini2019-07-071-1/+1
|\ \ \ \ | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
| * | | | rockchip: make_fit_atf.py: fix loadables property set errorAndy Yan2019-07-051-1/+1
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b238e4b00ced ("rockchip: Cleanup of make_fit_atf.py.") set firmware = "atf_1"; loadables = "uboot","atf_1","atf_2"; Actually it should be: firmware = "atf_1"; loadables = "uboot","atf_2","atf_3"; Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | | Merge tag 'rpi-next-2019.07' of https://github.com/mbgg/u-bootTom Rini2019-07-0526-76/+1239
|\ \ \ \ | |_|/ / |/| | | | | | | | | | | | | | | | | | | - fix complation error for CONFIG_USB - update RPi3 DTBs to v5.1-rc6 state - add defconfig for RPi3 B+ - Fix BCM2835_MBOX_TAG_TEST_PIXEL_ORDER define
| * | | ARM: bcm283x: Fix definition of MBOX_TAG_TEST_PIXEL_ORDERBerkus Decker2019-06-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MBOX_TAG_TEST_PIXEL_ORDER define is incorrect. According to official documentation it has a slightly different numbering. Correct mailbox constants are defined in e.g. linux raspberry-firmware https://code.woboq.org/linux/linux/include/soc/bcm2835/raspberrypi-firmware.h.html#RPI_FIRMWARE_FRAMEBUFFER_TEST_PIXEL_ORDER These are obtained from the bcm2835 documentation e.g. https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface#test-pixel-order Fix the define to get us back in sync with the spec. Signed-off-by: Berkus Decker <berkus+github@metta.systems> [agraf: clarify subject, extend commit message] Signed-off-by: Alexander Graf <agraf@csgraf.de> [mb: updating email of agraf] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | | fdt: update bcm283x device tree sources to Linux 5.1-rc6 stateHeinrich Schuchardt2019-06-1225-75/+1238
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating the bcm283x device tree sources adds the device trees for - Raspberry Pi 3 Model A+ - Raspberry Pi 3 Model B+ - Raspberry Pi Compute Module IO board rev1 - Raspberry Pi Compute Module 3 IO board V3.0 - Raspberry Pi Zero Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* | | | wandboard: Add FIT image supportFabio Estevam2019-07-041-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the transition to DM, only the mx6dl/solo wandboard is supported. Add FIT image support so that all the wandboard variants can be supported, like it was prior to the DM conversion. Successfully booted Linux on mx6q/solo/qp wandboards. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | | wandboard: Add mmc0 aliasFabio Estevam2019-07-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a mmc0 alias so that U-Boot proper can associate mmc0 with the boot SD card. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | | wandboard: Import extra wandboard devicetree filesFabio Estevam2019-07-043-0/+241
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Import wandboard devicetree files so that the mx6q and mx6qp variants can be properly supported. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | | wandboard: Sync with devicetree files from kernel 5.1.9Fabio Estevam2019-07-043-112/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Udate the wandboard devicetree files with the ones from kernel 5.1.9. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | | mx6: dts: Move dtbs under SoC levelFabio Estevam2019-07-041-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Place dtbs under SoC level rather than board level. imx6q-novena.dtb and imx6dl-wandboard-revb1.dtb were placed under the board config option, so move them to SoC level. This also aligns with the kernel dts Makefile format. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | | mx6: dts: Keep dtb entries sortedFabio Estevam2019-07-041-2/+2
| |/ / |/| | | | | | | | | | | | | | | | | Keep dtb entries sorted to help adding new dtbs in an organized form. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | rockchip: rk3288: enable TPL for tinker-boardKever Yang2019-07-021-0/+1
| | | | | | | | | | | | | | | | | | All the config for TPL has been update, we can enable the TPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | rockchip: dts: rk3288-tinker: enable sdmmc pinctrl node in splKever Yang2019-07-021-0/+24
| | | | | | | | | | | | | | | | | | | | | rockchip pinctrl driver has update to use dts, so we need to add the pinctrl config in SPL for sdmmc. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | rockchip: dts: tinker: migrate the dm-pre-reloc tag into -u-boot dtsKever Yang2019-07-022-19/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate all the "u-boot,dm-pre-reloc" tag from rk3288-tinker.dts into rk3288-tinker-u-boot.dtsi. When both board level and soc level '-u-boot.dtsi' files exist, we need to include the soc level 'rk3288-u-boot.dtsi' manually. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | rockchip: dts: rk3288: move reloc tag into -u-boot dtsKever Yang2019-07-024-8/+40
| | | | | | | | | | | | | | | | | | | | | Move all the tag "u-boot,dm-pre-reloc" from rk3288.dtsi into rk3288-u-boot.dtsi. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | rockchip: rk3288: add separate TPL STACK addressKever Yang2019-07-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | TPL is at SRAM while other stage is at SDRAM, so it needs separate STACK. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | | rockchip: rk3288: enable TPL configs to chip levelKever Yang2019-07-022-14/+14
| | | | | | | | | | | | | | | | | | | | | More boards other than vyasa needs TPL, so enable the TPL configs at chip level instead of board level. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | rockchip: dts: rk3399: rockpro64: Provide init voltageMark Kettenis2019-07-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing regulator-init-microvolt property to vdd_log regulator. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on latest u-boot-rockchip master) Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I13b24fb81e8ad269d7dbb0c7b67f5f4795d2e775
* | | ARM: uniphier: move sg_set_{pinsel, iectrl} to more relevant placesMasahiro Yamada2019-06-294-42/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the sg_set_pinsel macro to arch/arm/mach-uniphier/arm32/debug_ll.S since it is not used anywhere else. Move the C functions sg_set_{pinsel,iectrl} to debug-uart.c since they are not used anywhere else. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: remove unused init code for CONFIG_DEBUG_UARTMasahiro Yamada2019-06-294-44/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | debug_uart_init() is called from spl_board_init(), which is only compiled for SPL. For U-boot proper, _debug_uart_init() is unreachable, so dropped by the dead code elimination. Now that 64-bit SoCs of this SoC family no longer support SPL, debug-uart-ld20.c is never compiled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: include <linux/io.h> from dram_init.cMasahiro Yamada2019-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | This file calls readl(), so needs to include <linux/io.h>. Currently, it relies on someone else including it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: remove unused sg_set_iectrl_range()Masahiro Yamada2019-06-291-8/+0
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: remove unused SC_DPLLOSCCTRLMasahiro Yamada2019-06-291-4/+0
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: fix build error for CONFIG_DEBUG_LL=yMasahiro Yamada2019-06-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function") accidentally removed the macros needed to compile debug_ll.S Revive them. Fixes: e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge tag 'u-boot-imx-20190628' of ↵Tom Rini2019-06-286-159/+1077
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2019.07 - menlo board - allow SDB on Sabre - HAB for mx6sl - apalis board
| * | | ARM: dts: imx: m53menlo: Import M53Menlo DT from LinuxMarek Vasut2019-06-274-1/+488
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import iMX53 M53Menlo device tree from Linux next-20190607 3f310e51ceb1 . Enable DT control in full U-Boot . Add U-Boot extras into separate DTSi, the GPIO controllers need to be inited early, otherwise m53_set_clock() won't be able to detect the correct CPU clock frequency by reading the GPIO. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | ARM: dts: imx: imx53: Synchronize iMX53 DT with LinuxMarek Vasut2019-06-271-157/+588
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize iMX53 device tree from Linux next-20190607 3f310e51ceb1 , this is needed to get NFC, UART, USBOTG DT nodes. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | mx6sl: hab: Fix pu_irom_mmu_enabled addressBreno Matheus Lima2019-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to hab.c code we have to notify the ROM code if the MMU is enabled or not. This is achieved by setting the "pu_irom_mmu_enabled" to 0x1. The current address in hab.c code is wrong for i.MX6SL, according to ROM map file the correct address is 0x00901c60. As we are writing in the wrong address the ROM code is not flushing the caches when needed, and the following HAB event is observed in certain scenarios: --------- HAB Event 1 ----------------- event data: 0xdb 0x00 0x14 0x41 0x33 0x18 0xc0 0x00 0xca 0x00 0x0c 0x00 0x01 0xc5 0x00 0x00 0x00 0x00 0x07 0xe4 STS = HAB_FAILURE (0x33) RSN = HAB_INV_SIGNATURE (0x18) CTX = HAB_CTX_COMMAND (0xC0) ENG = HAB_ENG_ANY (0x00) Update MX6SL_PU_IROM_MMU_EN_VAR to address this issue. Reported-by: Frank Zhang <frank.zhang@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | | | Merge tag 'u-boot-stm32-20190628' of ↵Tom Rini2019-06-283-7/+11
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm STM32 MCU fixes/cleanup: - Fix SPL console for STM32F769 Discovery - Fix Memory Protection Unit size for STM32F4 series - Cleanup DT for STM32F746 Discovery
| * | | | mach-stm32: Fix MPU region size dedicated to SDRAM for STM32F4Patrice Chotard2019-06-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPU region dedicated for SDRAM for STM32F4 SoCs family was set to 16MB, but STM32F429 Evaluation board have 32MB of SDRAM. When kernel starts, only first 16MB of SDRAM are configured with XN (eXecute Never) bit disabled, whereas kernel is using 32MB. To avoid such situation in the future, extend this MPU region to 512MB as for STM32F7/H7. It fixes the following user land exception on STM32F429 Evaluation board : [ 1.713002] VFS: Mounted root (ext4 filesystem) readonly on device 179:2. [ 1.722605] devtmpfs: mounted [ 1.733057] Freeing unused kernel memory: 72K [ 1.737622] This architecture does not have kernel memory protection. [ 1.744070] Run /sbin/init as init process [ 1.906850] [ 1.906850] Unhandled exception: IPSR = 00000004 LR = fffffffd [ 1.914282] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6 [ 1.921433] Hardware name: STM32 (Device Tree Support) [ 1.926601] PC is at 0x1a00b64 [ 1.929642] LR is at (null) [ 1.932669] pc : [<01a00b64>] lr : [<00000000>] psr: 01000000 [ 1.938993] sp : 01a5cfb0 ip : 00000000 fp : 00000000 [ 1.944269] r10: 01a43b00 r9 : 00000000 r8 : 00000000 [ 1.949564] r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000 [ 1.956168] r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000 [ 1.962701] xPSR: 01000000 [ 1.965506] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6 [ 1.972658] Hardware name: STM32 (Device Tree Support) [ 1.978132] [<0000c009>] (unwind_backtrace) from [<0000b24f>] (show_stack+0xb/0xc) [ 1.986024] [<0000b24f>] (show_stack) from [<0000b947>] (__invalid_entry+0x4b/0x4c) Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | | ARM: dts: stm32: Remove useless u-boot, dm-pre-reloc in ↵Patrice Chotard2019-06-281-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | stm32f746-disco-u-boot.dtsi As in stm32f7-u-boot.dtsi these nodes already have "u-bootdm-pre-reloc" property, no need to add them again in stm32f746-disco-u-boot.dtsi. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | | ARM: dts: stm32: Add u-boot, dm-pre-reloc for usart1_pins_a for stm32f769-discoPatrice Chotard2019-06-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allow to get console output in SPL for stm32f769-disco. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | | | | rockchip: rk3399: Enable TPL_BOARD_INITJagan Teki2019-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable TPL_BOARD_INIT, this would help us to show TPL boot prints. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | | | rockchip: rk3399: tpl: Mark printascii into debugJagan Teki2019-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, we have spl_board_init which has TPL banner prints. So mark the 'U-Boot TPL board init' print into debug. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | | | rockchip: rk3399: tpl: Add spl_board_initJagan Teki2019-06-261-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add spl_board_init for TPL, that have TPL banner will help to print tpl boot prints. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | | | rockchip: rk3399: Enable SPL_BOARD_INITJagan Teki2019-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPL_BOARD_INIT globally to rk3399, this would help to print the SPL banner during bootup. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | | | rockchip: rk3399: Move u-boot, dm-pre-reloc of uart0, uart2Jagan Teki2019-06-263-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot,dm-pre-reloc for uart0, uart2 indeed u-boot specific properties. Move them into rk3399-u-boot.dtsi so the boards which enabled these node will available during SPL. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit (git 2.34.1) at 2025-01-16 18:57:45 +0000