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* CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always definedStefan Roese2020-08-261-2/+0
| | | | | | | | | | | | | | Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") & commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"), CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default). It makes no sense to still carry code that is guarded with "#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes all these unreferenced code paths. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-08-2535-2/+28173
|\ | | | | | | | | | | | | - Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel) - Infrastructure changes to PCI uclass to support these SoC's (Suneel) - Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel) - Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
| * arm: octeontx2: Add support for OcteonTX2 SoC platformsSuneel Garapati2020-08-258-0/+191
| | | | | | | | | | | | | | | | | | This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * arm: octeontx: Add support for OcteonTX SoC platformsSuneel Garapati2020-08-257-0/+187
| | | | | | | | | | | | | | | | | | This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * arm: octeontx2: Add headers for OcteonTX2Suneel Garapati2020-08-2513-0/+25948
| | | | | | | | Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * arm: octeontx: Add headers for OcteonTXSuneel Garapati2020-08-257-0/+1828
| | | | | | | | | | Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: include/asm/io.h: Add 64bit clrbits and setbits helpersSuneel Garapati2020-08-251-0/+16
| | | | | | | | | | | | | | Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati2020-08-251-2/+3
| | | | | | | | | | | | | | | | | | | | Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
* | Merge tag 'u-boot-rockchip-20200820' of ↵Tom Rini2020-08-252-1/+16
|\ \ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3399 evb sdcard support - Fix for SPL_LED support
| * | rockchip: rk3188: Fix the code support for SPL_LEDKever Yang2020-08-211-1/+3
| | | | | | | | | | | | | | | | | | Fix the build error for the wrong code when CONFIG_SPL_LED is enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: dts: rk3399-evb: add sdmmc nodeKever Yang2020-08-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | The sdmmc node is missing after the dts sync patch: 167efc2c7a arm64: dts: rk3399: Sync v5.7-rc1 from Linux But we still need it for boot from SD card, so add it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2020-08-254-2/+41
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
| * | | cmd: provide command sbiHeinrich Schuchardt2020-08-252-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a command to display information about the SBI implementation. The output might look like: => sbi SBI 0.2 OpenSBI Extensions: sbi_set_timer sbi_console_putchar sbi_console_getchar sbi_clear_ipi sbi_send_ipi sbi_remote_fence_i sbi_remote_sfence_vma sbi_remote_sfence_vma_asid sbi_shutdown SBI Base Functionality Timer Extension IPI Extension RFENCE Extension Hart State Management Extension The command can be used to construct a unit test checking that the communication with the SEE is working. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
| * | | riscv: fix building with CONFIG_SPL_SMP=nHeinrich Schuchardt2020-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building with CONFIG_SPL_SMP=n results in: arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’: arch/riscv/lib/spl.c:33:6: error: unused variable ‘ret’ [-Werror=unused-variable] 33 | int ret; | ^~~ Define the variable ret as __maybe_unused. Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL") Fixes: 8c59f2023cc8 ("riscv: add SPL support") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
| * | | riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng2020-08-251-1/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | At present fdtdec_get_addr() is used to get L2 cache controller base address. This only works for a fixed #address-cells and #size-cells. Change to use fdtdec_get_addr_size_auto_parent() instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
* | | arm: dts: mt7623: add USB nodesFrank Wunderlich2020-08-242-0/+62
| | | | | | | | | | | | | | | | | | | | | This adds USB nodes for MT7623/BPI-R2 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
* | | arm: dts: mt7622: add USB nodesFrank Wunderlich2020-08-243-0/+72
| | | | | | | | | | | | | | | | | | | | | Add DTS nodes for MT7622/BPI-R64 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
* | | arm: dts: rename mt7622-bpi-r64.dtsFrank Wunderlich2020-08-242-1/+1
| | | | | | | | | | | | | | | | | | | | | rename mt7622-bpi-r64.dts to mt7622-bananapi-bpi-r64.dts to follow naming convensions Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* | | board: armltd: Add support for Total Compute platformUsama Arif2020-08-244-1/+62
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Total Compute is based on ARM architecture and has the following features enabled in u-boot: - PL011 UART - PL180 MMC - NOR Flash - FIT image with Signature - AVB Signed-off-by: Usama Arif <usama.arif@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'dm-pull-22aug20' of ↵Tom Rini2020-08-233-4/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm replace devfdt_get_addr_ptr() with dev_read_addr_ptr() binman fixes for portage various minor fixes 'bind' command improvements
| * | sandbox: u-boot.lds: Remove bogus __bss_start symbolOvidiu Panait2020-08-222-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sections described in the sandbox linker script are inserted before data section via "INSERT BEFORE .data;". Running readelf -S on sandbox u-boot binary shows that the bss section is located after the data section: Section Headers: [Nr] Name Type Address Offset Size EntSize Flags Link Info Align ... [25] .u_boot_list PROGBITS 000000000041d1c8 0021d1c8 000000000000dd90 0000000000000000 WA 0 0 8 [26] _u_boot_sandbox_g PROGBITS 000000000042af58 0022af58 00000000000000a0 0000000000000000 WA 0 0 8 [27] .data PROGBITS 000000000042b000 0022b000 000000000000f708 0000000000000000 WA 0 0 32 [28] .bss NOBITS 000000000043a720 0023a708 0000000000018930 0000000000000000 WA 0 0 32 This means that the __bss_start assignment in the linker script is bogus, as the actual bss section start is located elsewhere. Remove this assignment, as the __bss_start symbol is not used on sandbox anyway. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
| * | sandbox: dts: Add compatible string for bind-test nodePatrice Chotard2020-08-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Usage of lists_bind_fdt() in bind command imposes to add a compatible string for bind-test node. Others impacts are: - bind-test node is binded at sandbox start, so no need to bind it in test_bind_unbind_with_node() test. - As explained just above, after sandbox start, now a phy exist. In test/dm/phy.c, it was verified that a third phy didn't exist, now we must verified that a fourth phy doesn't exist. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_NETCONSOLE to KconfigTom Rini2020-08-231-1/+0
|/ / | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NETCONSOLE Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'xilinx-for-v2020.10-rc3' of ↵Tom Rini2020-08-2028-45/+57
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2020.10-rc3 - Fix fdtfile variable setup - Fix bootm_*/fdt_high/initrd_high variables handling - Fix Kconfig dependencies for Xilinx drivers - Fix booting u-boot from lowest memory - Fix firmware payload argument count for Versal - Fix dfu configurations - Fix mio_bank property handling - Fix and align code around ID detection - Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG - Simplify logic around reading MAC from eeprom - Decrease malloc length for zynqmp mini qspi - Enable preboot for ZynqMP and Versal i2c: - Fix i2c eeprom partitions handling mmc: - Fix logic around HS mode enabling and use proper functions
| * xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIGMichal Simek2020-08-201-0/+3
| | | | | | | | | | | | | | Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating variables with run time information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: zynqmp: remove chip_id functionIbai Erkiaga2020-08-201-1/+0
| | | | | | | | | | | | | | | | | | Remove chip_id function and integrate the firmware call in the zynqmp_get_silicon_idcode_name function. The change avoids querying the firmware twice and makes the code bit more clear. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: zynqmp: synchronize firmware call return payloadIbai Erkiaga2020-08-202-4/+0
| | | | | | | | | | | | | | | | | | Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the firmware driver. Additionally fixes payload buffer declarations without macro usage Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: Fix xlnx,mio_bank propertyMichal Simek2020-08-2022-29/+29
| | | | | | | | | | | | | | | | | | | | | | s/xlnx,mio_bank/xlnx,mio-bank/g DT binding is describing mio-bank not mio_bank that's why fix all DTSes and also driver itself. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Peng Fan <peng.fan@nxp.com>
| * i2c: eeprom: Use reg property instead of offset and sizeMichal Simek2020-08-203-11/+24
| | | | | | | | | | | | | | | | Remove adhoc dt binding for fixed-partition definition for i2c eeprom. fixed-partition are using reg property instead of offset/size pair. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * versal: fix versal PM ret payload sizeIbai Erkiaga2020-08-201-1/+1
| | | | | | | | | | | | | | | | | | The PM return payload size is defined as 4 bytes for Versal arquitecture while the PM calls implemented both in the Versal clock driver and ZynqMP firmware driver expects 5 bytes length. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: versal: Add new versal loadpdi commandT Karthik Reddy2020-08-201-0/+1
| | | | | | | | | | | | | | | | Versal loadpdi command is used for loading secure & non-secure pdi images. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | dts: r64: add sata- and asm_sel nodesFrank Wunderlich2020-08-192-0/+41
| | | | | | | | | | | | | | | | | | | | | | asm_sel is for switching between sata and pcie mode on r64 there is GPIO90 connected to ASM1480 which switches RX/TX pairs to PCIe/SATA connector output-low means sata-controller is active with 2020-10 now reg is also needed for the phy itself Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* | arm: dts: mt7622: add PCIe nodes for BananaPi-R64Frank Wunderlich2020-08-191-0/+31
| | | | | | | | | | | | | | | | this patch adds PCIe-Nodes for BananaPi R64 original nodes from Chuanjia Liu for mt7622-rfb Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* | dts: r64: add r64 dtsFrank Wunderlich2020-08-192-0/+207
| | | | | | | | | | | | add a separate DTS for BananaPi R64 because it has 1GB RAM and SATA-Support Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* | arm: dts: add watchdog-node for mt7622Frank Wunderlich2020-08-191-0/+5
| | | | | | | | | | | | adding a watchdog-node to mt7622 dtsi Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* | arm: dts: mediatek: add PCIe node for MT7622Chuanjia Liu2020-08-192-0/+103
| | | | | | | | | | | | | | This patch adds PCIe node in dts for Mediatek MT7622 Soc. Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com> Signed-off-by: Henry Yen <henry.yen@mediatek.com>
* | arm: dts: mediatek: add pciesys support for MT7622 SoCChuanjia Liu2020-08-191-0/+7
|/ | | | | | | This patch adds pciesys support in dts for MediaTek MT7622 SoC. Signed-off-by: Henry Yen <henry.yen@mediatek.com> Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
* ARM: dts: uniphier: resync DT with Linux 5.9-rc1Masahiro Yamada2020-08-1818-61/+235
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: use FIELD_GET() to get access to revision register fieldsMasahiro Yamada2020-08-182-11/+15
| | | | | | Define register fields as macros, and use FIELD_GET(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unneeded header inclusion from board_late_init.cMasahiro Yamada2020-08-181-2/+1
| | | | | | | | | | <nand.h> is unneeded since commit 9248a78f40d6 ("ARM: UniPhier: remove Denali NAND controller fixup code"). <linux/io.h> is uneeded since commit 1320fa2e55d2 ("ARM: uniphier: remove workaround for the NAND write protect"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unused uniphier_pin_init()Masahiro Yamada2020-08-183-32/+0
| | | | | | | This function is unused since commit 862274913f8f ("bus: uniphier-system-bus: move hardware init from board files"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* xen: Port Xen bus driver from mini-osOleksandr Andrushchenko2020-08-141-0/+1
| | | | | | | Make required updates to run on u-boot and strip test code. Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
* serial: serial_xen: Add Xen PV serial driverPeng Fan2020-08-141-0/+1
| | | | | | | | | | | | | Add support for Xen para-virtualized serial driver. This driver fully supports serial console for the virtual machine. Please note that as the driver is initialized late, so no banner nor memory size is visible. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* xen: Port Xen hypervisor related code from mini-osOleksandr Andrushchenko2020-08-142-0/+92
| | | | | | | | | | | | | | | | | | | | | | Port hypervisor related code from Mini-OS. This is referencing the code of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for ARM64. Update essential arch code to support required bit operations, memory barriers etc. Copyright for the bits ported belong to at least the following authors, please see related files for details: Copyright (c) 2002-2003, K A Fraser Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com> [1] - https://github.com/zyzii/mini-os.git Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> [trini: Drop wmb() from musb-net/linux-compat.h now] Signed-off-by: Tom Rini <trini@konsulko.com>
* board: Introduce xenguest_arm64 boardAndrii Anisov2020-08-147-0/+155
| | | | | | | | | | | | | | | | Introduce a minimal Xen guest board running as a virtual machine under Xen Project's hypervisor [1], [2]. Part of the code is ported from Xen mini-os and also uses work initially done by different authors from NXP: please see relevant files for their copyrights. [1] https://xenbits.xen.org [2] https://wiki.xenproject.org/ Signed-off-by: Andrii Anisov <andrii_anisov@epam.com> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
* include/configs: aspeed: Remove hardcoded variablesChia-Wei, Wang2020-08-141-0/+20
| | | | | | | | | The hardcoded platform variables such as DRAM base address are not common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces those hardcoded with macros defined in a newly added header, where the basic SoC HW information are assigned accordingly. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
* cosmetic: aspeed: ast2500: Rename board fileChia-Wei, Wang2020-08-143-1/+2
| | | | | | | Rename the ast2500-board.c to board_common.c and place the renamed file under the ast2500 folder. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
* aspeed: ast2500: Add lowlevel_init assemblyChia-Wei, Wang2020-08-143-25/+42
| | | | | | | | | | | | The original lowlevel_init function of AST2500 is written in C. However, the C runtime environment is not ready until _main execution. This patch adds the assembly version of the lowlevel_init function. Additional initialization to DRAM configuration and LPC reset source are also added. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
* riscv: additional crash informationHeinrich Schuchardt2020-08-141-22/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an exception occurs, the relocated program counter and return address are required for an analysis. With this patch you get: => exception undefined Unhandled exception: Illegal instruction EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted We can use the relocated addresses to find the involved functions in u.boot.map: .text.do_undefined 0x0000000080007908 0x8 cmd/built-in.o .text.cmd_process 0x000000008000dfcc 0x11a common/built-in.o 0x000000008000dfcc cmd_process If an exception occurs in an UEFI binary additionally the load addresses of the UEFI binaries are needed. With this patch: => setenv efi_selftest exception => bootefi selftest Unhandled exception: Illegal instruction EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest' UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi' The value pc=0x18a matches the position of the illegal instruction in efi_selftest_miniapp_exception.efi (loaded as /bug.efi); asm volatile (".word 0xffffffff\n"); 00000180 93 85 C5 11 1C 64 22 85 82 97 FF FF FF FF 1C 64 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sean Anderson <seanga2@gmail.com> Tested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
* riscv: sifive: fu540: redundant initializationHeinrich Schuchardt2020-08-141-1/+1
| | | | | | | | | | | We should not initialize a variable if the value is overwritten before being read. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
generated by cgit (git 2.34.1) at 2025-02-06 20:38:38 +0000