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* libfdt: Bring in upstream stringlist functionsSimon Glass2016-10-133-12/+12
| | | | | | | | | | | | | | These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-10-122-17/+29
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| * sandbox/fs: Set correct filetype for unknown filetypeStefan Brüns2016-10-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | The "hostfs ls" command prefixes each directory entry with either DIR, LNK or " " if it is a directory, symlink resp. regular file, or "???" for any other or unknown type. The latter only works if the type is set correctly, as the entry defaults to OS_FILET_REG and e.g. socket files show up as regular files. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
| * sandbox: Use the address in readl/writel() functionsSimon Glass2016-10-111-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present these functions do not touch addr, which can raising warnings about unused variables. This fixes the following warnings: sandbox_spl defconfig drivers/core/regmap.c: In function ‘regmap_read’: drivers/core/regmap.c:125:12: warning: unused variable ‘ptr’ [-Wunused-variable] uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); ^ drivers/core/regmap.c: In function ‘regmap_write’: drivers/core/regmap.c:134:12: warning: unused variable ‘ptr’ [-Wunused-variable] uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 3bfb8cb4 (dm: regmap: Implement simple regmap_read & regmap_write)
| * sandbox/fs: Use readdir instead of deprecated readdir_rStefan Brüns2016-10-111-8/+11
| | | | | | | | | | | | | | | | Using readdir_r limits the maximum file name length and may even be unsafe, and is thus deprecated in since glibc 2.24. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
| * sandbox/fs: Use correct size path name bufferStefan Brüns2016-10-111-3/+10
| | | | | | | | | | | | | | | | | | The readdir linux manpage explicitly states (quoting POSIX.1) that sizeof(d_name) is not correct for determining the required size, but to always use strlen. Grow the buffer if needed. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
| * sandbox/fs: Make linking of nodes in os_dirent_ls more obviousStefan Brüns2016-10-111-2/+2
| | | | | | | | | | | | | | | | | | Previously, after reading/creating the second dirent, the second entry would be chained to the first entry and the first entry would be linked to head. Instead, immediately link the first entry to head. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-10-1228-1075/+202
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| * | x86: coreboot: Convert to use DM coreboot video driverBin Meng2016-10-128-4/+11
| | | | | | | | | | | | | | | | | | | | | This converts coreboot to use DM framebuffer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: mrccache: Fix error handling in mrccache_get_region()Simon Glass2016-10-111-3/+5
| | | | | | | | | | | | | | | | | | | | | This should return normal errors, not device-tree errors. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Drop unused init_helper functionsSimon Glass2016-10-112-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ivybridge: Tidy up enable_clock_gating() for 64-bitSimon Glass2016-10-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Fix the hex case and remove unused brackets. Use ~0U instead of ~0UL to allow compilation on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ivybridge: Fix PCH power setupSimon Glass2016-10-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | At present pch_power_options() has the arguments to writel() around the wrong way. Fix this and update it to compile on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Correct address casts in interrupt codeSimon Glass2016-10-111-2/+2
| | | | | | | | | | | | | | | | | | | | | We should cast an address to unsigned long, not u32. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Correct address casts in cpu codeSimon Glass2016-10-111-6/+4
| | | | | | | | | | | | | | | | | | | | | We should cast an address to unsigned long, not u32. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Allow interrupts to be disabled in 64-bit modeSimon Glass2016-10-111-1/+4
| | | | | | | | | | | | | | | | | | | | | Update the code to support both 32-bit and 64-bit modes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | dm: x86: Move link to use driver model for videoSimon Glass2016-10-119-1035/+0
| | | | | | | | | | | | | | | | | | | | | | | | Update the configuration to use the new driver. Drop the existing plumbing code and unused header files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | dm: x86: Move samus to use new driver model supportSimon Glass2016-10-111-1/+0
| | | | | | | | | | | | | | | | | | | | | Update the samus driver to avoid the direct call to the video BIOS setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Add an accelerated memmove() functionSimon Glass2016-10-112-1/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | Bring in a faster memmove() from Linux 4.7. This speeds up scrolling on the display. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Fix Linux v4.7+ zimage booting (update bootparam.h)Stefan Roese2016-10-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting Linux kernel v4.7+ does not work since Linux kernel commit 974f221c "x86/boot: Move compressed kernel to the end of the decompression buffer". This patch adds the latest version of the setup_header struct, adding "init_size" which is needed since this commit referenced above. With this patch, booting Linux v4.8-rc8 does work again on x86 boards. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: baytrail: Add 2nd eMMC controller to the PCI probe listStefan Roese2016-10-111-2/+3
| |/ | | | | | | | | | | | | | | | | | | With this addition, the eMMC device available on the congatec and DFI BayTrail SoM is detected correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-10-122-43/+76
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| * | ARM: tegra: reduce DRAM size mapped into MMU on ARM64Stephen Warren2016-10-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM CPUs can architecturally (speculatively) prefetch completely arbitrary normal memory locations, as defined by the current translation tables. The current MMU configuration for 64-bit Tegras maps an extremely large range of addresses as DRAM, well beyond the actual physical maximum DRAM window, even though U-Boot only needs access to the first 2GB of DRAM; the Tegra port of U-Boot deliberately limits itself to 2GB of RAM since some HW modules on at least some 64-bit Tegra SoCs can only access a 32-bit physical address space. This change reduces the amount of RAM mapped via the MMU to disallow the CPU from ever speculatively accessing RAM that U-Boot will definitely not access. This avoids the possibility of the HW raising SError due to accesses to always-invalid physical addresses. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | colibri_t20: fix usb operation and controller orderMarcel Ziswiler2016-10-101-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch the following error will be shown: Colibri T20 # usb start starting USB... No controllers found This patch fixes USB operation and also the controller order as the CI UDC driver may only be instantiated on the first aka OTG port. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | colibri_t20: fix display configurationMarcel Ziswiler2016-10-101-20/+51
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch the following error will be shown: stdio_add_devices: Video device failed (ret=-22) As commit ec5507707a1d1e84056a6c864338f95f6118d3ca (video: tegra: Move to using simple-panel and pwm-backlight) states the Colibri T20 needs updating too which this patch finally attempts doing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-10-121-21/+43
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| * | sunxi: Fix H3 DRAM impedance calibration on rev. A chipsJens Kuske2016-10-101-21/+43
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | H3 seems to have a silicon bug breaking the impedance calibration. This is currently worked around in software by multiple steps combining the results to replace the wrong values. Revision A chips need a different workaround, which is present in the vendor bootloader too, but got overlooked in lack of information and affected boards till now. This commit adds a simplified version without correction factor, which would be 1.00 for all known boards anyway. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-10-128-337/+372
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| * | reset: uniphier: add reset controller driver for UniPhier SoCsMasahiro Yamada2016-10-101-0/+1
| | | | | | | | | | | | | | | | | | | | | This is the initial commit for UniPhier reset controller driver. Most code was ported from Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: insert udelay() just before support_card_reset_deassert()Masahiro Yamada2016-10-101-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | As for LD11/LD20, we can no longer rely on the udelay() in the PLL init functions. udelay(200) is needed here to keep the ethernet device in the reset state for enough time. Anyway, 200 usec is quite short for humans, so nobody cares it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: add work-around for VBO noise problemMasahiro Yamada2016-10-101-0/+7
| | | | | | | | | | | | | | | | | | | | | Raise the VDD09 voltage line to 1.0V to suppress VBO noise. This errata work-around code is needed only for ES1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: update DRAM init code for LD20 SoC (2nd)Masahiro Yamada2016-10-102-333/+356
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Do not reference CONFIG_DDR_FREQ; now the DDR frequency is passed from the uniphier_board_data structure - Constify parameter arrays - Tidy up cluttered macros - Lots of code cleanups - Lots of coding style fixes Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoCMasahiro Yamada2016-10-101-0/+1
| | | | | | | | | | | | | | | | | | For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: do not setup pins for System Bus on NAND boot modeMasahiro Yamada2016-10-102-2/+6
| |/ | | | | | | | | | | | | | | | | For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-10-121-0/+4
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| * | arm: kirkwood: add support for Synology DS109 boardWalter Schweizer2016-10-091-0/+4
| |/ | | | | | | | | | | | | | | | | Synology DS109 is based on MV88F6281. The code is based on Dreamplug code with modificatons from Synologys open source repository. Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-10-1216-58/+338
|\ \ | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
| * | armv8: ls2080a: Add USB node in dts for ls2080aSriram Dash2016-10-071-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | Add the USB node for LS2080a in dts. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> [York Sun: replace ls2080 with ls2080a in commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv7: ls1021a: Move DDR config options to KconfigYork Sun2016-10-062-10/+47
| | | | | | | | | | | | | | | | | | | | | | | | Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | armv8: fsl-layerscape: Move DDR config options to KconfigYork Sun2016-10-062-14/+54
| | | | | | | | | | | | | | | | | | | | | | | | Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun2016-10-064-7/+27
| | | | | | | | | | | | | | | | | | | | | Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Move FSL_HAS_DP_DDR and NUM_DDR_CONTROLLERS to KconfigYork Sun2016-10-062-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. NUM_DDR_CONTROLLERS is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Move SYS_FSL_IFC_BANK_COUNT to KconfigYork Sun2016-10-063-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. This option is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Move MAX_CPUS to KconfigYork Sun2016-10-064-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Move FSL_LSCH2 FSL_LSCH3 to KconfigYork Sun2016-10-063-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: Fix Kconfig for proper display menuYork Sun2016-10-062-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | Some config options should not have prompt. They are selected by choosing target. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | armv8: fsl: Enable USB only when SYSCLK is 100 MHzSriram Dash2016-10-061-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | SYSCLK is used as a reference clock for USB. When the USB controller is used, SYSCLK must meet the additional requirement of 100 MHz. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043: Add USB node in dts for ls1043Sriram Dash2016-10-061-0/+21
| | | | | | | | | | | | | | | | | | | | | Add the USB node for LS1043 in dts. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539Hou Zhiqiang2016-10-063-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * | ARMv7: LS102xA: Move two macros from header files to KconfigHongbo Zhang2016-10-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following commits 217f92b and 1544698, these two config CPU_V7_HAS_NONSEC and CPU_V7_HAS_VIRT are moved to Kconfig, for correctly select ARMV7_PSCI. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit (git 2.34.1) at 2024-11-11 08:36:02 +0000