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* board_f: fix noncached reservation calculationStephen Warren2019-08-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code in reserve_noncached() has two issues: 1) The first update of gd->start_addr_sp always rounds down to a section start. However, the equivalent calculation in cache.c:noncached_init() always first rounds up to a section start, then subtracts a section size. These two calculations differ if the initial value is already rounded to section alignment. 2) The second update of gd->start_addr_sp subtracts exactly CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in cache.c:noncached_init() rounds the noncached size up to section alignment before subtracting it. The two calculations differ if the noncached region size is not a multiple of the MMU section size. In practice, one/both of those issues causes a practical problem on Jetson TX1; U-Boot triggers a synchronous abort during initialization, likely due to overlapping use of some memory region. This change fixes both these issues by duplicating the exact calculations from noncached_init() into reserve_noncached(). However, this fix assumes that gd->start_addr_sp on entry to reserve_noncached() exactly matches mem_malloc_start on entry to noncached_init(). I haven't traced the code to see whether it absolutely guarantees this in all (or indeed any!) cases. Consequently, I added some comments in the hope that this condition will continue to be true. Fixes: 5f7adb5b1c02 ("board_f: reserve noncached space below malloc area") Cc: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini2019-08-2917-0/+429
|\ | | | | | | | | Enable DM PCI for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, and MPC8548CDS
| * MPC8548: dts: Added PCIe DT nodeHou Zhiqiang2019-08-283-0/+21
| | | | | | | | | | | | | | | | | | | | MPC8548 integrated a PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for the PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P5040: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | | | | | | | | | | | P5040 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P4080: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | | | | | | | | | | | P4080 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P3041: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | | | | | | | | | | | P3041 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P2041: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | | | | | | | | | | | P2041 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P2020: dts: Added PCIe DT nodesHou Zhiqiang2019-08-283-0/+64
| | | | | | | | | | | | | | | | | | | | P2020 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * P1020: dts: Added PCIe DT nodesHou Zhiqiang2019-08-284-0/+56
| | | | | | | | | | | | | | | | | | | | P1020 integrated 2 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * t104x: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | | | | | | | | | | | T104x integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * t102x: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | | | | | | | | | | | T102x integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * t4240: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | | | | | | | | | | | T4240 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 3.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* | Merge branch 'u-boot-stm32_20190827' of ↵Tom Rini2019-08-2730-660/+1368
|\ \ | |/ |/| | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Fixes and update related to STM32MP1 platforms
| * stm32mp1: Add remoteproc support for m4 coprocessorPatrick Delaunay2019-08-273-0/+32
| | | | | | | | | | | | | | | | | | Alignment with kernel patch proposal for binding: [PATCH v4 0/8] stm32 m4 remoteproc on STM32MP157c https://lkml.org/lkml/2019/5/14/159 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * bsec: update after MISC u-class updatePatrick Delaunay2019-08-271-14/+16
| | | | | | | | | | | | | | | | Since the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered"); The misc bsec driver need to be adapted to reflect the number of transferred bytes. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: Makefile cleanupPatrick Delaunay2019-08-271-1/+2
| | | | | | | | | | | | Don't compile psci for SPL build. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: board: Update the way vdd-supply is retrieved from DTPatrick Delaunay2019-08-273-3/+12
| | | | | | | | | | | | | | | | Due to kernel DT alignment, pwr-supply is renamed to vdd-supply and is a subnode of pwr-regulators. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: board: support of error led on ed1/ev1 boardPatrick Delaunay2019-08-271-15/+6
| | | | | | | | | | | | | | Create a function led_error_blink and add node in device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: board: enable v1v2_hdmi and v3v3_hdmi regulator on dk2 bootPatrick Delaunay2019-08-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | As for Audio codec IC, HDMI IC is not "IO safe". HDMI regulators (v3v3 and v1v2) must be enabled to allow I2C1 bus usage. HDMI IC must be under reset during power up and keep HDMI and AUDIO devices in reset while they are not used in U-Boot to keep them in low power mode (each device can be kept in reset independently keeping their power supplies ON until kernel). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: add spi load support in splPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | | | | | | | Add the boot for NOR, SPL load U-Boot.img at offset CONFIG_SYS_SPI_U_BOOT_OFFS = 0x80000. It is the start address of mtd partition ssbl in nor. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: add condition to activate WATCHDOG in SPLPatrick Delaunay2019-08-271-1/+1
| | | | | | | | | | | | Only activate WATCHDOG in SPL when CONFIG_WATCHDOG is activated in U-Boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: imply CONFIG_OF_LIBFDT_OVERLAYPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | | | Add imply for FDT overlay that can be usefuill for kernel device tree management but it is not mandatory (can be removed to gain space) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: Activate DISABLE_CONSOLEPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | Activate DISABLE_CONSOLE needed for stm32prog support on uart. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: select CONFIG_STM32_SERIALPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | Select the serial driver mandatory for the console. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: activate PRE_CONSOLE_BUFFERPatrick Delaunay2019-08-271-0/+8
| | | | | | | | | | | | Correctly handle silent=1 in the default environment. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stm32mp1: configs: activate CONFIG_SILENT_CONSOLEPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | | | Allow to disable console with environment variable 'silent': > env set silent 1; env save Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * stpmic1: program pmic to keep only the debug unit onPatrick Delaunay2019-08-271-0/+1
| | | | | | | | | | | | | | | | | | | | Depending on backup register value, we maintain the debug unit powered-on for debugging purpose. Only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: add pull-up on serial rx of console connected to STLINKPatrick Delaunay2019-08-272-0/+4
| | | | | | | | | | | | | | | | | | Avoid U-Boot auto-boot interruption for line break detection on console when the RX line connected to STLINK is floating (-IO error in getc cause by framing error and testc return 1) Same workaround is applied on all the STMicroelectonics board. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: add key support on DK1/DK2Patrick Delaunay2019-08-271-0/+2
| | | | | | | | | | | | | | Allow to use PA13 and PA14 to force fastboot mode or STM32CubeProgrammer mode. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: add ldtc pre-reloc proper in SOC filePatrick Delaunay2019-08-271-0/+5
| | | | | | | | | | | | | | | | The pre-relocation probe is needed to reserve video frame buffer in video_reserve() for all the board; LDTC must be tagged prereloc in SOC U-Boot dtsi file. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: Add PSCI node access before relocationPatrick Delaunay2019-08-271-0/+5
| | | | | | | | | | | | | | | | Add node in DT and avoid error to search UCLASS_SYSRESET in board_f.c::print_resetinfo() and lost 1.6s in U-Boot for the trusted boot chain. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: Add iwdg2 support for SPLPatrick Delaunay2019-08-271-0/+4
| | | | | | | | | | | | | | | | This patch adds independent watchdog support for stm32mp157c in SPL. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: DDR config v1.45Patrick Delaunay2019-08-272-5/+4
| | | | | | | | | | | | | | | | Update DDR configuration with the latest update: - Change DQSGE to 1 for DDR3, to cure missing DQS preamble. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: sync device tree with v5.3-rc2Patrick Delaunay2019-08-2711-60/+885
| | | | | | | | | | | | | | Synchronize device tree with v5.3-rc2 label and update the associated u-boot dtsi. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stih410-b2260: Sync DT with kernel v5.2Patrice Chotard2019-08-278-561/+370
| | | | | | | | | | | | | | Synchronize U-boot DT with kernel v5.2 for stih410-b2260. Update stih410-b2260-u-boot.dtsi accordingly. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini2019-08-2733-0/+1066
|\ \ | |/ |/| | | | | | | Support of device tree model for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and MPC8548CDS. Also support of i2c dm model.
| * powerpc: Enable device tree support for MPC8548CDSHou Zhiqiang2019-08-265-0/+101
| | | | | | | | | | | | | | | | Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESSHou Zhiqiang2019-08-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_RESET_VECTOR_ADDRESS definition with the default value in u-boot.dtsi to fix the build error below. In the configuration header file of some MPC85xx boards, there is not the definition of CONFIG_RESET_VECTOR_ADDRESS, while CONFIG_SYS_MPC85XX_NO_RESETVEC is also not defined. In this case, it will lack of definition of CONFIG_RESET_VECTOR_ADDRESS in u-boot.dtsi, and the address 0xfffffffc will be used as the boot page by default. Error log: DTC arch/powerpc/dts/mpc8548cds.dtb DTC arch/powerpc/dts/mpc8548cds_36b.dtb Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error FATAL ERROR: Unable to parse input tree Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error FATAL ERROR: Unable to parse input tree scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds.dtb' failed make[2]: *** [arch/powerpc/dts/mpc8548cds.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds_36b.dtb' failed make[2]: *** [arch/powerpc/dts/mpc8548cds_36b.dtb] Error 1 dts/Makefile:38: recipe for target 'arch-dtbs' failed make[1]: *** [arch-dtbs] Error 2 Makefile:1038: recipe for target 'dts/dt.dtb' failed make: *** [dts/dt.dtb] Error 2 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P5040DSHou Zhiqiang2019-08-263-0/+81
| | | | | | | | | | | | | | | | Add device tree for P5040DS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P4080DSHou Zhiqiang2019-08-263-0/+102
| | | | | | | | | | | | | | | | Add device tree for P4080DS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P3041DSHou Zhiqiang2019-08-263-0/+82
| | | | | | | | | | | | | | | | Add device tree for P3041DS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P2041RDBHou Zhiqiang2019-08-264-0/+115
| | | | | | | | | | | | | | | | | | Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P2020RDBHou Zhiqiang2019-08-265-0/+105
| | | | | | | | | | | | | | | | | | Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for P1020RDBHou Zhiqiang2019-08-267-0/+155
| | | | | | | | | | | | | | | | | | Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for T1042D4RDBHou Zhiqiang2019-08-263-0/+80
| | | | | | | | | | | | | | | | | | Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for T1024RDBHou Zhiqiang2019-08-264-0/+104
| | | | | | | | | | | | | | | | | | Add device tree for T1024RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for T4240RDBHou Zhiqiang2019-08-263-0/+120
| | | | | | | | | | | | | | | | Add device tree for T4240RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * powerpc: Enable device tree support for T2080RDBHou Zhiqiang2019-08-262-0/+18
| | | | | | | | | | | | | | | | | | Add device tree for T2080RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* | Merge branch '2019-08-26-master-imports'Tom Rini2019-08-261-12/+14
|\ \ | | | | | | | | | - Assorted minor bugfixes
| * | ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin muxAdam Ford2019-08-261-12/+14
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | When the pinmux configuration was added, it was accidentally placed into the omap3_pmx_wkup node when it should have been placed into the omap3_pmx_core. This error was accidentally propagated to U-Boot by me when I blindly copied the device tree from Linux. This patch moves the i2c2_pins and i2c3_pins to the correct node which should eliminate i2c bus errors and timeouts due to the fact the bootloader uses the save device tree that no longer properly assigns these pins. Signed-off-by: Adam Ford <aford173@gmail.com>
generated by cgit (git 2.34.1) at 2025-04-25 12:24:58 +0000