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* sandbox: imply SCP03 and CMD_SCP03Igor Opaniuk2021-03-141-0/+2
| | | | | | | Enable by default SCP_03/CMD_SCP03 for sandbox target. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: Update os_find_u_boot() to find the .img fileSimon Glass2021-03-122-4/+6
| | | | | | | | | | | | | At present this function can only locate the u-boot ELF file. For SPL it is handy to be able to locate u-boot.img since this is what would normally be loaded by SPL. Add another argument to allow this to be selected. While we are here, update the function to load SPL when running in TPL, since that is the next stage. Signed-off-by: Simon Glass <sjg@chromium.org>
* test: Allow SPL to run any available testSimon Glass2021-03-121-2/+5
| | | | | | | At present SPL only runs driver model tests. Update it to run all available tests, i.e. in any test suite. Signed-off-by: Simon Glass <sjg@chromium.org>
* test: Rename test-main.c to test-dm.cSimon Glass2021-03-121-1/+1
| | | | | | | This is the main test function for driver model but not for other tests. Rename the file and the function so this is clear. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Drop the 'starting...' messageSimon Glass2021-03-121-1/+0
| | | | | | | This message is annoying since it is only useful for testing. Drop it and update the test to cope. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'next-2021-03-04' of ↵Tom Rini2021-03-041-4/+5
|\ | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video into next - convert sunxi_display to DM_VIDEO
| * video: sunxi_display: Convert to DM_VIDEOJagan Teki2021-03-031-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DM_VIDEO migration deadline is already expired, but around 80 Allwinner boards are still using video in a legacy way: ===================== WARNING ====================== This board does not use CONFIG_DM_VIDEO Please update the board to use CONFIG_DM_VIDEO before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Convert the legacy video driver over to the DM_VIDEO framework. This is a minimal conversion: it doesn't use the DT for finding its resources, nor does it use DM clocks or DM devices for the outputs (LCD, HDMI, CVBS). Tested in Bananapi M1+ Plus 1920x1200 HDMI out. (Jagan) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: rebase and smaller fixes] Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
* | gpio: Add a way to read 3-way strapping pinsSimon Glass2021-03-031-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the internal vs. external pull resistors it is possible to get 27 different combinations from 3 strapping pins. Add an implementation of this. This involves updating the sandbox GPIO driver to model external and (weaker) internal pull resistors. The get_value() method now takes account of what is driving a pin: sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the value outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the external state and we work the final state using those flags and the internal GPIOD_PULL_UP/DOWN flags Of course the outside source does not really exist in sandbox. We are just modelling it for test purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
* | gpio: sandbox: Track whether a GPIO is drivenSimon Glass2021-03-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | Add a new flag to keep track of whether sandbox is driving the pin, or whether it is expecting an input signal. If it is driving, then the value of the pin is the value being driven (0 or 1). If not driving, then we consider the value 0, since we don't currently handle things like pull-ups yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | gpio: x86: Drop the deprecated methods in intel_gpioSimon Glass2021-03-031-0/+5
| | | | | | | | | | | | | | We don't need to implement direction_input() and direction_output() anymore. Drop them and use update_flags() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | gpio: sandbox: Use a separate flag for the valueSimon Glass2021-03-031-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present with the sandbox GPIO driver it is not possible to change the value of GPIOD_IS_OUT_ACTIVE unless the GPIO is an output. This makes it hard to test changing the flags since we need to be aware of the internal workings of the driver. The feature is designed to aid testing. Split this feature out into a separate sandbox-specific flag, so that the flags can change unimpeded. This will make it easier to allow updating the flags in a future patch. Signed-off-by: Simon Glass <sjg@chromium.org>
* | gpio: sandbox: Rename GPIO dir_flags to flagsSimon Glass2021-03-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Adjust the terminology in this driver to reflect that fact that all flags are handled, not just direction flags. Create a new access function to get the full GPIO state, not just the direction flags. Drop the static invalid_dir_flags since we can rely on a segfault if something is wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | sandbox: Write out bloblist when exitingSimon Glass2021-03-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Sandbox provides a way to write out its emulated memory on exit. This makes it possible to pass a bloblist from one phase (e.g. SPL) to the next. However the bloblist is not closed off, so the checksum is generally invalid. Fix this by finishing up the bloblist before writing the memory file. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Avoid using malloc() for system stateSimon Glass2021-03-024-29/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This state is not accessible to the running U-Boot but at present it is allocated in the emulated SDRAM. This doesn't seem very useful. Adjust it to allocate from the OS instead. The RAM buffer is currently not freed, but should be, so add that into state_uninit(). Update the comment for os_free() to indicate that NULL is a valid parameter value. Note that the strdup() in spl_board_load_image() is changed as well, since strdup() allocates memory in the RAM buffer. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Add os_realloc()Simon Glass2021-03-021-0/+48
| | | | | | | | | | | | | | | | | | We provide os_malloc() and os_free() but not os_realloc(). Add this, following the usual semantics. Also update os_malloc() to behave correctly when passed a zero size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | s5p4418_nanopi2: Drop dead codeSimon Glass2021-03-022-146/+0
| | | | | | | | | | | | | | | | | | | | This code is still using the old command typedef. It was not noticed since this file is not currently built. It is using a non-existent option in the Makefile. Drop this file since it is not needed for correct operation. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: remove set_dacr/get_dacr functionsPatrick Delaunay2021-03-021-14/+0
| | | | | | | | | | | | | | | | Remove the unused function set_dacr/get_dacr Serie-cc: Ard Biesheuvel <ardb@kernel.org> Serie-cc: R Sricharan <r.sricharan@ti.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | arm: cp15: remove weak function arm_init_domainsPatrick Delaunay2021-03-023-10/+0
| | | | | | | | | | | | | | Remove the unused weak function arm_init_domains used to change the DACR value. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | arm: omap2: remove arm_init_domainsPatrick Delaunay2021-03-021-17/+0
| | | | | | | | | | | | | | Remove the arm_init_domains and the DACR update, as it is now done in ARMv7 CP15 level. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | arm: cp15: update DACR value to activate access controlPatrick Delaunay2021-03-021-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the initial value of Domain Access Control Register (DACR) and set by default the access permission to client (DACR_Dn_CLIENT = 1U) for each of the 16 domains and no more to all-supervisor (DACR_Dn_MANAGER = 3U). This patch allows to activate the domain checking in MMU against the permission bits in the translation tables and avoids prefetching issue on ARMv7 [1]. Today it was already done for OMAP2 architecture ./arch/arm/mach-omap2/omap-cache.c::arm_init_domains introduced by commit de63ac278cba ("ARM: mmu: Set domain permissions to client access") which fixes lot of speculative prefetch aborts seen on OMAP5 secure devices. [1] https://developer.arm.com/documentation/ddi0406/b/System-Level-Architecture/Virtual-Memory-System-Architecture--VMSA-/Memory-access-control/The-Execute-Never--XN--attribute-and-instruction-prefetching Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | arm: cosmetic: align TTB_SECT define valuePatrick Delaunay2021-03-021-1/+1
| | | | | | | | | | | | Align TTB_SECT define value with previous value. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGHPatrick Delaunay2021-03-021-1/+1
| | | | | | | | | | | | | | | | The normal memory (other that DCACHE_OFF) should be executable by default, only the device memory (DCACHE_OFF) used for peripheral access should have the bit execute never (TTB_SECT_XN_MASK). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | stm32mp: update the mmu configuration for SPL and prerelocPatrick Delaunay2021-03-021-10/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Overidde the weak function dram_bank_mmu_setup() to set the DDR (preloc case) or the SYSRAM (in SPL case) executable before to enable the MMU and configure DACR. This weak function is called in dcache_enable/mmu_setup. This patchs avoids a permission access issue when the DDR is marked executable (by calling mmu_set_region_dcache_behaviour with DCACHE_DEFAULT_OPTION) after MMU setup and domain access permission activation with DACR in dcache_enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | stm32mp: update MMU config before the relocationPatrick Delaunay2021-03-021-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Mark the top of ram, used for relocated U-Boot as a normal memory (cacheable and executable) to avoid permission access issue when U-Boot jumps to this relocated code. When MMU is activated in pre-reloc stage; only the beginning of DDR is marked executable. This patch avoids access issue when DACR is correctly managed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-0264-71/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Revert "lpc32xx: cpu: add support for soft reset"Harald Seiler2021-03-021-16/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 576007aec9a4a5f4f3dd1f690fb26a8c05ceb75f. The parameter passed to reset_cpu() no longer holds a meaning as all call-sites now pass the value 0. Thus, branching on it is essentially dead code and will just confuse future readers. Revert soft-reset support and just always perform a hard-reset for now. This is a preparation for removal of the reset_cpu() parameter across the entire tree in a later patch. Fixes: 576007aec9a4 ("lpc32xx: cpu: add support for soft reset") Cc: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Harald Seiler <hws@denx.de>
* | nds32: Remove dead reset_cpu() implementationHarald Seiler2021-03-021-22/+0
|/ | | | | | | | | | | | | | | | nds32 is one of the only architectures which still have a reset_cpu() implementation that makes use of the `addr` parameter. The rest of U-Boot now ignores it and passes 0 everywhere. It turns out that even here, reset_cpu() is no longer referenced anywhere; reset is either not implemented (e.g. ae3xx) or realized using a WDT (e.g. ag101). Remove this left-over implementation in preparation for the removal of the `addr` parameter in the entire tree. Cc: Rick Chen <rick@andestech.com> Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
* Merge tag 'u-boot-stm32-20210226' of ↵Tom Rini2021-02-261-80/+0
|\ | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Add USB host boot support in stm32mp1 config - Enable uefi related commands for STMicroelectronics STM32MP15 boards - Remove duplicate uart nodes in stm32mp15 device tree
| * arm: dts: stm32mp15: remove duplicate uart nodesPatrick Delaunay2021-02-261-80/+0
| | | | | | | | | | | | | | | | | | | | | | Remove duplicated uart nodes introduced with commit 62f95af92a3f ("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4"), because the uart nodes wasn't correctly ordered in alphabetic order. Only cosmetic: the generated device tree don't change. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-02-261-4/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | - turris_mox: Enhancements, mostlly defconfig changes (Pali) - pci-aardvark: Set Max Payload Size and Max Read Request Size to 512 bytes (Pali) - pci_mvebu: Minor cleanup and refactoring (Marek) - Upgrade A38x DDR3 training to version 14.0.0 (Marek)
| * | ARM: dts: armada-385-turris-omnia: rename node in -u-boot.dtsi fileMarek Behún2021-02-261-4/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI NOR flash node name in main device tree for Turris Omnia is called `spi-nor@0`. Rename node spi-flash@0 in Turris Omnia's -u-boot.dtsi file to spi-nor@0 so that U-Boot does not try to probe the same SPI NOR device multiple times. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2021-02-261-0/+2
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| * riscv: k210: Enable QSPI for spi3Sean Anderson2021-02-251-0/+2
| | | | | | | | | | | | | | | | | | This device has four IOs connected to the SPI flash. Add the appropriate bindings. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
* | ppc: Remove MPC8569MDS boardTom Rini2021-02-257-141/+3
| | | | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. As this is the last ARCH_MPC8569 board, remove that support as well. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arm: Remove sksimx6 boardTom Rini2021-02-251-6/+0
| | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | arm: Remove mx53smd boardTom Rini2021-02-251-5/+0
| | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | arm: Remove mx53ard boardTom Rini2021-02-251-5/+0
| | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | arm: Remove mx25pdk boardTom Rini2021-02-251-7/+0
| | | | | | | | | | | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | common: Add "ifndef __ASSEMBLY__" in asm/global_data.hSiew Chin Lim2021-02-241-0/+4
|/ | | | | | | | | | Commit "common: Drop asm/global_data.h from common header" added asm/global_data.h into secure.h. However, secure.h will be included by psci.S. Adding asm/global_data.h has caused compilation failure in pcsi.S. Add "ifndef __ASSEMBLY__" in asm/global_data.h. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini2021-02-231-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
| * xilinx: Show silicon version in SPLMichal Simek2021-02-101-2/+2
| | | | | | | | | | | | | | | | Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge tag 'u-boot-amlogic-20210222' of ↵Tom Rini2021-02-221-1/+27
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - adds adc-keys button driver - fix meson-saradc driver to get reference voltage - add adc-keys test for sandbox - enable adc-keys for VIM3 & VIM3L boards - fix button.h build
| * | test: add a simple test for the adc-keys button driverMarek Szyprowski2021-02-181-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add adc-keys device to the sandbox/test.dts and connect it to the channel #3 of the sandbox_adc driver. The default values sampled by sandbox_adc driver determines that button3 and button4 are released and button5 is pressed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | Merge tag 'ti-v2021.04-rc3' of ↵Tom Rini2021-02-225-61/+82
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix ethernet on J721e - Sync am335x DT nodes from Linux 5.9-rc7 - Minor Clock fixes
| * | | arch: sandbox: fix typo in clk.hDario Binacchi2021-02-221-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | arm: dts: sync am33xx-clocks with Linux 5.9-rc7Dario Binacchi2021-02-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the exception of two nodes. I think I was wrong and it is better to keep the two files similar and possibly make changes to the *-u-boot.dtsi files. Signed-off-by: Dario Binacchi <dariobin@libero.it>
| * | | arm: dts: sync am33xx gpio nodes with Linux 5.9-rc7Dario Binacchi2021-02-163-45/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move gpio controller nodes from am33xx.dtsi to am33xx-l4.dtsi. Now both files are more similar to those found in Linux 5.9-rc7. To be fully operational as before it was also necessary to fix the am33xx-clock.dtsi file. It too is now almost the same as the Linux kernel. Signed-off-by: Dario Binacchi <dariobin@libero.it>
| * | | ARM: dts: k3-j7200-common-proc-board-u-boot: Fix broken ethernetVignesh Raghavendra2021-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot") ranges have been added to CPSW node which results in U-Boot CPSW driver failing to acquire phy_gmii_sel register range and thus failing to configure GMII mode correctly. Fix this by deleting ranges in -u-boot-dtsi just like its done for other K3 platforms. Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* | | | mpc8379erdb: Add device treeSinan Akman2021-02-212-0/+75
| | | | | | | | | | | | | | | | Signed-off-by: Sinan Akman <sinan@writeme.com>
* | | | dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk2021-02-2113-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>