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* x86: apl: Enhance debugging in the SPL loaderSimon Glass2021-02-011-5/+7
| | | | | | | | Move to log_debug() and make use of the new SPL function to find the text base. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: acpi_gpe: Update driver name to match devicetreeSimon Glass2021-02-011-2/+4
| | | | | | | | Use a driver name in line with the compatible string so that of-platdata can use this driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: coral: Add a devicetree node for eMMCSimon Glass2021-02-011-0/+6
| | | | | | | | | Add a node for this so we can indicate that it is does not require any ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: coral: Support TPM and RTC in SPLSimon Glass2021-01-302-1/+22
| | | | | | | | Update the devicetree so that the TPM and RTC can be used in SPL. Also enable the pins used for getting the memory configuration settings while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: typo segementHeinrich Schuchardt2021-01-302-2/+2
| | | | | | | %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: coral: Update an unused pin to reduce powerSimon Glass2021-01-301-0/+1
| | | | | | GPIO_25 is not used on coral, so set it up in deep sleep. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini2021-01-0525-135/+238
|\ | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| * x86: Drop rtc from SPLSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | The RTC is not currently used in SPL. Drop it so that it does not take up space. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: coral: Remove unwanted nodes from SPL/TPLSimon Glass2021-01-051-6/+11
| | | | | | | | | | | | | | | | Some devices are not needed in SPL/TPL. For TPL this causes the generation of unnecessary of-platadata structs. Make some adjustments to fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Adjust how the UART gets its platform dataSimon Glass2021-01-052-20/+42
| | | | | | | | | | | | | | | | | | | | | | | | At present this driver calls malloc() to start a new platform data structure, fills it in and tells driver model to use it. We want to avoid malloc, particularly with the new version of of-platdata. Create a new struct which encompasses both the dtd struct and the ns16550 one, to avoid this. Unfortunately we must copy the data into the right place for the ns16550 driver. Add some comments about this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: sysreset: Move priv/plat structs to headersSimon Glass2021-01-051-0/+18
| | | | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them and add the dtd struct too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * x86: apl: Use struct spi_nor instead of struct spi_flashSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | This construct effectively uses struct spi_nor due to a #define in spi-nor.h so we may as well use that struct here. This allows dtoc to parse it correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Move priv/plat structs for intel_common to headersSimon Glass2021-01-054-27/+40
| | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Move priv/plat structs to headersSimon Glass2021-01-055-26/+64
| | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Fix header guard in asm/pmu.hSimon Glass2021-01-051-3/+3
| | | | | | | | | | | | This has the wrong name. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: tpl: Remove unwanted devicetree stringSimon Glass2021-01-051-1/+3
| | | | | | | | | | | | | | | | Update this driver to use of_match_ptr(). This reduces the TPL binary size by about 32 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Reduce size for TPLSimon Glass2021-01-058-11/+29
| | | | | | | | | | | | | | | | | | | | Update various drivers to use of_match_ptr() and to avoid including debug strings in TPL. Omit the WiFi driver entirely, since it is not used in TPL. This reduces the TPL binary size by about 608 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Update hostbridge to remove unwanted TPL codeSimon Glass2021-01-051-5/+9
| | | | | | | | | | | | | | | | | | At present several strings from this file appear in the TPL binary. Add preprocessor checks to drop them. This reduces the TPL binary size by about 128 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: coral: Move fsp-m settings to a subnodeSimon Glass2021-01-052-1/+9
| | | | | | | | | | | | | | | | | | At present these settings are in the node for host-bridge and so are visible in TPL as well as SPL. But they are only used for SPL. Move them to a subnode so that TPL does not included them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Move call64 into its own sectionSimon Glass2021-01-051-0/+1
| | | | | | | | | | | | | | When this code is not used (e.g. by TPL) we want it to be excluded from the image. Put it in its own section so that this happens. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Use const for driver operationsSimon Glass2021-01-052-2/+2
| | | | | | | | | | | | | | Update these declarations to const to ensure that the data ends up in the rodata section. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Use access methods for dev/uclass private dataSimon Glass2021-01-052-2/+3
| | | | | | | | | | | | | | | | | | | | | | Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
| * x86: apl: Drop support for !OF_PLATDATA_PARENTSimon Glass2021-01-052-28/+1
| | | | | | | | | | | | | | This code was kept around after of-platdata started supporting parent devices. That feature seems stable now, so let's drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * serial: Update NS16550_t and struct NS16550Simon Glass2021-01-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | Typedefs should not be used in U-Boot and structs should be lower case. Update the code to use struct ns16550 consistently. Put a header guard on the file while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* | Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-054-13/+67
|\ \ | |/ |/| | | | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * fsp: Move and rename fsp_types.h fileSughosh Ganu2020-12-222-63/+2
| | | | | | | | | | | | | | | | | | | | | | | | The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: edison: Switch to DM_USB_GADGETAndy Shevchenko2020-12-162-4/+8
| | | | | | | | | | | | | | | | | | | | | | DM is the modern default approach for the drivers in U-Boot. It also allows to configure code via Device Tree. Move Intel Edison to use DM_USB_GADGET and drop hard coded values. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: edison: Use dwc3-generic driver for Intel EdisonAndy Shevchenko2020-12-162-0/+7
| | | | | | | | | | | | | | | | | | Use generic Synopsys DesignWare 3 driver on Intel Edison. For now it's just a stub which allows future refactoring. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: edison: BINMAN selection is specific to the boardAndy Shevchenko2020-12-161-1/+0
| | | | | | | | | | | | | | | | | | | | The platforms based on Intel Tangier may have different requirements how to create bootloader bundle to supply to a device. Currently the BINMAN approach is for Intel Edison only. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: edison: Add CPU to compatible stringAndy Shevchenko2020-12-161-1/+1
| | | | | | | | | | | | | | | | Like in the rest of x86 boards append CPU to the board compatible string. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: tangier: Find proper memory region for relocationAndy Shevchenko2020-12-161-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that U-Boot works by luck on Intel Edison board because the amount of RAM is less than 1 GB and standard way of calculating the top of it work for this configuration. However, this won't work if the amount of RAM is different and split differently in address space. We have to find the suitable window correctly. Find proper memory region for relocation by scanning MMAP SFI table in board_get_usable_ram_top() callback. According to the address map documentation the Main Memory is guaranteed to lie in the 0..2 GB range, that's why we limit search by this range. Fixes: e71de54a4943 ("x86: Add Intel Tangier support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: zimage: Update cmdline parameter to be an env varSimon Glass2020-12-161-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the updated changes to bootargs substitution[1], the zboot command needs to be updated to get its command line from an environment variable instead of a memory address. This is because the command-line string must be updated to convert %U to ${uuid}, etc. In any case it is more flexible to use a environment variable and it is best to do this before the release to avoid a subsequent change. Update the command accordingly. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | fsp: Move and rename fsp_types.h fileSughosh Ganu2020-12-312-63/+2
| | | | | | | | | | | | | | | | | | | | | | | | The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: Drop unnecessary mp_init logicSimon Glass2020-12-183-18/+9
| | | | | | | | | | | | | | | | | | | | Now that sequence numbers are set up when devices are bound, this code is not needed. Also, we should use dev_seq() instead of req_seq. Update the whole file accordingly. Also fix up APL cpu while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Avoid accessing seq directlySimon Glass2020-12-182-2/+2
| | | | | | | | | | | | | | | | | | | | At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-1317-45/+45
| | | | | | | | | | | | | | Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Update 'auto' declarations to be on one lineSimon Glass2020-12-131-2/+1
| | | | | | | | | | | | | | | | | | Fix up the code style for those declarations that should now fit onto one line, which is all of them that currently do not. This is needed for dtoc to detect the structs correctly, at present. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-1310-23/+22
| | | | | | | | | | | | | | This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-136-13/+13
| | | | | | | | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-1316-24/+24
| | | | | | | | | | | | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1314-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Remove uses of device_bind_offset()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | | | This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: Rename device_bind() to device_bind_offset()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | | | | | | | This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: zimage: Add silent-console processingSimon Glass2020-12-041-0/+14
|/ | | | | | | | | | At present zimage does its own command-line processing and does not support the 'silent console' feature. There doesn't seem to be any good reason for this. Add support for silent console to zimage. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: coral: Update smbios tables to latest definitionSimon Glass2020-11-101-6/+21
| | | | | | | | The accepted binding uses multiple nodes, one for each table type. Update coral accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()Bin Meng2020-11-101-1/+1
| | | | | | | | | | | | | | | Since commit 29d2d64ed55f ("x86: Add support for more than 8 MTRRs"), the maximum number of variable range MTRRs was increased from 8 to 10. On the BayTrail platform there are only 8 variable range MTRRs. In mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during VESA video driver probe. It should have been updated to use dynamically probed number. This fixes the boot failure seen on Intel Minnow Max board. Fixes: 29d2d64ed55f ("x86: Add support for more than 8 MTRRs") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Provide default SMBIOS manufacturer/productSimon Glass2020-11-0615-0/+60
| | | | | | | | | | | | | | Add a file containing defaults for these, using the existing CONFIG options. This file must be included with #include since it needs to be passed through the C preprocessor. Enable the driver for all x86 boards that generate SMBIOS tables. Disable it for coral since it has its own driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: reword the commit message a little bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* x86: galileo: Use devicetree for SMBIOS settingsSimon Glass2020-11-061-0/+28
| | | | | | | | Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: zimage: Quieten down the zimage boot processSimon Glass2020-11-061-5/+6
| | | | | | | | | Much of the output is not very useful. The bootm command is quite a bit quieter. Convert some output to use log_debug(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
* x86: zimage: Sanity-check the kernel version before printing itSimon Glass2020-11-061-0/+9
| | | | | | | | | | | With Chrome OS the kernel setup block is stored in a separate place from the kernel, so it is not possible to access the kernel version string. At present, garbage is printed. Add a sanity check to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit (git 2.34.1) at 2025-09-03 04:53:32 +0000