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* x86: Add an 'mtrr' command to list and adjust MTRRsSimon Glass2015-01-132-0/+139
* x86: ivybridge: Update microcode early in bootSimon Glass2015-01-135-13/+40
* x86: Disable CAR before relocation on platforms that need itSimon Glass2015-01-131-0/+8
* x86: ivybridge: Add a way to turn off the CARSimon Glass2015-01-131-0/+46
* x86: Commit the current MTRRs before relocationSimon Glass2015-01-131-0/+8
* x86: ivybridge: Request MTRRs for DRAM regionsSimon Glass2015-01-131-0/+10
* x86: ivybridge: Set up an MTRR for the video frame bufferSimon Glass2015-01-131-0/+7
* x86: Add support for MTRRsSimon Glass2015-01-136-101/+187
* x86: ivybridge: Drop support for ROM cachingSimon Glass2015-01-131-25/+0
* x86: Tidy up VESA mode numbersSimon Glass2015-01-131-4/+7
* x86: Use cache, don't clear the display in video BIOSSimon Glass2015-01-131-3/+2
* x86: ivybridge: Only run the Video BIOS when video is enabledSimon Glass2015-01-131-1/+8
* x86: Drop RAMTOP KconfigSimon Glass2015-01-132-12/+0
* x86: Correct XIP_ROM_SIZESimon Glass2015-01-131-1/+1
* x86: crownbay: Add pci devices in the dts fileBin Meng2015-01-131-0/+81
* x86: Use ePAPR defined properties for x86-uartBin Meng2015-01-131-3/+2
* x86: Simplify the fsp hob access functionsBin Meng2015-01-125-100/+101
* pci: Make pci apis usable before relocationBin Meng2015-01-123-6/+5
* x86: Support pci bus scan in the early phaseBin Meng2015-01-121-0/+1
* x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.cBin Meng2015-01-121-0/+2
* x86: Clean up the board dts filesBin Meng2015-01-123-24/+7
* x86: Rename coreboot.dsti to serial.dtsiBin Meng2015-01-123-2/+2
* x86: Remove alex.dts in arch/x86/dtsBin Meng2015-01-122-25/+0
* x86: Clean up the FSP support codesBin Meng2014-12-1813-290/+279
* x86: Rename coreboot-serial to x86-serialBin Meng2014-12-181-1/+1
* x86: crownbay: Add SDHCI supportBin Meng2014-12-182-1/+48
* x86: crownbay: Add SPI flash supportBin Meng2014-12-182-1/+40
* x86: Use consistent name XXX_ADDR for binary blob flash addressBin Meng2014-12-184-5/+5
* x86: Add queensbay and crownbay Kconfig filesBin Meng2014-12-182-0/+92
* x86: Enable the queensbay cpu directory buildBin Meng2014-12-181-0/+1
* x86: ich6-gpio: Add Intel Tunnel Creek GPIO supportBin Meng2014-12-182-2/+15
* x86: Convert microcode format to device-tree-onlySimon Glass2014-12-182-7/+11
* x86: Add basic support to queensbay platform and crownbay boardBin Meng2014-12-186-0/+326
* x86: Integrate Tunnel Creek processor microcodeBin Meng2014-12-181-0/+368
* x86: Correct problems in the microcode loadingSimon Glass2014-12-181-10/+15
* x86: ivybridge: Update the microcodeSimon Glass2014-12-186-1374/+1504
* x86: Move microcode updates into a separate directorySimon Glass2014-12-183-2/+2
* x86: move arch-specific asmlinkage to <asm/linkage.h>Masahiro Yamada2014-12-155-1/+11
* x86: Add a simple command to show FSP HOB informationBin Meng2014-12-132-0/+68
* x86: Support Intel FSP initialization path in start.SBin Meng2014-12-133-0/+20
* x86: Add post failure codes for bist and carBin Meng2014-12-132-0/+3
* x86: queensbay: Adapt FSP support codesBin Meng2014-12-133-18/+28
* x86: Initial import from Intel FSP release for Queensbay platformBin Meng2014-12-1312-0/+1522
* x86: Add a simple superio driver for SMSC LPC47MBin Meng2014-12-131-0/+90
* x86: Add Intel Crown Bay board dts fileBin Meng2014-12-132-1/+55
* x86: ich6-gpio: Move setup_pch_gpios() to board support codesBin Meng2014-12-133-0/+7
* x86: Clean up asm-offsetsBin Meng2014-12-132-2/+3
* x86: Make ROM_SIZE configurable in KconfigBin Meng2014-12-131-1/+77
* Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada2014-12-085-6/+7
* Kbuild: introduce Makefile in arch/$ARCH/Daniel Schwierzeck2014-12-081-0/+12
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