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* OMAP3: SPL: do not call I2C init if no I2C is set.Stefano Babic2012-03-271-0/+2
| | | | | | | | | | Call i2c initialization in spl_board_init only if I2C is configured for the board. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <tom.rini@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Simon Schwarz <simonschwarzcor@gmail.com>
* Add cache functions to SPL for armv7Stefano Babic2012-03-273-4/+5
| | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <tom.rini@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Simon Schwarz <simonschwarzcor@gmail.com>
* omap/spl: change output of spl_parse_image_headerSimon Schwarz2012-03-271-1/+1
| | | | | | | | | This only outputs "Assuming u-boot.bin..." if debug is active. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> CC: Tom Rini <tom.rini@gmail.com> CC: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
* omap-common/spl: Add linux boot to SPLSimon Schwarz2012-03-273-23/+75
| | | | | | | | | | | | | | | | | | | | | | | | This adds Linux booting to the SPL This depends on CONFIG_MACH_TYPE patch by Igor Grinberg (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809) Related CONFIGs: CONFIG_SPL_OS_BOOT Activates/Deactivates the OS booting feature CONFIG_SPL_OS_BOOT_KEY defines the IO-pin number u-boot switch - if pressed u-boot is booted CONFIG_SYS_NAND_SPL_KERNEL_OFFS Offset in NAND of direct boot kernel image to use in SPL CONFIG_SYS_SPL_ARGS_ADDR Address where the kernel boot arguments are expected - this is normaly RAM-begin + 0x100 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> CC: Tom Rini <tom.rini@gmail.com> CC: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
* devkit8000/spl: init GPMC for dm9000 in SPLSimon Schwarz2012-03-271-0/+1
| | | | | | | | | Linux crashes if the GPMC isn't configured for the dm9000. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> CC: Tom Rini <tom.rini@gmail.com> CC: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
* omap-common: Add NAND SPL linux bootingSimon Schwarz2012-03-271-16/+50
| | | | | | | | | | | | | | | | This implements booting of Linux from NAND in SPL Related config parameters: CONFIG_SYS_NAND_SPL_KERNEL_OFFS Offset in NAND of direct boot kernel image to use in SPL CONFIG_SYS_SPL_ARGS_ADDR Address where the kernel boot arguments are expected - this is normally RAM-start + 0x100 (on ARM) Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> CC: Tom Rini <tom.rini@gmail.com> CC: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
* mx53: Make PLL2 to be the parent of UART clockFabio Estevam2012-03-271-3/+17
| | | | | | | | | | | | | | | | | | Change the parent UART clock to be PLL2, so that U-boot can also boot a Freescale 2.6.35 kernel for mx53. FSL kernel and U-boot changed the UART parent from PLL3 to PLL2 to avoid conflicts with IPU clocks, so that the video resolution can be changed without affecting the UART clock. On a 2.6.35 kernel the serial console is messed up after IPU driver is loaded and this patch fixes this problem. Tested on a mx53loco board booting a FSL kernel and also a mainline kernel. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* mx6: Read silicon revision from registerFabio Estevam2012-03-273-3/+171
| | | | | | | | | | | | | | | Instead of hardcoding the mx6 silicon revision, read it in run-time. Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite. Tested on a mx6qsabrelite, where it shows: CPU: Freescale i.MX6Q rev1.0 at 792 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <r64343@freescale.com>
* i.MX28: Drop __naked function from spl_mem_initMarek Vasut2012-03-271-7/+3
| | | | | | | | | | | | | Instead of compiling the function and using the result as a constant, simply use the constant. NOTE: This patch works around bug: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52546 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* i.MX28: Make the stabilization delays shorterMarek Vasut2012-03-271-4/+4
| | | | | | | | | | | | | Cut down the VDDIO/VDDA regulator stabilization delays to 500 uS. That should be enough according to the datasheet and bootlets. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Robert Deliën <robert@delien.nl> Cc: Fabio Estevam <festevam@gmail.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
* mx6: Remove duplicate definition of ANATOP_BASE_ADDRFabio Estevam2012-03-271-1/+0
| | | | | | Remove duplicate definition of ANATOP_BASE_ADDR. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Fix reset cause for Power On Reset caseFabio Estevam2012-03-271-0/+1
| | | | | | | | | | | | | After booting mx6qsabrelite from POR the following is reported: CPU: Freescale i.MX61 family rev1.0 at 792 MHz Reset cause: unknown reset This is because both the POR and WDOG bits are set after reset. Fix this by also checking both bits in the POR case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX28: Enable additional DRAM address bitsMarek Vasut2012-03-271-1/+1
| | | | | | | | Enables all fourteen address lines for DRAM Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com> Tested-by: Marek Vasut <marek.vasut@gmail.com>
* mx31: add "ARM11P power gating" to get_reset_causeHelmut Raiger2012-03-271-0/+2
| | | | | | Add missing reset reason 7 to get_reset_cause(). Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* IXP: Fix GPIO_INT_ACT_LOW_SET()Marek Vasut2012-03-261-2/+8
| | | | | | | | | The GPIO_INT_ACT_LOW_SET was incorrectly handling interrupt lines higher than 7. This is due to the fact that there are two registers for total of 16 lines. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de>
* IXP: Squash warnings in IXP NPEMarek Vasut2012-03-263-7/+1
| | | | | | | | | | | | | IxEthAcc.c: In function ‘ixEthAccInit’: IxEthAcc.c:105:21: warning: comparison between ‘IxEthDBStatus’ and ‘enum <anonymous>’ [-Wenum-compare] IxEthDBAPISupport.c: In function ‘ixEthDBPortAddressSet’: IxEthDBAPISupport.c:633:18: warning: variable ‘ackPortAddressLock’ set but not used [-Wunused-but-set-variable] IxQMgrDispatcher.c: In function ‘ixQMgrLLPShow’: IxQMgrDispatcher.c:1194:18: warning: variable ‘q’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de>
* IXP: Make IXP buildable with arm-linux- toolchainsMarek Vasut2012-03-261-0/+3
| | | | | | | | | | | Add -EB flag to LD to switch endianness of the linker. This should make armeb targets buildable again. Also, make use of U-Boot's internal libgcc instead of toolchain's one, this works around the use of libraries from GCC, which might be little endian. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de>
* SPL: Add YMODEM over UART load supportMatt Porter2012-03-264-0/+87
| | | | | | | | | | Adds support for loading U-Boot from UART using YMODEM protocol. If YMODEM support is enabled in SPL and the romcode indicates that SPL loaded via UART then SPL will wait for start of a YMODEM transfer via the console port. Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* spl.c: Use __noreturn decoratorTom Rini2012-03-261-3/+2
| | | | | Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Tom Rini <trini@ti.com>
* Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registersRobert Delien2012-03-263-88/+52
| | | | | | | | | This patch fixes erroneous 32-bit access to registers hw_clkctrl_frac0 and hw_clkctrl_frac1. Signed-off-by: Robert Delien <robert@delien.nl> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
* Introducing 8-bit wide register, mx28_register_8Robert Delien2012-03-261-0/+16
| | | | | | | | | | This patch introduces an 8-bit register, mx28_register_8, in order to prepare for fixing erroneous 32-bit wide access of registers hw_clkctrl_frac0 and hw_clkctrl_frac1. Signed-off-by: Robert Delien <robert@delien.nl> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
* Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8Robert Delien2012-03-2617-425/+429
| | | | | | | | | This patch renames mx28_register to mx28_register_32 in order to prepare for the introduction of an 8-bit register, mx28_register_8. Signed-off-by: Robert Delien <robert@delien.nl> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
* i.MX28: Reformat the DRAM memory configuration dataMarek Vasut2012-03-261-38/+48
| | | | | | Reformat the data so it's easier to navigate through them. Signed-off-by: Marek Vasut <marex@denx.de>
* usb/ehci: Add USB support for the MX6QWolfgang Grandegger2012-03-263-0/+17
| | | | | | | Currently, only USB Host 1 is supported. Cc: Remy Bohmer <linux@bohmer.net> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx28: Replaced magic numbers for scratch register addresses with register ↵Robert Delien2012-03-262-8/+8
| | | | | | | | | definitions This patch replaces the use of magice numbers for scratch register addresses with earlier defined register definitions. Signed-off-by: Robert Delien <robert@delien.nl>
* i.mx28: Added register definitions for DIGCTL registersRobert Delien2012-03-262-0/+156
| | | | | | | This patch adds register definitions for the registers of the DIGCTL IP-block. Signed-off-by: Robert Delien <robert@delien.nl>
* PXA: Fix missing get_tbclk() breaking vpac boardsMarek Vasut2012-03-261-0/+5
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* USB: Armada100: EHCI Driver for Armada100 SOCsAjay Bhargav2012-03-191-0/+1
| | | | | | This patch adds support for USB EHCI driver for Armada100 SOCs. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* USB: Armada100: Add UTMI PHY interface driverAjay Bhargav2012-03-192-0/+87
| | | | | | | This patch adds USB host controller's UTMI PHY interface driver for Armada100 SOCs. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* usb: replace wait_ms() with mdelay()Mike Frysinger2012-03-192-15/+15
| | | | | | | | | | | | | | | | | | | | | | | Common code has a mdelay() func, so use that instead of the usb-specific wait_ms() func. This also fixes the build errors: ohci-hcd.c: In function 'submit_common_msg': /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1519:9: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1816:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1827:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1844:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1563:11: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1583:9: sorry, unimplemented: called from here make[1]: *** [ohci-hcd.o] Error 1 Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Marek Vasut <marex@denx.de>
* bootstage: arm: Add bootstage calls in board and bootmSimon Glass2012-03-182-0/+7
| | | | | | | | | | | Add calls to bootstage before and after relocation, and just before jumping to the OS. The idea here is you can call bootstage_report() to get a report. Additionally, if you define CONFIG_BOOTSTAGE_REPORT then a report is printed automatically by U-Boot just before jumping to the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
* bootstage: Replace show_boot_progress/error() with bootstage_...()Simon Glass2012-03-181-1/+1
| | | | | | | These calls should not be made directly any more, since bootstage will call the show_boot_...() functions as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* bootstage: Make use of BOOTSTAGE_ID_RUN_OS in show_boot_progress()Simon Glass2012-03-181-1/+1
| | | | | | | | | This changes the number 15 as used in boot_stage_progress() to use the new name provided for it. This is a separate patch because it touches so many files. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* ATMEL: remove old atmel_mci driverSven Schnelle2012-03-131-1/+1
| | | | | | | | All boards are using the gen_atmel_mci driver now, so no need to carry the old driver around. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Stop using builtin_run_command()Simon Glass2012-03-061-6/+1
| | | | | | | | | | Boards can select either the 'built-in' parser or the hush parser. We should not call builtin_run_command() if we are using the hush parser. We use run_command() instead, since it knows how to call the correct parser. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Rename run_command() to builtin_run_command()Simon Glass2012-03-061-1/+1
| | | | | | | | | The current run_command() is only one of the parsing options - the other is hush. We should not call run_command() when the hush parser is being used. So we rename this function to better explain its purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Remove execute permissions from source filesThomas Weber2012-03-041-0/+0
| | | | Signed-off-by: Thomas Weber <weber@corscience.de>
* armv7: omap3: leave outer cache enabledAneesh V2012-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Mainline kernel for OMAP3 doesn't enable L2 cache It expects L2$ to be enabled by ROM-code/bootloader. Leaving L2$ enabled can be troublesome in cases where the L2 cache is not under CP15 control, such as in Cortex-A9. This problem is explained in detail in the commit dc7100f4080952798413fb63bb4134b22c57623a However, this problem doesn't apply to Cortex-A8 because L2$ in Cortex-A8 is under CP15 control and hence the generic armv7 maintenance opertions work for it. As such we can make an exception for OMAP3 and leave the L2$ enabled when we jump to kernel. This is done by removing the strongly-linked implementation of v7_outer_cache_disable() and allowing it to fall back to the weakly linked implementation that doesn't do anything. Signed-off-by: Aneesh V <aneesh@ti.com>
* tt01: add video supportHelmut Raiger2012-02-271-0/+1
| | | | | | | | The video setup for the Epson display is provided. Addtionally some extra info is displayed next to the Linux logo. Make get_cpu_rev() publicly available (added to sys_proto.h). Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* net: fec_mxc: add 1000 Mbps selectionTroy Kisky2012-02-271-0/+1
| | | | | | | | Define FEC_QUIRK_ENET_MAC and add to arch-mx6/imx-regs.h Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* dm6467Tevm: Use a common configuration file for davinci_dm6467evm and ↵prabhakar.csengg@gmail.com2012-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | davinci_dm6467Tevm In commit 2d575e46859dd9127a9cec731ace77523e6ea2ab a separate header file was introduced for the DM6467T EVM, include/configs/davinci_dm6467Tevm.h. The substantial difference between the davinci_dm6467evm and the davinci_dm6467Tevm configuration is a single bit in the hardware revision that is passed to the Linux kernel and davinci_dm6467evm has REFCLK_FREQ = 27000000 where as davinci_dm6467Tevm.h has a REFCLK_FREQ = 33000000. This patch removes include/configs/davinci_dm6467Tevm.h. Instead the include/configs/davinci_dm6467evm.h configuration is used for DM6467T EVMs and renamed CFG_REFCLK_FREQ to CONFIG_REFCLK_FREQ and CONFIG_REFCLK_FREQ is defined in boards.cfg. Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Cc: Tom Rini <trini@ti.com>
* am33xx: ddr_defs.h: Change DDR timingsChase Maupin2012-02-271-1/+1
| | | | | | | | * For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
* davinci: cleanup davinci_sync_env_enetaddr() fucntionHadli, Manjunath2012-02-271-3/+6
| | | | | | | | | | | | check for the return status for eth_getenv_enetaddr_by_index() and eth_setenv_enetaddr() functions and print appropriate message on failure. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mx35: generic: Let get_reset_cause be defined only when ↵Fabio Estevam2012-02-271-1/+1
| | | | | | | | | CONFIG_DISPLAY_CPUINFO is selected get_reset_cause() function is only used inside print_cpuinfo(), so let it be defined only when CONFIG_DISPLAY_CPUINFO is selected. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6q: Add support for ECSPI through mxc_spi driverEric Nelson2012-02-271-0/+44
| | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* mxc_spi: move machine specifics into CPU headersEric Nelson2012-02-273-0/+82
| | | | | | | | | | | | | | Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* mx6q: define GPIO macros for translating between ordinals and port:indexEric Nelson2012-02-271-0/+4
| | | | | | | | | | | | | | | | | The interface to the mxc_gpio driver uses integer (ordinal) values to refer to all GPIOs on the i.MX processors. The registers themselves and much of the i.MX documentation are banked in groups of 32, and these macros allow the use of the port:index numbering for clarity. GPIO_NUMBER() converts to ordinal value from port:index GPIO_PORT() returns the port of an ordinal value GPIO_INDEX() returns the index or offset of the ordinal. Discussion on the mailing list at http://lists.denx.de/pipermail/u-boot/2012-January/116927.html Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* MX27: add missing get_tbclk()Stefano Babic2012-02-271-0/+5
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX28: Fix get_timer() / get_tbclk() issueMarek Vasut2012-02-271-2/+17
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
* mx28: fix SPL code to make USB booting workMatthias Fuchs2012-02-271-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes booting i.MX28 CPUs via USB download. In this mode the CPU's bootrom implements a USB HID device that accepts a bootstream. When downloading the bootstream via USB, first the SPL code is received and executed. Then the u-boot image is received and called. The USB bootmode is interrupt driven. This patch fixes two things: 1) The ARM's fast interrupt mode is disabled when the SPL code has been run. So save and restore the CPSR register. 2) Save and restore c1 control register: the exception vector location needs to be set back to bootrom space to make the USB interrupts work again. The SPL code needs to change this option for the ram size probing. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Marek Vasut <marek.vasut@gmail.com>
generated by cgit (git 2.34.1) at 2024-09-22 16:38:08 +0000