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* ARM: dts: imx6_apalis: introduce fec nodeIgor Opaniuk2020-01-071-0/+22
| | | | | | | Sync DTS with the mainline Linux and introduce fec node. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
* ARM: dts: imx6_colibri: introduce fec nodeIgor Opaniuk2020-01-071-0/+20
| | | | | | | Sync DTS with the mainline Linux and introduce fec node. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
* mx7dsabre: Enable DM_ETHJoris Offouga2020-01-072-211/+577
| | | | | Also sync device tree with v5.5-rc1 Signed-off-by: Joris Offouga <offougajoris@gmail.com>
* mx7ulp: Add support for Embedded Artists COM boardFabio Estevam2020-01-073-1/+98
| | | | | | | | | | | The Embedded Artists COM board is based on NXP i.MX7ULP. It has a BD70528 PMIC from Rohm with discrete DCDC powering option and improved current observability (compared to the existing NXP i.MX7ULP EVK). Add the initial support for the board. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* imx: cx9020: migrate cx9020 to CONFIG_DM_USBSteffen Dirkwinkel2020-01-071-1/+10
| | | | | | | Note: gpio7_8 was never used for usb power regulator so we remove it here Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com> Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
* imx: cx9020: migrate cx9020 to CONFIG_DM_ETHSteffen Dirkwinkel2020-01-071-11/+20
| | | | | Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com> Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
* imx: sync with kernel device tree for Phycore SoMParthiban Nallathambi2020-01-0711-233/+722
| | | | | | | | | | Sync the Linux Kernel 5.4-rc6 device tree for Phytec Phycore SoM and Segin board based on imx6UL and imx6ULL. Changes includes Phytec naming convention for the devicetree files. Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* mach-imx: bootaux: add dcache flushing before enabling M4Igor Opaniuk2020-01-071-0/+3
| | | | | | | | | | | | | | This patch fixes the issue with broken bootaux command, when M4 binary is loaded and data cache isn't flushed before M4 core is enabled. Reproducing: > tftpboot ${loadaddr} ${board_name}/hello_world.bin > cp.b ${loadaddr} 0x7F8000 $filesize > bootaux 0x7F8000 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
* mach-imx: bootaux: print stack pointer and reset vectorIgor Opaniuk2020-01-071-1/+5
| | | | | | | | | 1. Change information printed about loaded M4 binary, print the stack pointer and reset vector addressed. 2. Add sanity check for the address provided as param. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
* ARM: mx6: ddr: Add support for iMX6SXMarek Vasut2020-01-071-4/+14
| | | | | | | | | | | | This patch adds support for iMX6SX MMDC into the DDR calibration code. The only difference between MX6DQ and MX6SX is that the SX has 2 SDQS registers, while the DQ has 8. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
* ARM: mx6: ddr: Configure all SDQS pullups using loopMarek Vasut2020-01-071-19/+8
| | | | | | | | | | | Instead of explicitly setting up each SDQS register, use a loop. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
* ARM: mx6: ddr: Factor out SDQS configuration codeMarek Vasut2020-01-071-18/+28
| | | | | | | | | | | | Pull out the code turning SDQS pullups on and off into a separate function, since it is replicated in two places in the code and it is the single place in the entire function which is SoC dependent. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
* ARM: mx6: ddr: Make debug prints work with tiny printfMarek Vasut2020-01-071-12/+12
| | | | | | | | | | | | | The %08X format returns just zeroes with tiny printf, which is horribly confusing, especially when debugging DRAM calibration problems. Change the format to %08x (with lowercase x), which behaves correctly with either implementation of printf in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
* ARM: dts: dh-imx6: add u-boot specific wdt-reboot nodeClaudius Heine2020-01-071-0/+11
| | | | | | | | The wdt-reboot node is needed for the sysreset_watchdog driver to register a watchdog as a reset handler in case 'CONFIG_SYSRESET' is enabled. Signed-off-by: Claudius Heine <ch@denx.de>
* arm: dts: hummingboard: add cubox/hummingboard DT (part 2 of 2)Baruch Siach2020-01-0722-0/+1737
| | | | | | | | | | These DT files are copied from kernel v5.3 with no changes. This is part 2 of 2 commits. Included are DT files for SOM rev 1.5, and Hummingboard2 Gate/Edge. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* arm: dts: hummingboard: add cubox/hummingboard DT (part 1 of 2)Baruch Siach2020-01-079-0/+1128
| | | | | | | | | | These DT files are copied from kernel v5.3 with no changes. This is part 1 of 2 commits. Included are DT files for the original Cubox-i and Hummingboard Base/Pro. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* board: ge: mx53ppd: use imx wdtRobert Beckett2020-01-072-0/+13
| | | | | | | Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: bx50v3: use imx wdtRobert Beckett2020-01-072-0/+13
| | | | | | | Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: ppd: sync device tree from LinuxRobert Beckett2020-01-071-19/+1061
| | | | | | Copy device tree from linux for PPD. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: bx50v3: sync devicetrees from LinuxRobert Beckett2020-01-077-75/+1651
| | | | | | | | | | Copy device trees from linux, keeping them as separate files for each board to ease future sync. Update board code to use generic bx50v3 dt initially, then select the specific dt based on board detection. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* imx: Add support for i.MX28 based XEA boardLukasz Majewski2020-01-074-0/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces support for i.MX28 based XEA board. This board supports DM/DTS in U-Boot proper as well as DM aware drivers in SPL (u-boot.sb) by using OF_PLATDATA. More detailed information regarding usage of it can be found in ./board/liebherr/xea/README file. U-Boot SPL 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) Trying to boot from MMC1 MMC0: Command 8 timeout (status 0xf0344020) mmc_load_image_raw_sector: mmc block read error U-Boot 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SPI #3, master, 3V3 NOR Model: Liebherr (LWE) XEA i.MX28 Board DRAM: 128 MiB MMC: MXS MMC: 0 Loading Environment from SPI Flash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 64 KiB, total 16 MiB OK In: serial Out: serial Err: serial Net: Warning: ethernet@800f0000 (eth0) using random MAC address - ce:e1:9e:46:f3:a2 eth0: ethernet@800f0000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski <lukma@denx.de>
* imx6: aristainetos: add support for rev C boardHeiko Schocher2020-01-078-0/+416
| | | | | | | add support for revision C boards. This board has no longer a NAND. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: add aristainetos 2b cslHeiko Schocher2020-01-078-0/+436
| | | | | | add aristainetso board version CSL. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: readd aristainetos 2b boardHeiko Schocher2020-01-078-0/+454
| | | | | | readd aristainetos 2b board. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: add DM_SERIAL supportHeiko Schocher2020-01-071-0/+2
| | | | | | | | | add DM_SERIAL support for the aristainetos board, and remove not used code from board code. remove CONSOLE_OVERWRITE_ROUTINE. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: prepare dts for other board versionsHeiko Schocher2020-01-079-552/+831
| | | | | | | | | | | as we switch to support DM and DTS, rework the existing DTS trees. Change also Linux specific Device trees, goal is to push this changes to linux. Collect U-Boot specific changes in separate "*u-boot*" dts files. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: add device tree from linuxHeiko Schocher2020-01-074-0/+801
| | | | | | | | | | | | Add device trees from Linux in preparation for driver model conversions. device tree files taken from Linux: 71ae5fc87c34: "Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest" and added SPDX license identifier. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: remove 2b versionHeiko Schocher2020-01-071-8/+0
| | | | | | | | | remove 2b version of aristainetos board, as it is easier to make the DM / DTS port and introduce the 2b board version again (also some more board version). Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: move defines to KconfigHeiko Schocher2020-01-071-0/+9
| | | | | | | move defines, which are already moved to Kconfig out of board config. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: remove aristainetos boardHeiko Schocher2020-01-071-3/+0
| | | | | | remove not anymore used aristainetos board. Signed-off-by: Heiko Schocher <hs@denx.de>
* arm: mach-k3: Enable WA for R5F deadlockLokesh Vutla2020-01-034-0/+28
| | | | | | | | | | | | | | | | | | On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config toolLokesh Vutla2020-01-031-3/+3
| | | | | | | | | Update the ddr settings to use the DDR reg config tool rev 0.2.0. This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order to avoid DSS underflow errors. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
* Merge tag 'u-boot-rockchip-20191231' of ↵Tom Rini2020-01-027-6/+634
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix latest mainline kernel for rk3308 - Update rk3288-evb config to suport OP-TEE - Fix for firefly-px30 DEBUG_UART channel and make it standalone - Script make_fit_atf add python3 support - Fix rk3328 timer with correct COUNTER_FREQUENCY - Fix rk3328 ATF support with enable spl-fifo-mode
| * rockchip: rk3328: enable spl-fifo-mode for emmc and sdmmcKever Yang2019-12-311-0/+6
| | | | | | | | | | | | | | Since mmc to sram can't do dma, add patch to prevent aborts transfering TF-A parts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: add description for TPL_ROCKCHIP_COMMON_BOARDThomas Hebb2019-12-271-1/+1
| | | | | | | | | | | | | | | | | | SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but this one doesn't for some reason. Add a description to make the menu easier to read. Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px30-firefly add standalone dtsKever Yang2019-12-273-1/+617
| | | | | | | | | | | | | | | | Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot proper will use the dts setting to do the IOMUX init, and a separate dts is needed for px30-firefly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: make_fit_atf: explicitly use python3Jack Mitchell2019-12-271-1/+1
| | | | | | | | | | | | | | | | | | | | On a distribution with no python2 installed and no python->python3 symlink the script will fail to execute. Specify python3 explicitly as it's already a requirement to build u-boot. Signed-off-by: Jack Mitchell <ml@embed.me.uk> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: fit_spl_optee: get text and optee base from buildKever Yang2019-12-261-3/+9
| | | | | | | | | | | | | | | | | | | | Instead of hardcode the base address, we can get them from the build output, eg. get the SYS_TEXT_BASE from .config and get optee base from DRAM_BASE. We can use this script for SoCs with DRAM base not from 0x60000000(rk3229 and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | arch/arm/Kconfig: typo/grammar/punctuation fixesRobert P. J. Day2020-01-021-26/+26
| | | | | | | | | | | | | | Various (mostly minor) spelling, grammar and punctuation tweaks for arch/arm/Kconfig. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | Merge tag 'u-boot-imx-20191228' of ↵Tom Rini2019-12-282-0/+12
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - Fixes for Nitrogen6x - Fix corruption for mx51evk - colibri i.MX6: fix broken ESDHC conversion - mx6sxsabresd: fix broken mmcdev - imx6q_logic: cleanup boot sequence - update ATF for imx8mq_evk - pfuze: fix pmic_get() Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
| * | ARM: i.MX6: TARGET_NITROGEN6X: add 'select MX6QDL'Troy Kisky2019-12-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata from i.MX6 UP system" for nitrogen6x. The above commit removed the errata for the board since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS This restores the errata configs. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * | tools/imximage: share DCD information via KconfigJorge Ramirez-Ortiz2019-12-271-0/+11
| |/ | | | | | | | | | | | | | | | | | | | | | | IMX based platforms can have the DCD table located on different addresses due to differences in their memory maps (ie iMX7ULP). This information is required by the user to sign the images for secure boot so continue making it accessible via mkimage. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
* | sunxi: remove __packed from struct sunxi_prcm_regHeinrich Schuchardt2019-12-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct sunxi_prcm_reg is naturally packed. There is no need to define it as packed. Defining it as packed leads to compilation errors with GCC 9.2.1: CC arch/arm/lib/reloc_arm_efi.o arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: :qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 163 | sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~~~ Remove __packed attribute from struct sunxi_prcm_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2Diego Rondini2019-12-182-1/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Orangepi Zero Plus 2 is an open-source single-board computer, available in two Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the H5 is already supported. H3 Orangepi Zero Plus 2 has: - Quad-core Cortex-A7 - 512MB DDR3 - microSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG + power supply Sync dts from linux v5.2 commit: "ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry" (sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b) Commit: "ARM: dts: sun8i: h3: Refactor the pinctrl node names" (sha1: a4dc791974e568a15f7f37131729b1a6912f4811) has been avoided as it breaks U-Boot build. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | sunxi: psci: avoid error address-of-packed-memberHeinrich Schuchardt2019-12-181-5/+11
|/ | | | | | | | | | | | | | | | | | | | | | Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* stm32mp1: remove the imply BOOTSTAGEPatrick Delaunay2019-12-181-2/+0
| | | | | | | | | | | This patch is only a temporarily workaround for crash introduced by commit ac9cd4805c8b ("bootstage: Correct relocation algorithm"). The crash occurs because the bootstage struct is not correctly aligned when BOOTSTAGE feature is activated. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: imply CMD_CLSPatrick Delaunay2019-12-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Activate by default the command CLS (clear screen); this command used in pxe or sysboot command (DISTRO support) when the "menu background" keyword is present. This patch avoid the warning "Unknown command 'cls'" with extlinux.conf: # Generic Distro Configuration file generated by OpenEmbedded menu title Select the boot mode MENU BACKGROUND /splash.bmp TIMEOUT 20 DEFAULT stm32mp157c-ev1-emmc LABEL stm32mp157c-ev1-emmc KERNEL /uImage FDT /stm32mp157c-ev1.dtb APPEND root=/dev/mmcblk1p4 rootwait rw console=ttySTM0,115200 ... Retrieving file: /mmc0_stm32mp157c-ev1_extlinux/extlinux.conf 614 bytes read in 36 ms (16.6 KiB/s) Retrieving file: /splash.bmp 46180 bytes read in 40 ms (1.1 MiB/s) Unknown command 'cls' - try 'help' Select the boot mode 1: stm32mp157c-ev1-sdcard ... Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
* dts: am335x-brsmarc1/xre1: insert phy_id againHannes Schmelzer2019-12-132-0/+4
| | | | | | | | | | | | | | | | commit 3b3e8a37d36e ("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id") did sync with recent linux kernel and replaced therefore the 'phy_id' property with a phy-handle pointing to the mdio. This is OK for linux, but introduces trouble with the already running vxWorks on this target. So this commit here re-inerts the phy_id property beside the phy-handle property to be compatible with both. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCsSuman Anna2019-12-091-0/+12
| | | | | | | | | | | | | | | | | | The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") added the core logic to update the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx family of SoCs. The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though provide a higher performance and can run at a higher clock frequency of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the correct clock rates on these SoCs. Note that this higher clock rate is not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or AM574x SoCs) that follow the ABZ package. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netTom Rini2019-12-095-3/+258
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