summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-zynq
Commit message (Collapse)AuthorAgeFilesLines
* ARM: zynq: Do not print message about boot deviceMichal Simek2020-04-061-2/+0
| | | | | | | | | | | | | | | | | This information is shown already that's why there is no reason to print it again via custom prints. U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100) mmc boot Trying to boot from MMC1 or U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100) qspi boot Trying to boot from SPI Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Makefile: Add environment variable DEVICE_TREE to headerMichal Simek2020-04-061-2/+6
| | | | | | | | | | | | | | | | | | | | | Users have option to overwrite default device tree (CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE. Feature has been added long time ago by commit 74de8c9a1672 ("dts/Makefile: Build the user specified dts") for a little bit different reason. But this variable can be also used for different purpose like choosing proper configuration from FIT image in SPL. And this is the functionality I would like to use on Xilinx Zynq devices that current u-boot.img can be composed in the same way based on OF_LIST and different configuration is taken based on platform specific SPL. SPL requires low level ps7_init_gpl configuration that's why different boards require different SPL with fixed board_fit_config_name_match(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-052-0/+2
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move hang() to the same header as panic()Simon Glass2020-01-171-0/+1
| | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Move get_tbclk() to time.hSimon Glass2020-01-171-0/+1
| | | | | | | This function related to timer and most of the timer functions are in time.h, so move this function there. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: zynq: Remove unused QSPI and USB addressesMichal Simek2020-01-141-3/+0
| | | | | | | All drivers should be converted to DM already that's why these hardcoded base addresses are not needed anymore. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: mtd: nand: Remove hardcoded base addressesAshok Reddy Soma2020-01-141-2/+0
| | | | | | | | | Remove hardcoded base addresses of smc controller and nand controller. Get those addresses from dt and replace wherever they are used. Remove smc and nand base address from header file too. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | | | | These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner2019-05-181-1/+1
| | | | | | | | | | | | | While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: zynq: Remove addresses for i2c controllersMichal Simek2019-02-141-2/+0
| | | | | | | | All platforms have been converted to DM that's why there is no reason to keep addresses in headers. They are all read from DT now. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FATTien Fong Chee2019-02-011-1/+1
| | | | | | | | | | Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* linker: Modify linker scripts to be more genericTom Rini2019-01-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* ARM: zynq: Remove unused GEM addressesMichal Simek2019-01-241-2/+0
| | | | | | | With DM in place there is no need to have GEM addresses in headers. None is using them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Kconfig: extend the bootstrap malloc() poolAnton Gerasimov2019-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Most of the memory is being consumed by device binding code, more space needed for other data structures. Z-turn board has already hit the limit, others may follow soon. Measuring only the memory consumed in device_bind_common, I've got the following results (in decimal): root_driver: 108 mod_exp_sw: 108 amba: 120 serial@e0000000 aka uart0: 112 serial@e0001000 aka uart1: 88 spi@e000d000 aka qspi: 120 sdhci@e0100000 aka mmc0: 455 sdhci@e0100000.blk: 208 slcr@f8000000: 96 clkc@100: 72 (total) 1487 = 0x5cf of 0x600 Signed-off-by: Anton Gerasimov <tossel@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynqSiva Durga Prasad Paladugu2018-08-061-0/+3
| | | | | | | | | | This patch moves the the config SYS_MALLOC_LEN to Kconfig. It will be just for Zynq arch and to do will be for all other archs. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* efi_loader: Rename sections to allow for implicit dataAlexander Graf2018-07-251-15/+21
| | | | | | | | | | | | | | | | | | | | | | | Some times gcc may generate data that is then used within code that may be part of an efi runtime section. That data could be jump tables, constants or strings. In order to make sure we catch these, we need to ensure that gcc emits them into a section that we can relocate together with all the other efi runtime bits. This only works if the -ffunction-sections and -fdata-sections flags are passed and the efi runtime functions are in a section that starts with ".text". Up to now we had all efi runtime bits in sections that did not interfere with the normal section naming scheme, but this forces us to do so. Hence we need to move the efi_loader text/data/rodata sections before the global *(.text*) catch-all section. With this patch in place, we should hopefully have an easier time to extend the efi runtime functionality in the future. Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: Fix x86_64 breakage]
* arm: zynq: spl: fix FPGA initializationLuis Araneda2018-07-191-0/+3
| | | | | | | | | | | | commit 4aba5fb857c1 ("arm: zynq: Rework FPGA initialization") moved FPGA initialization from board_init() to arch_early_init_r(), which is not called as part of the SPL Fix this by calling arch_early_init_r() in the spl_board_init() function, so the FPGA is correctly initialized Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynq: Add support to secure imagesSiva Durga Prasad Paladugu2018-07-191-0/+1
| | | | | | | | | | | | | | | | This patch basically adds two new commands for loadig secure images. 1. zynq rsa adds support to load secure image which can be both authenticated or encrypted or both authenticated and encrypted image in xilinx bootimage(BOOT.bin) format. 2. zynq aes command adds support to decrypt and load encrypted image back to DDR as per destination address. The image has to be encrypted using xilinx bootgen tool and to get only the encrypted image from tool use -split option while invoking bootgen. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Remove checkboard and enable DISPLAY_CPUINFOMichal Simek2018-05-111-0/+19
| | | | | | | | | | | | | | | | | | | | | | Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200) CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> mini configuration doesn't need to show this information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Rework FPGA initializationMichal Simek2018-05-111-1/+65
| | | | | | | | | | This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar> and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable debug_uart_init in spl when enabledMichal Simek2018-05-111-5/+6
| | | | | | | In past this code was commented and was used for debug purpose. But there is no reason not to enabled it based on macros. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0716-33/+16
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-272-4/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: zynq: Enable setup board name for different boardsMichal Simek2018-04-231-0/+1
| | | | | | | There is no need to use zynq name as SYS_BOARD for all boards. The patch is adding an option to change it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand: zynq: Cleanup initializationEzequiel Garcia2018-04-231-9/+0
| | | | | | | | | | | | | | | | CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the driver doesn't have to play any ifdef game. Also, we can mark zynq_nand_init() as static and get rid of the mach-specific nand.h header. This is really a revert of: "mtd: zynq: nand: Move board_nand_init() function to board.c" (sha1: 310995d9f91ae56082b49be06fe8c3d01424f8f6) Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Handle ENXIO error return value properlyMichal Simek2018-04-091-1/+2
| | | | | | zynq_clk_get_rate() is also returning ENXIO which is not handled now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQVipul Kumar2018-03-011-0/+3
| | | | | | | | | This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ and enabled it in respective defconfig. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* spl: eMMC/SD: Provide one __weak spl_boot_mode() functionLukasz Majewski2018-02-071-7/+0
| | | | | | | | | | | | | | | | | The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* arm: zynq: Update years in copyright to reflect latest changesMichal Simek2018-01-305-5/+5
| | | | | | Updating year in zynq files. Also add missing Copyright to board.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Fix types in ps7_spl_initMichal Simek2018-01-301-2/+2
| | | | | | | | | | The patch is fixing the following Warning: arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] while (ioread(addr) < delay) ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: zynq: nand: Move board_nand_init() function to board.cWilson Lee2017-11-291-0/+9
| | | | | | | | | | | | | | | | | | | Putting board_nand_init() function inside NAND driver was not appropriate due to it doesn't allow board vendor to customise their NAND initialization code such as adding NAND lock/unlock code. This commit was to move the board_nand_init() function from NAND driver to board.c file. This allow customization of board_nand_init() function. Signed-off-by: Wilson Lee <wilson.lee@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Cc: Scott Wood <oss@buserror.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Use unsigned type with comparison with ARRAY_SIZEMichal Simek2017-11-291-1/+2
| | | | | | | | | | | Sparse is return warning about this: arch/arm/mach-zynq/slcr.c: In function 'zynq_slcr_get_mio_pin_status': arch/arm/mach-zynq/slcr.c:185:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) { ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add support for EMIT_WRITE operationMichal Simek2017-11-292-0/+8
| | | | | | | Add proper support for EMIT_WRITE operation which is write only. Do not use EMIT_MASKWRITE which is read-modify-write. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add ps7GetSiliconVersion() to ps7_spl_initMichal Simek2017-11-292-0/+12
| | | | | | Unfortunately camelcase is coming from ps7_init* format. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move common ps7_init* initialization to arch codeMichal Simek2017-11-292-1/+136
| | | | | | | | | | | | This patch is based on work done in topic board where the first address word also storing operation which should be done. This is reducing size of configuration data. This patch is not breaking an option to copy default ps7_init_gpl* files from hdf file but it is doing preparation for ps7_init* consolidation. The patch is also marking ps7_config as weak function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move ps7_* to separate fileMichal Simek2017-11-295-22/+43
| | | | | | | Extract ps7_* from spl code to prepare for extension. And also return value. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add missing ps7_post_config declarationMichal Simek2017-11-291-0/+1
| | | | | | | | | | Add missing declaration to header. Warning log: arch/arm/mach-zynq/spl.c:94:12: warning: symbol 'ps7_post_config' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* spl: add hierarchical defaults for SPL_LDSCRIPTPhilipp Tomsich2017-08-131-0/+3
| | | | | | | | | | | | | | | | With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* zynq: Add EFI runtime sections to linker scriptAlexander Graf2017-08-021-0/+29
| | | | | | | | | | | | | | | When using EFI_LOADER, we add a few special sections for runtime code and data which get relocated on demand when executing a target OS. These runtime structures need to get annotated properly in the linker script. While we do that properly in the generic one, we missed out on the zynq specific linker script. This patch adds the EFI runtime section annotations into the zynq linker script so that the efi loader code actually works on that platform. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add Kconfig option for any DDR specific initializationSiva Durga Prasad Paladugu2017-06-202-0/+12
| | | | | | | | | Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Move zynq to clock frameworkStefan Herbrechtsmeier2017-02-176-631/+53
| | | | | | | | Move the zynq to clock framework and remove unused functions as well as the CONFIG_ZYNQ_PS_CLK_FREQ configuration. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Remove zynq_clk_get_name functionStefan Herbrechtsmeier2017-02-172-12/+1
| | | | | | | | | The zynq_clk_get_name function is only used once inside the clock driver. Replace the function call with the one-line code. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Move static clock names into separate arrayStefan Herbrechtsmeier2017-02-171-61/+60
| | | | | | | | | The clock names are static and correspond to the clock id. Separate them from the dynamic filled clock array. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Add clk framework support to zynq timerStefan Herbrechtsmeier2017-02-171-0/+25
| | | | | | | | If available use the clock framework to calculate the clock rate of the zynq timer. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* net: zynq: Don't overwrite gem_rclk_ctrl with default valueStefan Herbrechtsmeier2017-02-171-7/+0
| | | | | | | | | | The gem[0-1]_rclk_ctrl registers control the source of the rx clock, control and data signals and configure via ps7_init function. Don't overwrite the register with the default value. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQMasahiro Yamada2017-01-311-1/+1
| | | | | | | | | Make the naming scheme consistent; all SDHCI-base drivers prefixed with CONFIG_MMC_SDHCI_. While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* zynq: nand: Runtime detection of nand buswidth through slcrMichal Simek2016-11-151-0/+25
| | | | | | | | | | | | | This patch adds support to check the buswidth on nand flash at runtime based on nand MIO configurations done by FSBL. User needs to correctly configure the MIO's based on the buswidth supported by the nand flash which is present on the board. Added nand8 and nand16 @periph names on slcr driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Make SYS_VENDOR configurableMike Looijmans2016-11-151-0/+1
| | | | | | | | Add a string description for SYS_VENDOR to allow configuring boards from other vendors than just "xilinx". Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* tools: mkimage: Add support for initialization table for Zynq and ZynqMPMike Looijmans2016-11-151-0/+7
| | | | | | | | | | | | | | | | | | The Zynq/ZynqMP boot.bin file contains a region for register initialization data. Filling in proper values in this table can reduce boot time (e.g. about 50ms faster on QSPI boot) and also reduce the size of the SPL binary. The table is a simple text file with register+data on each line. Other lines are simply skipped. The file can be passed to mkimage using the "-R" parameter. It is recommended to add reg init file to board folder. For example: CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arch, board: squash lines for immediate returnMasahiro Yamada2016-09-231-6/+2
| | | | | | | | Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>