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* stm32mp1: activate MISC support in SPLPatrick Delaunay2018-07-201-0/+1
| | | | | | | needed for RCC MISC driver and sysreset with syscon in SPL Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* misc: stm32: Add STM32MP1 supportPatrick Delaunay2018-07-201-0/+1
| | | | | | | | | | | | Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers. We can reuse and adapt RCC MFD driver already available for MCU SoCs (F4/F7/H7). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESETLey Foon Tan2018-07-091-1/+1
| | | | | | | | Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* stm32mp1: use OTP to configure MAC address and serial numberPatrick Delaunay2018-05-261-0/+81
| | | | | | | | | | | | | Use OTP57 and 58 for MAC address - OTP57 = MAC address bits [31:0] - OTP58 = MAC address bit [47:32] stored in OTP LSB's Use manufacture information in OTP13 to OTP15 to build unique chip id saved in env variable "serial#" (used for USB device enumeration) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* stm32mp1: add bsec driverPatrick Delaunay2018-05-263-2/+442
| | | | | | | | | | Add a MISC driver with read and write access to BSEC IP (Boot and Security and OTP control) - offset 0: shadowed values - offset 0x80000000: OTP fuse box values (SAFMEM) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* stm32mp1: remove the second TAMP_BOOT_CONTEXT updatePatrick Delaunay2018-05-261-3/+0
| | | | | | | | | The register TAMP_BOOT_CONTEXT is already updated in get_bootmode() in cpu.c and no need to be done twice. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* stm32mp1: Allow to activate CONFIG_DEBUG_UARTPatrick Delaunay2018-05-263-1/+40
| | | | | | | | | | | | | Add the needed information to enable the debug uart to have printf before the serial driver probe (so before probe for clock, pincontrol and reset drivers) To enable the debug on uart 4 (default console): + CONFIG_DEBUG_UART=y + CONFIG_DEBUG_UART_STM32=y Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* stm32mp: regulator: add SoC pwr regulator supportPatrick Delaunay2018-05-084-0/+278
| | | | | | | | | | | This driver binds and manages the following regulator of SoC's PWR block : - reg11 - reg18 - usb33 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla2018-05-071-1/+1
| | | | | | | | | | | | | | | | | Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: stm32mp1: add PSCI supportPatrick Delaunay2018-05-074-0/+186
| | | | | | | | | | | | | | | | | | Add PSCI v1.0 support for Linux and manage PSCI state for each CPU (affinity 0 level) with all mandatory functions: - PSCI_VERSION - CPU_SUSPEND - CPU_OFF - CPU_ON - AFFINITY_INFO - SYSTEM_OFF - SYSTEM_RESET - PSCI_FEATURES and 1 optional to avoid Linux warning - MIGRATE_INFO_TYPE Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
* SPDX: Convert all of our multiple license tags to Linux Kernel styleTom Rini2018-05-079-18/+9
| | | | | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have multiple licenses (in these cases, dual license) declared in the SPDX-License-Identifier tag. In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B" as per the Linux Kernel style document. Note that parenthesis are allowed so when they were used before we continue to use them. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: move SYS_ARCH_TIMER to KConfigAndre Przywara2018-04-281-0/+1
| | | | | | | | | | | | | SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot. At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [tuomas: rebase + fix conflicts and resync with moveconfig & use select] Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* stm32mp: handle SYSRESETPatrick Delaunay2018-04-062-4/+2
| | | | | | | Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp: add syscon for STGENPatrick Delaunay2018-04-063-0/+29
| | | | | | | Add STGEN as SYSCON device: allow access to device address defined in device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: select boot device and partitionPatrick Delaunay2018-04-062-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bootrom loads SPL from SDCARD or eMMC according BootPin selection. Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning: on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: get boot mode from BootRomPatrick Delaunay2018-04-062-0/+145
| | | | | | | | | | | | SPL copy BootRom boot mode information in TAMP register 21. This TAMP register information is used after relocation to set 2 env variables - boot_device - boot_instance Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp: add check of cpu identifierPatrick Delaunay2018-04-062-1/+63
| | | | | | | Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp: cleanup cpu.cPatrick Delaunay2018-04-061-23/+21
| | | | | | Move all defines at the beginning of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* board: st: add generic board for STM32MP1 familyPatrick Delaunay2018-03-191-0/+2
| | | | | | | | | | | Add first support for STM32MP157C-ED1 board with "Basic" boot chain 1/ Boot Rom: load SPL with STM32 image header in SYSRAM 2/ SPL: power up and initialize the DDR and load U-Boot image from SDCARD in DDR 3/ U-Boot: search and load extlinux.conf in SDCARD (DISTRO activated) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* ram: stm32mp1: add driverPatrick Delaunay2018-03-191-0/+12
| | | | | | Add driver and binding for stm32mp1 ddr controller and phy Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arm: stm32: add new architecture for STM32MP familyPatrick Delaunay2018-03-198-0/+440
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver model for all the drivers, even in SPL - all security feature are deactivated (ETZC and TZC) - reused STM32 MCU drivers when it is possible Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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