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* dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass2021-01-051-5/+5
| | | | | | | | In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
* treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORTMichael Walle2020-12-042-4/+4
| | | | | | | | There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT. Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Michal Simek <michal.simek@xilinx.com>
* arm64: Add support for larger PIE U-BootEdgar E. Iglesias2020-09-221-1/+7
| | | | | | | | | | | | | | | Linking a U-Boot larger than 1MB fails with PIE enabled: u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end' defined in .bss_start section in u-boot. This extends the supported range by using adrp & add to load symbols early while starting up. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: Add SPL build check to SPL early bss clearBrian Moyer2020-08-041-5/+5
| | | | | | | | SPL_CLEAR_BSS is called regardless of build type if CONFIG_SPL_EARLY_BSS is defined. Add a guard for CONFIG_SPL_BUILD to fix. Signed-off-by: Brian Moyer <bdm310@gmail.com>
* arch: arm: use dt and UCLASS_SYSCON to get gic lpi detailsRayagonda Kokatanur2020-07-291-7/+56
| | | | | | | | | | | | Use device tree and UCLASS_SYSCON driver to get Generic Interrupt Controller (GIC) lpi address and maximum GIC redistributors count. Also update Kconfig to select REGMAP and SYSCON when GIC_V3_ITS is enabled. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arch: arm: use dt and UCLASS_IRQ to get gic detailsRayagonda Kokatanur2020-07-291-7/+66
| | | | | | | | | | | Use device tree and UCLASS_IRQ driver to get following Generic Interrupt Controller (GIC) details, -GIC Distributor interface (GICD) base address and -GIC Redistributors (GICR) base address. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-174-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* arm: provide a function for boards init code to modify MMU virtual-physical mapMarek Szyprowski2020-07-101-6/+18
| | | | | | | | Provide function for setting arbitrary virtual-physical MMU mapping and cache settings for the given region. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* bdinfo: arm: Move ARM-specific info into its own fileSimon Glass2020-06-252-0/+52
| | | | | | | | | | We don't really want to have ARM-specific code in a generic file. Create a new arch-specific function to hold it, and move it into that. Make the function weak so that any arch can implement it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop asm/ptrace.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-185-0/+5
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-184-5/+8
| | | | | | | | | | | | | We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop init.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop image.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop bootstage.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-184-0/+4
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* cmd: cache: Fix non-cached memory cachabilityPatrice Chotard2020-05-071-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If dcache is switched OFF to ON state and if non-cached memory is used, this non-cached memory must be re-declared as uncached to mmu each time dcache is set ON. Introduce noncached_set_region() to set this non-cached region's mmu settings. Let architecture override it by defining it as a weak function. For ARM architecture, noncached_set_region() defines all noncached region as non-cacheable. Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver, when going from dcache OFF to dcache ON state, ethernet driver issued TX timeout errors when performing dhcp or ping. It can be reproduced with the following sequence: dhcp while true ; do ping 192.168.1.300 ; dcache off ; ping 192.168.1.300 ; dcache on ; done Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Cc: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de>
* Merge tag 'u-boot-imx-20200502' of ↵Tom Rini2020-05-041-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - imxrt: fix LCD clock, fix doc - new board: Coral Dev - imx8: enable Cache in SPL. SNVS, update SCFW API - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading - MX6ULL : is_imx6ull to include i.MX6ULZ - Net: add config to enable TXC delay Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
| * ARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for themClaudius Heine2020-05-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available anywere, even if SYSRESET is disabled for SPL/TPL. 'do_reset' is called from SPL for instance from the panic handler and PANIC_HANG is not set Signed-off-by: Claudius Heine <ch@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
* | common/board_r: arm: Merge initr_enable_interrupts into interrupts_initOvidiu Panait2020-05-013-0/+6
| | | | | | | | | | | | | | | | | | | | initr_enable_interrupts() is an ARM-specific wrapper over enable_interrupts(), which is run during the common init sequence. It can be eliminated by moving the enable_interrupts() call to the end of interrupt_init() function, in arch/arm/lib/interrupts*.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm: caches: manage phys_addr_t overflow in mmu_set_region_dcache_behaviourPatrick Delaunay2020-05-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Solved the overflow on phys_addr_t type for start + size in mmu_set_region_dcache_behaviour() function. This overflow is avoided by dividing start and end by 2 before addition, and we only expecting that start and size are even. This patch doesn't change the current function behavior if the parameters (start or size) are not aligned on MMU_SECTION_SIZE. For example, this overflow occurs on ARM32 with: start = 0xC0000000 and size = 0x40000000 then start + size = 0x100000000 and end = 0x0. For information the function behavior change with risk of regression, if we just shift start and size before the addition. Example with 2MB section size: MMU_SECTION_SIZE 0x200000 and MMU_SECTION_SHIFT = 21 with start = 0x1000000, size = 0x1000000, - with the proposed patch, start = 0 and end = 0x1 as previously - with the more simple patch: end = (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT) the value of end change: start >> 21 = 0, size >> 21 = 0 and end = 0x0 !!! Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | arm: caches: add DCACHE_DEFAULT_OPTIONPatrick Delaunay2020-05-011-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add the new flags DCACHE_DEFAULT_OPTION to define the default option to use according the compilation flags CONFIG_SYS_ARM_CACHE_*. This new compilation flag allows to simplify dram_bank_mmu_setup() and can be used as third parameter (option=dcache option to select) of mmu_set_region_dcache_behaviour function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | arm: caches: protect dram_bank_mmu_setup access to bi_dramPatrick Delaunay2020-05-011-0/+4
|/ | | | | | | | | | | | | | Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram before relocation. This patch allow to use the generic weak function dram_bank_mmu_setup to activate the MMU and the data cache in SPL or in U-Boot before relocation, when bd->bi_dram is not yet initialized. In this cases, the MMU must be initialized explicitly with mmu_set_region_dcache_behaviour function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* common/board_f: Make reserve_mmu genericOvidiu Panait2020-04-241-1/+1
| | | | | | | | Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu routines. Also, define a weak nop stub for it. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: asm/cache.c: Introduce arm_reserve_mmuOvidiu Panait2020-04-241-0/+5
| | | | | | | | | | | | | | As a preparation for turning reserve_mmu into an arch-specific variant, introduce arm_reserve_mmu on ARM. It implements the default routine for reserving memory for MMU TLB and needs to be weakly defined in order to allow for machines to override it. Without this decoupling, after introducing arch_reserve_mmu, there would be two weak definitions for it, one in common/board_f.c and one in arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.cOvidiu Panait2020-04-241-0/+28
| | | | | | | | Move the ARM-specific reserve_mmu definition from common/board_f.c to arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: bootm: take into account gd->ram_topPatrice Chotard2020-04-171-0/+3
| | | | | | | | | If gd->ram_top has been tuned using board_get_usable_ram_top(), it must be taken into account when reserving arch lmb. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arm: set the relocated gd with gd->new_gdPatrick Delaunay2020-04-161-2/+1
| | | | | | | | | | | | Simplify the arm relocation behavior and get gd directly form new_gd, as it is already done in crt0_64.S: ldr x18, [x18, #GD_NEW_GD] /* x18 <- gd->new_gd */ This patch avoid assumption on new GD location (new GD is below bd - with #GD_SIZE offset). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arch: arm: Fix SZ_64K undeclared compilation errorWasim Khan2020-02-251-0/+1
| | | | | | | | Macro SZ_64K is undeclared. Include sizes.h to fix the compilation error. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move hang() to the same header as panic()Simon Glass2020-01-172-2/+3
| | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Move reset_cpu() to the CPU headerSimon Glass2020-01-173-1/+4
| | | | | | Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move relocate_code() to init.hSimon Glass2020-01-171-1/+1
| | | | | | | | | This is an init function so move it out of the common header. Avoid using the typedef so that we don't have to include the global_data header file. Also tidy up the function style in comments while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* arch: arm: Program GIC LPI configuration tableBharat Kumar Reddy Gooty2020-01-102-0/+101
| | | | | | | | | | | Programs the following: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
* common: Move enable/disable_interrupts out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move interrupt functions into a new headerSimon Glass2019-12-023-0/+3
| | | | | | | | | | | | These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: powerpc: Tidy up code style for interrupt functionsSimon Glass2019-12-021-3/+3
| | | | | | | Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | | | | These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: powerpc: Tidy up code style for cache functionsSimon Glass2019-12-021-6/+6
| | | | | | | Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some SMP functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | These functions belong in cpu_func.h so move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* spl: separate SPL_FRAMEWORK config for spl and tplHeiko Stuebner2019-11-173-2/+4
| | | | | | | | | | | | | | Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm: caches: Disable mmu only if mmu is availableLokesh Vutla2019-11-071-0/+6
| | | | | | | | As part of disabling caches MMU as well gets disabled. But MMU is not available on all armv7 cores like R5F. So disable MMU only if it is available. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* boot: arm: Enable support for custom board_prep_linuxLokesh Vutla2019-10-251-0/+4
| | | | | | | | Once the arch specific boot_prepare_linux completes, boards wants to have a custom preparation for linux. Add support for a custom board_prep_linux. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm64: print instructions leading to exceptionHeinrich Schuchardt2019-10-111-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an exception occurs in a loaded image and the relocation offset is unknown, it is helpful to know the instructions pointed to by the program counter. This patch adds the missing output. A possible output is: Code: 910c4021 aa1303e0 f9400662 d63f0040 (e7f7defb) The parentheses indicate the instruction causing the exception. The output can be disassembled using scripts/decodecode: echo 'Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb)' | \ ARCH=arm64 scripts/decodecode Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb) All code ======== 0: 90000360 adrp x0, 0x6c000 4: 9100b800 add x0, x0, #0x2e 8: 94002782 bl 0x9e10 c: 17ffff8f b 0xfffffffffffffe48 10:* e7f7defb .inst 0xe7f7defb ; undefined <-- trapping instruction Code starting with the faulting instruction =========================================== 0: e7f7defb .inst 0xe7f7defb ; undefined We already have implemented the same for armv7. For testing command 'exception undefined' can be used. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* board_f: fix noncached reservation calculationStephen Warren2019-08-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code in reserve_noncached() has two issues: 1) The first update of gd->start_addr_sp always rounds down to a section start. However, the equivalent calculation in cache.c:noncached_init() always first rounds up to a section start, then subtracts a section size. These two calculations differ if the initial value is already rounded to section alignment. 2) The second update of gd->start_addr_sp subtracts exactly CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in cache.c:noncached_init() rounds the noncached size up to section alignment before subtracting it. The two calculations differ if the noncached region size is not a multiple of the MMU section size. In practice, one/both of those issues causes a practical problem on Jetson TX1; U-Boot triggers a synchronous abort during initialization, likely due to overlapping use of some memory region. This change fixes both these issues by duplicating the exact calculations from noncached_init() into reserve_noncached(). However, this fix assumes that gd->start_addr_sp on entry to reserve_noncached() exactly matches mem_malloc_start on entry to noncached_init(). I haven't traced the code to see whether it absolutely guarantees this in all (or indeed any!) cases. Consequently, I added some comments in the hope that this condition will continue to be true. Fixes: 5f7adb5b1c02 ("board_f: reserve noncached space below malloc area") Cc: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* env: Move env_get() to env.hSimon Glass2019-08-111-0/+1
| | | | | | | Move env_get() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'efi-2019-10-rc1-2' of ↵Tom Rini2019-07-232-10/+8
|\ | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for v2019.10-rc1 (2) * Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event. * Address errors of type -Werror=address-of-packed-member when building with GCC9.1 * Fix an error when adding memory add addres 0x00000000. * Rework some code comments for Sphinx compliance.
| * efi_loader: use predefined constants in crt0_*_efi.SHeinrich Schuchardt2019-07-162-10/+8
| | | | | | | | | | | | | | | | | | | | | | We should use predefined constants instead of magic numbers. Move some constant definitions from include/pe.h to include/asm-generic/pe.h. Use these constants in crt0_*_efi.S. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
generated by cgit (git 2.34.1) at 2024-11-19 22:18:38 +0000