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* Kirkwood: allow to override CONFIG_SYS_TCLKSimon Guinot2011-05-111-3/+5
| | | | | | | | | | | | | | This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot <sguinot@lacie.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
* MX31: change return value of get_cpu_revStefano Babic2011-05-111-1/+1
| | | | | | | | | | Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
* MX31: removed warning due to missing prototypeStefano Babic2011-05-111-0/+1
| | | | | | | Drop warning caused by missing prototype for mxc_hw_watchdog_reset(). Signed-off-by: Stefano Babic <sbabic@denx.de>
* ftsmc020: move ftsmc020 static mem controller to driver/mtdMacpaul Lin2011-04-271-79/+0
| | | | | | | | | | | Move the header file and definitions of ftsmc020 static memory control unit from a320 SoC folder to "drivers/mtd" folder. This change will let other SoC which also use ftsmc020 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* ftsdmc020: move ftsdmc020.h to include/faradayMacpaul Lin2011-04-271-103/+0
| | | | | | | | | | Move the header file "ftsdmc020.h" (SDRAM Controller) to "include/faraday" folder. This change will let other SoC which also use ftsdmc020 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* arm: Tegra2: GPIO: Add basic GPIO definitionsTom Warren2011-04-272-0/+60
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra2: Add missing PLLX initTom Warren2011-04-271-2/+4
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra2: add support for A9 CPU initTom Warren2011-04-274-0/+86
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARMV7: OMAP3: Add GPMC_CONFIGx register value definitionsLuca Ceresoli2011-04-271-0/+95
| | | | | Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3_beagle: enable EHCI and USB storage.Alexander Holler2011-04-271-0/+58
| | | | | | | | | | The reset sequence/configuration for ehci is highly board specific, so this will be done in the source for the board, instead of introducing several CONFIG_* which would be needed to make those few lines in beagle.c usable across different OMAP boards. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3: Add support for DPLL5 (usbhost)Alexander Holler2011-04-273-5/+43
| | | | | Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Replace obsolete e-mail addressAlbert ARIBAUD2011-04-273-3/+3
| | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* fttmr010: move fttmr010 header to include/faradayMacpaul Lin2011-04-271-73/+0
| | | | | | | | | | | Move the header file and definitions of fttmr010 power control unit from a320 SoC folder to "include/faraday" folder. This change will let other SoC which also use fttmr010 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* Orion5x: Correct DRAM bank detectionRogan Dawes2011-04-271-0/+1
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* I2C: add i2c support for Armada100 platformLei Wen2011-04-272-18/+34
| | | | | | | | Add i2c support to aspenite board with Armada100 soc. Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Lei Wen <leiwen@marvell.com>
* I2C: add i2c support for Pantheon platformLei Wen2011-04-273-3/+17
| | | | | | | | Add i2c support to dkb board with pantheon soc. Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Lei Wen <leiwen@marvell.com>
* mv_i2c: use structure to replace the direclty defineLei Wen2011-04-271-56/+0
| | | | | | | | | | Add i2c_clk_enable in the cpu specific code, since previous platform it, while new platform don't need. In the pantheon and armada100 platform, this function is defined as NULL one. Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Lei Wen <leiwen@marvell.com>
* arm: Use optimized memcpy and memset from linuxMatthias Weisser2011-04-272-2/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using optimized versions of memset and memcpy from linux brings a quite noticeable speed (x2 or better) improvement for these two functions. Here are some numbers for test done with jadecpu | HEAD(1)| HEAD(1)| HEAD(2)| HEAD(2)| | | +patch | | +patch | ---------------------------+--------+--------+--------+--------+ Reset to prompt | 438ms | 330ms | 228ms | 120ms | | | | | | TFTP a 3MB img | 4782ms | 3428ms | 3245ms | 2820ms | | | | | | FATLOAD USB a 3MB img* | 8515ms | 8510ms | ------ | ------ | | | | | | BOOTM LZO img in RAM | 3473ms | 3168ms | 592ms | 592ms | where CRC is | 615ms | 615ms | 54ms | 54ms | uncompress | 2460ms | 2462ms | 450ms | 451ms | final boot_elf | 376ms | 68ms | 65ms | 65ms | | | | | | BOOTM LZO img in FLASH | 3207ms | 2902ms | 1050ms | 1050ms | where CRC is | 600ms | 600ms | 135ms | 135ms | uncompress | 2209ms | 2211ms | 828ms | 828ms | | | | | | Copy 1.4MB from NOR to RAM | 134ms | 72ms | 120ms | 70ms | (1) No dcache (2) dcache enabled in board_init *Does not work when dcache is on Size impact: C version: text data bss dec hex filename 202862 18912 266456 488230 77326 u-boot ASM version: text data bss dec hex filename 203798 18912 266288 488998 77626 u-boot 222712 u-boot.bin Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* OMAP3: BeagleBoard: Enable pullups on i2c2.Steve Kipisz2011-04-271-0/+14
| | | | | | | | | This allows the reading of EEPROMS on the expansion bus without adding external pull-ups. Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* MX31: drop warnings in get_cpu_revStefano Babic2011-04-271-1/+1
| | | | | | | | Drop warnings due to recent commit ARM: mx31: Print the silicon version Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
* ARM: MX31: Fix file name labelFabio Estevam2011-04-271-3/+3
| | | | | | | | | Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers) renamed mx31-imx-regs.h to imx-regs.h. Change the file label accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ARM: mx31: Print the silicon versionFabio Estevam2011-04-271-0/+25
| | | | | | | | | | | Use the same method of the Linux kernel to print the MX31 silicon version on boot. Tested on a MX31PDK with a 2.0 silicon, where it shows: CPU: Freescale i.MX31 rev 2.0 at 531 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* IMX: MX31: Cleanup include files and drop nasty #ifdef in driversStefano Babic2011-04-272-3/+3
| | | | | | | | | | As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: add support for MX31 watchdogStefano Babic2011-04-271-0/+10
| | | | | | | | | | | | | | | | | | The patch add CONFIG_HW_WATCHDOG to be used with the internal watchdog timer of the MX31 processor. Two function are exported for the board maintainers: mxc_hw_watchdog_enable mxc_hw_watchdog_reset The board maintainer can decide to use mxc_hw_watchdog_reset as hw_watchdog_reset, or to implement his own function to reset the watchdog. The watchdog timer can be configured with CONFIG_SYS_WD_TIMER_SECS (value in seconds). The MX31 allows values between 0.5 (CONFIG_SYS_WD_TIMER_SECS = 0) and 128 seconds. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARMV7: S5P: Fixed register offset in mmc.hChander Kashyap2011-03-272-4/+6
| | | | | | | | | | | The MMC registers are accessed through struct s5p_mmc member variables. MMC controller "control4" register offset is set to 0x8C as per data sheet. The size of struct s5p_mmc is also corrected. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: timer: Use pwm functionsMinkyu Kang2011-03-272-14/+2
| | | | | | Use pwm functions for timer that is PWM timer 4. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: S5P: pwm driver supportDonghwa Lee2011-03-272-0/+38
| | | | | | | | This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: fix incorrect monitor protection region in FLASHPo-Yu Chuang2011-03-271-0/+1
| | | | | | | | | | | Monitor protection region in FLASH did not cover .rel.dyn and .dynsym sections, because it uses __bss_start to compute monitor_flash_len. Use _end instead. Add _end to linker scripts for end of u-boot image Add _end_ofs to all the start.S. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* ARM: Update mach-typesSandeep Paulraj2011-02-211-15/+1276
| | | | | | | This commit updates the mach-types based on the latest in linus's head Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mvmfp: add MFP configuration support for PANTHEONLei Wen2011-02-211-0/+41
| | | | | | | This patch adds the Multiple Function Pin configuration support for Marvell PANTHEON SoCs Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: Add Support for Marvell Pantheon Familiy SoCsLei Wen2011-02-213-0/+171
| | | | | | | | | | | | | Pantheon Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf SoC versions Supported: 1) PANTHEON920 (TD) 2) PANTHEON910 (TTC) Signed-off-by: Lei Wen <leiwen@marvell.com>
* mv: seperate kirkwood and armada from common settingLei Wen2011-02-212-0/+189
| | | | | | | | | | | | | Since there are lots of difference between kirkwood and armada series, it is better to seperate them but still keep the most common file shared by all marvell platform in the mv-common configure file. This patch move the kirkwood only driver definitoin in mv-common to the <soc_name>/config.h. This patch is tested with compilation for armada100 and guruplug. Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: fix write*() I/O accessorsWolfgang Denk2011-02-211-3/+3
| | | | | | | | | | | | | | | | | | | Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb and friends." introduced I/O accessors with memory barriers. Unfortunately the new write*() accessors introduced a bug: The problem is that the argument "v" gets evaluated twice. This breaks code like used here (from "drivers/net/dnet.c"): for (i = 0; i < wrsz; i++) writel(*bufp++, &dnet->regs->TX_DATA_FIFO); Use auxiliary variables to avoid such problems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Alexander Holler <holler@ahsoftware.de> Cc: Dirk Behme <dirk.behme@googlemail.com>
* arm: Tegra2: Add basic NVIDIA Tegra2 SoC supportTom Warren2011-02-216-0/+475
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* armv7: add support for S5PC210 SoCMinkyu Kang2011-02-029-0/+764
| | | | | | | S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5P: serial: Use the inline function instead of static valueMinkyu Kang2011-02-021-1/+4
| | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: Avoid compiler optimization for readb, writeb and friends.Alexander Holler2011-02-021-12/+20
| | | | | | | | | | | | | | | | | | | | | gcc 4.5.1 seems to ignore (at least some) volatile definitions, avoid that as done in the kernel. Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that gcc version to ignore the volatile type qualifier used e.g. in __arch_getl(). Anyway, using a definition as in the kernel headers avoids such optimizations when gcc 4.5.1 is used. Maybe the headers as used in the current linux-kernel should be used, but to avoid large changes, I've just added a small change to the current headers. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini-list@gnudd.com> Tested-by: Thomas Weber <weber@corscience.de> Acked-by: Alexander Holler <holler@ahsoftware.de> Tested-by: Alexander Holler <holler@ahsoftware.de>
* armv7: s5pc1xx: don't use function pointer for clock functionsMinkyu Kang2011-02-021-6/+4
| | | | | | | | Because of the bss area is cleared after relocation, we've lost pointers. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* DaVinci DM6467: Enhance board SupportSandeep Paulraj2011-02-021-0/+1
| | | | | | | | | | | | Support for DM6467 was incomplete and the build failed as well. Patches were sent to the list but have not been added. This enhances the DM6467 support. Some more patches will need to be sent to bring it in line with what is available in internal TI trees Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: Update mach typesSandeep Paulraj2011-02-021-15/+2290
| | | | | | | This commit updates the mach-types for ARM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci DM6467: Added ET1011C (LSI) PHY supportSandeep Paulraj2011-02-021-0/+3
| | | | | | | | | | Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling ET1011C gigabit phy. which overrides get_link_speed function from default implementation. This enables output of 125 MHz reference clock on SYS_CLK pin. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Davinci MMCSD SupportSandeep Paulraj2011-02-021-0/+175
| | | | | | | | | | Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar <alagusankar@embwise.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* SPI: mxc_spi: replace fixed offsets with structuresStefano Babic2011-02-023-0/+35
| | | | | | | | This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Add support for MX35 processorStefano Babic2011-02-026-0/+1287
| | | | | | | | | | | The patch adds basic support for the Freescale's i.MX35 (arm1136 based) processor. The patch adds also a prototype for the initialization of the FEC(ethernet controller) to netdev.h to avoid warnings. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX5: Add initial support for MX53 processorLiu Hui-R643432011-02-024-158/+500
| | | | | | | | | | Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
* ftpmu010: support faraday ftpmu010 driverMacpaul Lin2011-01-251-146/+0
| | | | | | | | | Faraday's ftpmu010 is a power managemnet unit which support cpu sleep and frequency scaling. It has been integrated into many SoC. This patch also move ftpmu010 to a proper place for later enhancement. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* Merge branch 'next' of ../nextWolfgang Denk2010-12-225-2/+345
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| * add Multi Function Pin configuration support for ARMADA100Prafulla Wadaskar2010-12-161-0/+67
| | | | | | | | | | | | This patch adds the support MFP support for Marvell ARMADA100 SoCs Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * arm: Add Support for Marvell ARMADA 100 Familiy SoCsPrafulla Wadaskar2010-12-162-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMADA 100 Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/applications/armada_100 SoC versions Supported: 1) ARMADA168/88AP168 (Aspen P) 2) ARMADA166/88AP166 (Aspen M) 3) ARMADA162/88AP162 (Aspen L) Contributors: Eric Miao <eric.y.miao@gmail.com> Lei Wen <leiwen@marvell.com> Mahavir Jain <mjain@marvell.com> Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Merge branch 'master' of ../master into nextWolfgang Denk2010-12-164-16/+62
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