summaryrefslogtreecommitdiffstats
path: root/arch/arc
Commit message (Collapse)AuthorAgeFilesLines
* arch: types.h: factor out fixed width typedefs to int-ll64.hMasahiro Yamada2018-09-101-34/+2
| | | | | | | | | | | | | All architectures have the same definition for s8/16/32/64 and u8/16/32/64. Factor out the duplicated code into <asm-generic/int-ll64.h>. BTW, Linux unified the kernel space definition into int-ll64.h a few years ago as you see in Linux commit 0c79a8e29b5f ("asm/types.h: Remove include/asm-generic/int-l64.h"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARC: HSDK: Fix timer frequency valueEugeniy Paltsev2018-09-051-1/+1
| | | | | | | CPU (and hence cpu timers) on HSDK board runs at 500MHz after preloader so fix wrong CPU frequency value in hsdk.dts Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
* ARC: Enable unaligned access in hardware if compiler uses itAlexey Brodkin2018-07-312-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even if ARC core might handle unaligned access to data this hardware feature by default is disabled. But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores. Which leads to quite strange and fatal run-time failures like the one below if HW is not configured properly: | hsdk# sf probe | Misaligned data access exception @ 0xbff794d4 | ECR: 0x000d0000 | RET: 0xbff794d4 | BLINK: 0xbff79644 | STAT32: 0x00000800 | GP: 0x1003e000 r25: 0xbfd58f08 | BTA: 0xbff794a4 SP: 0xbfd58cd4 FP: 0xbfd58ef0 | LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000 | r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf | r03: 0x00000000 r04: 0x00000100 r05: 0x00000000 | r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500 | r09: 0x00000000 r10: 0x00200000 r11: 0x00000000 | r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68 | r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000 | r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40 | r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000 | r24: 0xbfd59ba8 | Resetting CPU ... Now we're checking for __ARC_UNALIGNED__ define emitted by the compiler if it's going to use unaligned access and then we force-enable it in hardware too. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* AXS10x: add spi flash supportEugeniy Paltsev2018-07-311-0/+34
| | | | | | | | | AXS10x boards have n25q512 spi flash IC, so add corresponding nodes to device tree and enaple corresponding options in defconfig. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* GPIO: CREG: improve flexibility of hsdk-creg-gpio driverEugeniy Paltsev2018-07-311-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | CREG GPIO is a driver for weird soc-specific output ports, which are controlled by some fields in memory mapped register. Example: 31 9 7 5 0 < bit number | | | | | [ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register ^ ^ | | write 0x2 == set output to "1" (activate) write 0x3 == set output to "0" (deactivate) As of tooday we only support fixed (hardcoded) bit per gpio line, activate / deactivatei and shift values. Fix that by read them from device tree to be able to use this driver for other boards. Remove "hsdk" prefix from compatible string as this driver can be used with different boards like HSDK, AXS101, AXS103, etc. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Kconfig: Sort bool, default, select and imply optionsMichal Simek2018-07-301-5/+5
| | | | | | | | | Another round of sorting Kconfig entries aplhabetically. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignoreMasahiro Yamada2018-06-181-1/+0
| | | | | | | Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARC: Add support for EM Development Kit boardAlexey Brodkin2018-05-313-0/+39
| | | | | | | | | | | | Synopsys DesignWare ARC EM Development Kit (ARC EMDK) is an FPGA-based development platform from Synopsys aimed to speed-up development of software for ARC EM cores and entire subsystems based on ARC EM like Data Fusion, Secure and Sensor & Control subsystems. U-Boot is supposed to be used as a primary bootloader on EMDK allowing users to easily load and start their application from micro-SD card. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Use elf32-bigarc in case of -EBAlexey Brodkin2018-05-311-1/+1
| | | | | | | | | As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT corresponds to "-EB" command-line option which for us is "elf32-bigarc". [1] https://sourceware.org/binutils/docs/ld/Format-Commands.html#Format-Commands Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Reset: Implement weak reset_cpu()Alexey Brodkin2018-05-311-5/+9
| | | | | | | This will allow for board-specific implementation of reset. Default version will just stop execution with help of BRK instruction. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASMAlexey Brodkin2018-05-311-1/+1
| | | | | | | | For quite some time we have a GCC's built-in which inserts BRK instruction so let's use it instead of simple insertion of in-line assembly. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Move .ivt section to the very beginning of the imageAlexey Brodkin2018-05-311-7/+8
| | | | | | | This is useful for cases when U-Boot image is put in ROM and reset vector points to 0 where the very beginnign of the image reside. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Improve relocation fix-upsAlexey Brodkin2018-05-311-22/+54
| | | | | | | | | | | | | | | | | | | | | | | We used to have the one and only linker script for all ARC boards and so we relied on a particular order of symbols there. Because of that we used __ivt_end as the marker of the end of all the code which won't be true any longer if we move .ivt section to any other place. That said we'd better check for each section separately. A couple of other improvements: 1. There's no point to include the marker of section end in interested range because its address is beyond the section, i.e. we should compare with "<" but not "<=". 2. .ivt section for ARCv2 cores is just an array of 32-bit ints and they are not swapped even on little-endia cores while in case of ARCompact cores .ivt contains valid code so swapping is required. 3. Just in case add check for ARC600 which is also ARCompact and its .ivt is normal code. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Make sure .ivt section is not purged by garbage collectorAlexey Brodkin2018-05-311-1/+1
| | | | | | | | | | | | | | | | | Fixes commit fac4790491f6 ("arc: Eliminate unused code and data with GCC's garbage collector"), see [1]. Since in case of ARCv2 .ivt only contains addrresses of interrupt/exception handlers linker doesn't understand that this section actually make a lot of sense and decides to get rid of it if we use "--gc-sections". And KEEP does exactly this, see [2]. [1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508849573ff7 [2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Don't compare I$ and D$ line lengthsAlexey Brodkin2018-05-311-4/+8
| | | | | | | | | | | | We don't care much about I$ line length really as there're no per-line ops on I$ instead we only do full invalidation of it on occasion of relocation and right before jumping to the OS. Also as compared to Linux kernel where we don't support different lengths of I$ and D$ lines in U-Boot we have to deal with such an exotic configs if the target board is not supposed to run Linux kernel. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: init debug uart in early common arc codeEugeniy Paltsev2018-05-241-0/+5
| | | | | | | | | | The debug UART is intended for use very early in U-Boot to debug problems before serial drivers are up. Call debug_uart_init right before board_init_f. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0744-94/+44
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* ARC: Remove unused DECLARE_GLOBAL_DATA_PTR from init_helpers.cEugeniy Paltsev2018-04-171-2/+0
| | | | | | | | "Global data" structure "gd" is not used in init_helpers.c thus DECLARE_GLOBAL_DATA_PTR might be safely removed. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: HSDK: Enable SPI flash supportEugeniy Paltsev2018-04-021-0/+26
| | | | | | | | | | | | | | | HSDK board has sst26wf016 SPI flash IC which we want to support. Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree. Enable corresponding options in hsdk defconfig. For SPI write functionality to work we need [1] which adds support of sst26xxx ICs. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796 Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: HSDK: Add platform-specific commandsEugeniy Paltsev2018-04-021-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support of hsdk platform-specific commands: hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq environment variables/command line arguments hsdk_clock get - save clock frequencies to axi_freq, cpu_freq and tun_freq environment variables hsdk_clock print - show CPU, AXI, DDR and TUNNEL current clock frequencies. hsdk_clock print_all - show all currently used clock frequencies. hsdk_init - setup board HW in one of pre-defined configuration (hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 / hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4) hsdk_go - run baremetal application on hsdk configured by hsdk_init command. This patch changes default behaviour of 'bootm' command: now we are able to set number of CPUs to be kicked by setting 'core_mask' environment variable before 'bootm' command run. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: AXS10x: DTS: Remove unused interrupt propertiesEugeniy Paltsev2018-04-021-5/+0
| | | | | | | | | | | | | Some device tree nodes (like ethernet, ohci, ehci) in axs10x_mb.dtsi were copied from linux device tree, so they have interrupts properties. As we don't use interrupts in uboot we don't have interrupt controller node in AXS10x device tree. In result we get warnings when we compile such device tree. So remove unused interrupts properties to get rid of this warnings. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: bootm: Refactor GO and PREP subcommands implementationEugeniy Paltsev2018-03-231-22/+29
| | | | | | | | Refactor GO and PREP subcommands implementation for a simpler override in the boards platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Refactor arc_ioc_setup()Eugeniy Paltsev2018-03-211-6/+6
| | | | | | | Move all checks before cache flush and IOC setup. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Add missing cache cleanup before cache disableEugeniy Paltsev2018-03-211-14/+39
| | | | | | | | | | | | | | | | Add missing cache cleanup before cache disable: * Flush and invalidate L1 D$ before disabling. Flush and invalidate SLC before L1 D$ disabling (as it will be bypassed for data) Otherwise we can lose some data when we disable L1 D$ if this data isn't flushed to next level cache. Or we can get wrong data if L1 D$ has some entries after enable which we modified when the L1 D$ was disabled. * Invalidate L1 I$ before disabling. Otherwise we can execute wrong instructions after L1 I$ enable if we modified any code when L1 I$ was disabled. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Add more HW configuration checksEugeniy Paltsev2018-03-211-0/+75
| | | | | | | | | | | Add additional cache configuration checks and note about supported configurations. It is unlikely to face some configuration in real life but it's better to be prepared and refuse to work on those. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Implement a function to sync and cleanup cachesEugeniy Paltsev2018-03-214-5/+29
| | | | | | | | | Implement specialized function to clenup caches (and therefore sync instruction and data caches) which can be used for cleanup before linux launch or to sync caches during U-Boot self-relocation. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Fix SLC operations when SLC is bypassed for dataEugeniy Paltsev2018-03-211-11/+28
| | | | | | | | | | | If L1 D$ is disabled SLC is bypassed for data and all load/store requests are sent directly to main memory. If L1 I$ is disabled SLC is NOT bypassed for instructions and all instruction requests are fetched through SLC. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Implement [i,d]cache_enabled() as separate functionsEugeniy Paltsev2018-03-211-17/+21
| | | | | | | | | Implement icache_enabled() and dcache_enabled() as separate functions which can be used with "inline" attribute. This is a preparation to make them always_inline. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Move IOC enabling to compile-time optionsEugeniy Paltsev2018-03-213-20/+52
| | | | | | | | Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of ioc_enable global variable. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Move PAE exists check into slc_upper_region_init()Eugeniy Paltsev2018-03-211-6/+9
| | | | | | | | Move check for PAE existence into slc_upper_region_init() instead of its caller as more appropriate place. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Move cache global variables to arch_global_dataEugeniy Paltsev2018-03-212-10/+15
| | | | | | | | | | | | | There is a problem with current implementation if we start U-Boot from ROM, as we use global variables before ther initialization, so these variables get overwritten when we copy .data section from ROM. Instead we move these global variables into our "global data" structure so that we may really start from ROM. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Get rid of [slc,pae,icache,dcache]_exists global variablesEugeniy Paltsev2018-03-211-24/+43
| | | | | | | | | | | | | | | | There is a problem with current implementation if we start U-Boot from ROM, as we use global variables before ther initialization, so these variables get overwritten when we copy .data section from ROM. Instead we'll use icache_exists(), dcache_exists(), slc_exists(), pae_exists() functions which directly check BCRs every time. In U-Boot case ops are used only during self-relocation and DMA so we shouldn't be hit by noticeable performance degradation. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Move SLC status check into slc_entire_op() and slc_rgn_op()Eugeniy Paltsev2018-03-211-5/+11
| | | | | | | | | | | | | | As of today we check SLC status before each call of __slc_rgn_op() or __slc_entire_op(). So move status check into __slc_rgn_op() and __slc_entire_op(). As we need to check status before *each* function execution and we call slc_entire_op() and slc_rgn_op() from different places we add this check directly into SLC entire/line functions instead of their callers to avoid code duplication. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdefEugeniy Paltsev2018-03-211-30/+29
| | | | | | | | | | | | | | Use is_isa_arcv2() function where it is possible instead of CONFIG_ISA_ARCV2 define check to make code cleaner at the same time keeping pretty much the same functionality - code in branches under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2 is not defined, still we need a couple of CONFIG_ISA_ARCV2 ifdefs to make compiler happy. That's because code in !is_isa_x() branch gets compiled and only then gets optimized away. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Allways check D$ status before entire/line opsEugeniy Paltsev2018-03-211-5/+6
| | | | | | | | | | | | | | | | | As we are planning to get rid of dozens of ifdef's in cache.c we would better check D$ status before each entire/line operation then check CONFIG_SYS_DCACHE_OFF config option. This makes the code cleaner as well as D$ entire/line functions remain functional even if we enable or disable D$ in run-time. As we need to check status before *each* function execution and we call D$ entire/line functions from different places we add this check directly into D$ entire/line functions instead of their callers to avoid code duplication. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Move BCR encodings to separate header fileEugeniy Paltsev2018-03-212-59/+85
| | | | | | | | | We're starting to use more and more BCRs and having their definitions in-lined in sources becomes a bit annoying so we move it all to a separate header. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Move IOC initialization to a separate functionEugeniy Paltsev2018-03-211-26/+30
| | | | | | | | | | | | | Move IOC initialization from cache_init() to a separate function. This is the preparation for the next patch where we'll switch to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2" ifdef. Also it makes cache_init function a bit cleaner. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Flush & invalidate D$ with a single commandEugeniy Paltsev2018-03-212-5/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't implement separate flush_dcache_all() intentionally as entire data cache invalidation is dangerous operation even if we flush data cache right before invalidation. There is the real example: We may get stuck in the following code if we store any context (like BLINK register) on stack in invalidate_dcache_all() function. BLINK register is the register where return address is automatically saved when we do function call with instructions like 'bl'. void flush_dcache_all() { __dc_entire_op(OP_FLUSH); // Other code // } void invalidate_dcache_all() { __dc_entire_op(OP_INV); // Other code // } void foo(void) { flush_dcache_all(); invalidate_dcache_all(); } Now let's see what really happens during that code execution: foo() |->> call flush_dcache_all [return address is saved to BLINK register] [push BLINK] (save to stack) ![point 1] |->> call __dc_entire_op(OP_FLUSH) [return address is saved to BLINK register] [flush L1 D$] return [jump to BLINK] <<------ [other flush_dcache_all code] [pop BLINK] (get from stack) return [jump to BLINK] <<------ |->> call invalidate_dcache_all [return address is saved to BLINK register] [push BLINK] (save to stack) ![point 2] |->> call __dc_entire_op(OP_FLUSH) [return address is saved to BLINK register] [invalidate L1 D$] ![point 3] // Oops!!! // We lose return address from invalidate_dcache_all function: // we save it to stack and invalidate L1 D$ after that! return [jump to BLINK] <<------ [other invalidate_dcache_all code] [pop BLINK] (get from stack) // we don't have this data in L1 dcache as we invalidated it in [point 3] // so we get it from next memory level (for example DDR memory) // but in the memory we have value which we save in [point 1], which // is return address from flush_dcache_all function (instead of // address from current invalidate_dcache_all function which we // saved in [point 2] !) return [jump to BLINK] <<------ // As BLINK points to invalidate_dcache_all, we call it again and // loop forever. Fortunately we may do flush and invalidation of D$ with a single one instruction which automatically mitigates a situation described above. And because invalidate_dcache_all() isn't used in common U-Boot code we implement "flush and invalidate dcache all" instead. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Introduce is_isa_X() functionsEugeniy Paltsev2018-03-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | | Introduce is_isa_arcv2() and is_isa_arcompact() functions. These functions only check configuration options and return compile-time constant so they can be used instead of #ifdef's to to write cleaner code. Now we can write: -------------->8--------------- if (is_isa_arcv2()) ioc_configure(); -------------->8--------------- instead of: -------------->8--------------- ifdef CONFIG_ISA_ARCV2 ioc_configure(); endif -------------->8--------------- Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Add support for FLUSH_N_INV D$ operationsEugeniy Paltsev2018-03-211-23/+19
| | | | | | | | | | | As of today __dc_line_op() and __dc_entire_op() support only separate flush (OP_FLUSH) and invalidate (OP_INV) operations. Add support of combined flush and invalidate (OP_FLUSH_N_INV) operation which we planing to use in subsequent patches. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Remove per-line I$ operations as unusedEugeniy Paltsev2018-03-211-23/+7
| | | | | | | | | | | | __cache_line_loop() function was copied from Linux kernel where per-line instruction cache operations are really used. In U-Boot we use only entire I$ ops, so we can drop support of per-line I$ ops from __cache_line_loop() because __cache_line_loop() is never called with OP_INV_IC parameter. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Cache: Move I$ entire operation to a separate functionEugeniy Paltsev2018-03-211-12/+19
| | | | | | | | | Move instruction cache entire operation to a separate function because we are planing to use it in other places like sync_icache_dcache_all(). Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Fine-tune implementation of memory barriersAlexey Brodkin2018-03-211-4/+4
| | | | | | | | | | | | | | | We improve on 2 things: 1. Only ARC HS family has "dmb" instructions so do compile-time check for automatically defined macro __ARCHS__. Previous check for ARCv2 ISA was not good enough because ARC EM family is v2 ISA as well but still "dmb" instaruction is not supported in EM family. 2. Still if there's no dedicated instruction for memory barrier let's at least insert compile-time barrier to make sure compiler deosn't reorder critical memory operations. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Introduce a possibility to not relocate U-bootAlexey Brodkin2018-03-212-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | Disabling relocation might be useful on ARC for 2 reasons: a) For advanced debugging with Synopsys proprietary MetaWare debugger which is capable of accessing much more specific hardware resources compared to gdb. For example it may show contents of L1 and L2 caches, internal states of some hardware blocks etc. But on the downside MetaWare debugger still cannot work with PIE. Even though that limitation could be work-arounded with change of ELF's header and stripping down all debug info but with it we won't have debug info for source-level debugging which is quite inconvenient. b) Some platforms which might benefit from usage of U-Boot basically don't have enough RAM to accommodate relocation of U-Boot so we keep code in flash and use as much of RAM as possible for more interesting things. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: York Sun <york.sun@nxp.com> Cc: Stefan Roese <sr@denx.de>
* arc: Eliminate unused code and data with GCC's garbage collectorAlexey Brodkin2018-03-211-1/+2
| | | | | | | | | | | | | | | | | Finally GCC's garbage collector works on ARC so let's use it. That's what I may see for HSDK: Before: text data bss dec hex filename 290153 10068 222616 522837 7fa55 u-boot After: text data bss dec hex filename 261999 9460 222360 493819 788fb u-boot Overall ~5% of memory footprint saved. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Don't halt slavesAlexey Brodkin2018-03-211-20/+0
| | | | | | | | | | | | | | | | | | This commit basically reverts two commits: 1. cf628f772ef2 ("arc: arcv1: Disable master/slave check") 2. 6cba327bd96f ("arcv2: Halt non-master cores") With mentioned commits in-place we experience more trouble than benefits. In case of SMP Linux kernel this is really required as we have all the cores running from the very beginning and then we need to allow master core to do some preparatory work while slaves are not getting in the way. In case of U-Boot we: a) Don't really run more than 1 core in parallel b) We may use whatever core for that Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Get rid of handwritten string routinesAlexey Brodkin2018-03-219-666/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot is a bit special piese of software because it is being only executed once on power-on as compared to operating system for example. That's why we don't care much about performance optimizations instead we're more concerned about size. And up-to-date compilers might produce much smaller code compared to performance-optimized routines copy-pasted from the Linux kernel. Here's an example: ------------------------------->8-------------------------- --- size_asm_strings.txt +++ size_c_strings.txt @@ -1,2 +1,2 @@ text data bss dec hex filename - 121260 3784 3308 128352 1f560 u-boot + 120448 3784 3308 127540 1f234 u-boot ------------------------------->8-------------------------- See we were able to shave off ~800 bytes of .text section. Also usage of string routines implemented in C gives us an ability to support more HW flavors for free: generated instructions will match our target as long as correct compiler option is used. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* fdt: Implement weak arch_fixup_fdt()Alexey Brodkin2018-02-181-5/+0
| | | | | | | | | | | | | | | | | | | Only ARM and in some configs MIPS really implement arch_fixup_fdt(). Others just use the same boilerplate which is not good by itself, but what's worse if we try to build with disabled CONFIG_CMD_BOOTM and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was apparently implemented in arch/xxx/lib/bootm.c. Now with weak arch_fixup_fdt() right in image-fdt.c where it is used we get both items highlighted above fixed. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* arc: Fix final linkage with Elf32 toolsAlexey Brodkin2018-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC Elf32 tools by default enable usage of so-called "small data" section or in ARC PRM parlance "GP-relative addressing". The idea is to put up to 2kB of frequently used data into a separate location and use indirect addressing via dedicated core register (GP). Where GP is used as a base for offset calculation. And so if "-msdata" toggle is passed to the compiler either explicitly or implicitly (that's Elf32 tools case) it will try to put some data in that "small data" area and then to calculate real offset from GP to be encoded in instructions we need to know the base value which liker gets from __SDATA_BEGIN__ symbol in hte linker script. In U-Boot we don't use that feature and linker script doesn't define __SDATA_BEGIN__ which gives us the following linkage error if we use Elf32 tools: ------------------------->8------------------- LD u-boot .../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found .../bin/arc-elf32-ld.bfd: final link failed: Bad value ------------------------->8------------------- Note if uClibc or glibc tools are used that problem doesn't happen because usage of "small data section" is disabled by default as not very useful for bigger executables. Moreover GP is just another name of r26 so we're loosing 1 core register which is not used by the compiler as a generic register with "-msdata". Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* ARC: Invalidate instruction and data caches early on bootEugeniy Paltsev2018-01-191-0/+12
| | | | | | | | | | | This is useful to make sure no stale data exists in caches after bootloaders. The worst thing could be some lines of cache were locked in a bootloader for example during DDR recalibration and never unlocked. This may lead to really unpredictable issues later down the line. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
generated by cgit (git 2.34.1) at 2024-11-19 17:51:37 +0000