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| * | | mips: octeon: Add cvmx-pciercx-defs.h header fileAaron Williams2021-04-281-0/+5586
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-pcieepx-defs.h header fileAaron Williams2021-04-281-0/+6848
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-npi-defs.h header fileAaron Williams2021-04-281-0/+1953
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-mio-defs.h header fileAaron Williams2021-04-281-0/+353
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-l2c-defs.h header fileAaron Williams2021-04-281-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-ipd-defs.h header fileAaron Williams2021-04-281-0/+1925
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-gserx-defs.h header fileAaron Williams2021-04-281-0/+2191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-gmxx-defs.h header fileAaron Williams2021-04-281-0/+6378
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-fpa-defs.h header fileAaron Williams2021-04-281-0/+1866
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-dtx-defs.h header fileAaron Williams2021-04-281-0/+6962
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-dpi-defs.h header fileAaron Williams2021-04-281-0/+1460
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-dbg-defs.h header fileAaron Williams2021-04-281-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-ciu-defs.h header fileAaron Williams2021-04-281-0/+7351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-bgxx-defs.h header fileAaron Williams2021-04-281-0/+4106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-asxx-defs.h header fileAaron Williams2021-04-281-0/+709
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add cvmx-agl-defs.h header fileAaron Williams2021-04-281-0/+3135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: Add misc cvmx-helper header filesAaron Williams2021-04-2824-0/+5498
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import misc cvmx-helper header files from 2013 U-Boot. They will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: global_data.h: Add Octeon specific data to arch_global_data structStefan Roese2021-04-281-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used by the upcoming Serdes and driver code ported from the original 2013 U-Boot code to mainline. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini2021-04-281-5/+12
|\ \ \ \
| * | | | usb: ehci-mx6: Limit PHY address parsing to !CONFIG_PHYMarek Vasut2021-04-281-5/+12
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For systems which use generic PHY support and implement USB PHY driver, the parsing of PHY properties is unnecessary, disable it. Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* | | | Merge tag 'u-boot-amlogic-20210428' of ↵Tom Rini2021-04-281-4/+11
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-amlogic - net: designware: fix PHY reset with DM_MDIO, fixing boot of (at least) Odroid-C4
| * | | net: designware: fix PHY reset with DM_MDIONeil Armstrong2021-04-281-4/+11
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat leading to random sleeps (-10174464 on Odroid-HC4). This moves the dw_mdio_reset function to a common one taking the ethernet device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions. Fixes: 5160b4567c ("net: designware: add DM_MDIO support") Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | | configs: Resync with savedefconfigTom Rini2021-04-2771-314/+135
| | | | | | | | | | | | | | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge branch '2021-04-27-assorted-fixes'Tom Rini2021-04-278-24/+75
|\ \ \ | | | | | | | | | | | | - An assortment of bug fixes
| * | | reset: fix reset_get_by_index_nodev index handlingNeil Armstrong2021-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes an issue getting resets index 1 and 3+, the spurius "> 0" made it return the index 0 or 1, whatever index was passed. The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension catches it and this fixes the regression. This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable even when Linux was booting. Fixes: ea9dc35aab ("reset: Get the RESET by index without device") Reported-by: B1oHazard <ty3uk@mail.ua> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | test: reset: Extend base reset test to catch errorNeil Armstrong2021-04-272-7/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this extended test, we get the following failure : => ut dm reset_base Test: dm_test_reset_base: reset.c test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2) Test: dm_test_reset_base: reset.c (flat tree) test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2) Failures: 2 A fix is needed in reset_get_by_index_nodev() when introduced in [1]. [1] ea9dc35aab ("reset: Get the RESET by index without device") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | IOMUX: Fix buffer overflow in iomux_replace_device()Yuichiro Goto2021-04-271-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of strcat() against an uninitialized buffer would lead to buffer overflow. This patch fixes it. Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()") Signed-off-by: Yuichiro Goto <goto@k-tech.co.jp> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
| * | | pinctrl: single: fix a never true comparisonDario Binacchi2021-04-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported by Coverity Scan for Das U-Boot, the 'less-than-zero' comparison of an unsigned value is never true. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * | | pinctrl: single: check function mask to be non-zeroDario Binacchi2021-04-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise it can generate a division by zero, which has an undefined behavior. Signed-off-by: Dario Binacchi <dariobin@libero.it>
| * | | Makefile: fix generation of defaultenv.h from empty initial fileRasmus Villemoes2021-04-271-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_USE_DEFAULT_ENV_FILE=y and the file CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any non-comment, non-empty lines), we end up feeding nothing into xxd, which in turn then outputs nothing. Then blindly appending ", 0x00" means that we end up trying to compile (roughly) const char defaultenv[] = { , 0x00 } which is of course broken. To fix that, change the frobbing of the text file so that we always end up printing an extra empty line (which gets turned into that extra nul byte we need) - that corresponds better to the binary format consisting of a series of key=val nul terminated strings, terminated by an empty string. Reported-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | fs: btrfs: fix the false alert of decompression failureQu Wenruo2021-04-271-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some cases where decompressed sectors can have padding zeros. In kernel code, we have lines to address such situation: /* * btrfs_getblock is doing a zero on the tail of the page too, * but this will cover anything missing from the decompressed * data. */ if (bytes < destlen) memset(kaddr+bytes, 0, destlen-bytes); kunmap_local(kaddr); But not in U-boot code, thus we have some reports of U-boot failed to read compressed files in btrfs. Fix it by doing the same thing of the kernel, for both inline and regular compressed extents. Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com> Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717 Fixes: a26a6bedafcf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()") Signed-off-by: Qu Wenruo <wqu@suse.com>
| * | | arm: zimage: Use correct symbol to hide messages in SPLSamuel Holland2021-04-271-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When zImage support was added to SPL, the messages were hidden to reduce code size. However, the wrong config symbol was used. Since this file is only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden. Use the correct symbol so the messages are printed in U-Boot proper. Also use IS_ENABLED to drop the #ifdef. Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode") Signed-off-by: Samuel Holland <samuel@sholland.org>
* | | | Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-04-278-8/+40
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | - WDT: Enable use of hw_margin_ms=0 - PowerPC: Introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD - PowerPC: Misc changes and fixes to the WDT handling
| * | | powerpc: introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLDRasmus Villemoes2021-04-273-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When flush_cache() is called during boot on our ~7M kernel image, the hundreds of thousands of WATCHDOG_RESET calls end up adding significantly to boottime. Flushing a single cache line doesn't take many microseconds, so doing these calls for every cache line is complete overkill. The generic watchdog_reset() provided by wdt-uclass.c actually contains some rate-limiting logic that should in theory mitigate this, but alas, that rate-limiting must be disabled on powerpc because of its get_timer() implementation - get_timer() works just fine until interrupts are disabled, but it just so happens that the "big" flush_cache() call happens in the part of bootm where interrupts are indeed disabled. [1] [2] [3] I have checked with objdump that the generated code doesn't change when this option is left at its default value of 0: gcc is smart enough to see that the ">=" comparison is tautologically true, hence all assignments to "flushed" are eliminated as dead stores. On our board, setting the option to something like 65536 ends up reducing total boottime by about 0.8 seconds. [1] https://patchwork.ozlabs.org/project/uboot/patch/20200605111657.28773-1-rasmus.villemoes@prevas.dk/ [2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html [3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * | | powerpc: lib: remove leftover CONFIG_5xxRasmus Villemoes2021-04-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_5xx hasn't existed since commit 502589777416 (powerpc, 5xx: remove support for 5xx). Remove this last mention of it. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * | | allow opting out of WATCHDOG_RESET() from timer interruptRasmus Villemoes2021-04-274-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having WATCHDOG_RESET() called automatically from the timer interrupt runs counter to the idea of a watchdog device - if the board runs into an infinite loops with interrupts still enabled, the watchdog will never fire. When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more complicated than just poking a few SOC-specific registers - it involves accessing all kinds of global data, and if the interrupt happens at the wrong time (say, in the middle of an WATCHDOG_RESET() call from ordinary code), that can end up corrupting said global data. Allow the board to opt out of calling WATCHDOG_RESET() from the timer interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that setting is currently nonsensical (it would be compile-time divide-by-zero), it cannot affect any existing boards. Add documentation for both the existing and extended meaning of CONFIG_SYS_WATCHDOG_FREQ. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * | | timer: mpc83xx_timer: fix build with CONFIG_{HW_, }WATCHDOGRasmus Villemoes2021-04-271-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code, which is likely copied from arch/powerpc/lib/interrupts.c, lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to a non-existing timestamp variable - obviously priv->timestamp is meant. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * | | watchdog: use time_after_eq() in watchdog_reset()Rasmus Villemoes2021-04-271-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards don't work with the rate-limiting done in the generic watchdog_reset() provided by wdt-uclass. For example, on powerpc, get_timer() ceases working during bootm since interrupts are disabled before the kernel image gets decompressed, and when the decompression takes longer than the watchdog device allows (or enough of the budget that the kernel doesn't get far enough to assume responsibility for petting the watchdog), the result is a non-booting board. As a somewhat hacky workaround (because DT is supposed to describe hardware), allow specifying hw_margin_ms=0 in device tree to effectively disable the ratelimiting and actually ping the watchdog every time watchdog_reset() is called. For that to work, the "has enough time passed" check just needs to be tweaked a little to allow the now==next_reset case as well. Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
* | | Prepare v2021.07-rc1Tom Rini2021-04-261-2/+2
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini2021-04-2616-93/+97
|\ \ \ | | | | | | | | | | | | - RCar3 improvements
| * | | ARM: rmobile: Enable NVMe support on RCar3Marek Vasut2021-04-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable support for PCIe NVMe devices. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
| * | | ARM: rmobile: Enable CONFIG_SYS_FLASH_PROTECTIONMarek Vasut2021-04-266-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu, which means the Spansion HF PPB protection bits can be operated using the 'protect' U-Boot command. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | clk: renesas: Synchronize Gen2 MSTP teardown tablesMarek Vasut2021-04-253-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize Gen2 MSTP teardown tables with datasheet Rev.2.00 Feb 01, 2016. This corrects the following bits: - added H2 MSTP3[10] SCIF2 - added H2/M2/E2 MSTP7[29] TCON - removed E2 MSTP5[22] Thermal Sensor - removed E2 MSTP10[31,24:22] SRC0, SRC7:9 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut2021-04-257-81/+81
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock driver used a heavy-handed approach where it turned off all available clocks, while also possibly setting bits which are not documented in the R-Car datasheet. Update the tables so that only the bits which are documented are set or cleared when tearing down the clock driver. Note that the only clock left running before booting Linux are now MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | | Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2021-04-2624-127/+596
|\ \ \ | | | | | | | | | | | | | | | | This fixes the broken H5 Ethernet and updates the R40 and A64 DT files, so nothing really critical.
| * | | sunxi: DT: A64: Update devicetree files from Linux 5.12Andre Przywara2021-04-2617-76/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import updated devicetree files from the Linux v5.12 release. Besides some node and audio port renames this changes the PHY modes to either rgmii-id or rgmii-txid. From the board files the Pinephone sees a lot of updates. This also adds the long missing USB PHY property for controller 0, which allows the U-Boot PHY driver to eventually use port 0 in host mode (pending another U-Boot patch). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
| * | | sunxi: DT: R40: Update device tree files from Linux 5.12Ivan Uvarov2021-04-266-49/+375
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update R40 .dts{,i} and dt-binding headers to current version from kernel. Files taken from Linux 5.12-rc1 release (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8) Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * | | net: sun8i-emac: Fix pinmux setup for Allwinner H5Andre Przywara2021-04-261-2/+6
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit eb5a2b671075 ("net: sun8i-emac: Determine pinmux based on SoC, not EMAC type") switched the pinmux setup over to look at CONFIG_MACH_SUN* symbols, to find the appropriate mux value. Unfortunately this patch missed to check for the H5, which is pin-compatible to the H3, but uses a different Kconfig symbol (because it has ARMv8 vs. ARMv7 cores). Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is there to cover the peripherals common to both SoCs. Also explicitly list each supported SoC, and have an error message in the fallback case, to avoid those problems in the future. This fixes Ethernet support on all H5 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2 Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | | Merge tag 'mips-pull-2021-04-24' of ↵Tom Rini2021-04-24131-265/+120962
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-mips - MIPS: octeon: fix minor bugs of initial merge - MIPS: octeon: add support for QLM and PCI-E controller - MIPS: octeon: add support for AHCI and SATA - MIPS: octeon: add E1000 ethernet support - MIPS: octeon: add Octeon III NIC23 board - ata/scsi: add support for Big Endian platforms
| * | mips: octeon: ebb7304: Add support for some I2C devicesAaron Williams2021-04-232-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the following I2C devices connected to I2C bus 0 on the Octeon EBB7304: - Dallas DS1337 RTC - TLV EEPROM Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
generated by cgit (git 2.34.1) at 2025-09-28 00:07:18 +0000