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| | * pinctrl: at91-pio4: add compatible for sama7g5 pinctrl blockEugen Hristev2020-09-251-0/+1
| | | | | | | | | | | | | | | | | | Add new compatible to microchip,sama7g5 new SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| | * ARM: mach-at91: add support for new SoC sama7g5Eugen Hristev2020-09-256-0/+1016
| | | | | | | | | | | | | | | | | | Add support for new SoC sama7g5 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| | * ARM: at91: common: guard ATMEL_PIT code by ifdefEugen Hristev2020-09-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Atmel PIT timer is not available for next products that have another timer hardware block. To be able to use the common at91 code, guard the code that uses PIT by ifdefs. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| | * board: atmel: common: introduce at91_set_eth1addr for second interfaceEugen Hristev2020-09-222-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have a function to retrieve the mac address from one EEPROM. For boards with a second Ethernet interface, however, we would require another EEPROM with a second unique MAC address. Introduce at91_set_eth1addr which will look for a second EEPROM and set the 'eth1addr' variable with the obtained MAC address. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| | * clk: at91: sama7g5: add clock supportClaudiu Beznea2020-09-222-0/+1402
| | | | | | | | | | | | | | | | | | Add clock support for SAMA7G5. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: pmc: add generic clock opsClaudiu Beznea2020-09-222-0/+73
| | | | | | | | | | | | | | | | | | | | | Add generic clock ops to be used by every AT91 PMC driver built on top of CCF. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-generic: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+209
| | | | | | | | | | | | | | | | | | Add clk-generic driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-peripheral: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+272
| | | | | | | | | | | | | | | | | | Add clk-peripheral compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-system: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+116
| | | | | | | | | | | | | | | | | | Add clk-system driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-programmable: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+226
| | | | | | | | | | | | | | | | | | Add clk-programmable driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-utmi: add support for sama7g5Claudiu Beznea2020-09-222-1/+73
| | | | | | | | | | | | | | | | | | | | | | | | Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via XTALF register. Values written at bits 2..0 in this register correspond to the on board crystal oscillator frequency. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-utmi: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+169
| | | | | | | | | | | | | | | | | | Add clk-utmi driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-master: add support for sama7g5Claudiu Beznea2020-09-222-1/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has multiple master clocks feeding different subsystems. One of them feeds image subsystem and is changeable based on image subsystem needs. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-master: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+178
| | | | | | | | | | | | | | | | | | Add clk-master driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: sam9x60-pll: add driver compatible with ccfClaudiu Beznea2020-09-224-0/+486
| | | | | | | | | | | | | | | | | | Add sam9x60-pll driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: clk-main: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+398
| | | | | | | | | | | | | | | | | | Add clk-main driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: sckc: add driver compatible with ccfClaudiu Beznea2020-09-222-1/+173
| | | | | | | | | | | | | | | | | | | | | | | | Add sckc driver compatible with common clock framework. Driver implements slow clock support for SAM9X60 compatible IPs (in this list it is also present SAMA7G5's slow clock IP). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: move clock code to compat.cClaudiu Beznea2020-09-2216-1163/+1030
| | | | | | | | | | | | | | | | | | | | | | | | Move clock code to compat.c to allow switching to CCF without mixing CCF code with non CCF code. This prepares the field for next commits. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: pmc: add helpers for clock driversClaudiu Beznea2020-09-222-0/+104
| | | | | | | | | | | | | | | | | | | | | Add helper for clock drivers. These will be used by following commits in the process of switching AT91 clock drivers to CCF. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: at91: add pre-requisite headers for AT91 clock architectureClaudiu Beznea2020-09-222-0/+269
| | | | | | | | | | | | | | | | | | | | | | | | Add pre-requisite headers for AT91 clock architecture. These are based on already present files on Linux and will be used by following commits for AT91 CCF clock drivers. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * clk: get clock pointer before proceedingClaudiu Beznea2020-09-221-4/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_get_by_indexed_prop() retrieves a clock with dev member being set with the pointer to the udevice for the clock controller driver. But in case of CCF each clock driver has set in dev member the reference to its parent (the root of the clock tree is a fixed clock, every node in clock tree is a clock registered with clk_register()). In this case the subsequent operations like dev_get_clk_ptr() on clocks retrieved by clk_get_by_indexed_prop() will fail. For this, get the pointer to the proper clock registered (with clk_register()) using clk_get_by_id() before proceeding. Fixes: 1d7993d1d0ef ("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * clk: do not disable clock if it is criticalClaudiu Beznea2020-09-222-1/+34
| | | | | | | | | | | | | | | | | | | | | Do not disable clock if it is a critical one. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * clk: bind clk to new parent deviceClaudiu Beznea2020-09-222-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock re-parenting is not binding the clock's device to its new parent device, it only calls the clock's ops->set_parent() API. The changes in this commit re-parent the clock device to its new parent so that subsequent operations like clk_get_parent() to point to the proper parent. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * dm: core: add support for device re-parentingClaudiu Beznea2020-09-223-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In common clock framework the relation b/w parent and child clocks is determined based on the udevice parent/child information. A clock parent could be changed based on devices needs. In case this is happen the functionalities for clock who's parent is changed are broken. Add a function that reparent a device. This will be used in clk-uclass.c to reparent a clock device. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * clk: check hw and hw->dev before dereference itClaudiu Beznea2020-09-221-0/+3
| | | | | | | | | | | | | | | | | | | | | Check hw and hw->dev before dereference it. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | Merge tag 'u-boot-stm32-20201003' of ↵Tom Rini2020-10-0512-55/+360
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next - stm32mp: DT alignment with Linux 5.9-rc4 - stm32mp: convert drivers to APIs which support live DT - stm32mp: gpio: minor fixes
| | * | mailbox: stm32_ipcc: Convert to use APIs which support live DTPatrick Delaunay2020-10-021-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | video: stm32_dsi: Convert to use APIs which support live DTPatrick Delaunay2020-10-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
| | * | video: stm32_ltdc: Convert to use APIs which support live DTPatrick Delaunay2020-10-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Yannick Fertré <yannick.fertre@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | pinctrl: stm32: Add header with SPDX licencePatrick Delaunay2020-10-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Cosmetics: Add header with SPDX licence Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | pinctrl: stm32: Convert to use APIs which support live DTPatrick Delaunay2020-10-021-20/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | gpio: stm32: check result of ofnode_phandle_argsPatrick Delaunay2020-10-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add test on the size of ofnode_phandle_args result to avoid access to uninitialized elements in args[] field. This patch avoids the issue when gpio-ranges cell size is not 3 as expected, for example: gpio-ranges = <&pinctrl 0>; instead of gpio-ranges = <&pinctrl 0 112 16>; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | gpio: stm32: cosmetic: cleanup gpio_stm32_probePatrick Delaunay2020-10-021-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the variables definition at the beggining of the function gpio_stm32_probe(). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| | * | ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4Patrick Delaunay2020-10-027-19/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DT alignment with Linux kernel v5.9-rc4 for the STM32MP15x soc device tree files and the STMicroelectronics boards device tree files. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | Merge branch 'rpi-next' of ↵Tom Rini2020-10-021-9/+12
| |\ \ \ | | |/ / | |/| | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi into next
| | * | pinctrl: bcm283x: Store the return value of dev_read_u32_default to intOvidiu Panait2020-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the return value of dev_read_u32_default is stored in an u32, causing the subsequent "if (function < 0)" to always be false: u32 function; ... function = dev_read_u32_default(config, "brcm,function", -1); if (function < 0) { debug("Failed reading function for pinconfig %s (%d)\n", config->name, function); return -EINVAL; } Make "function" variable an int to fix this. Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| | * | pinctrl: bcm283x: Read address from DT in ofdata_to_platdataOvidiu Panait2020-10-021-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Factor out reading IP base address to ofdata_to_platdata function, which is designed for this purpose. Also, drop the dev->priv NULL check, since this is already done by the dm core when allocating space using priv_auto_alloc_size feature. (in drivers/core/device.c -> device_ofdata_to_platdata). Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| | * | pinctrl: bcm283x: DM_FLAG_PRE_RELOC: Remove OF_CONTROL checkOvidiu Panait2020-10-021-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_IS_ENABLED(OF_CONTROL) check from DM_FLAG_PRE_RELOC, since this driver only supports OF_CONTROL. drivers/pinctrl/broadcom/Kconfig: config PINCTRL_BCM283X depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | Merge branch 'next' of git://git.denx.de/u-boot-usb into nextTom Rini2020-10-016-118/+98
| |\ \ | | | | | | | | | | | | - Assorted XHCI improvements
| | * | usb: xhci-rcar: Add support for R8A774A1 SoCLad Prabhakar2020-10-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R8A774A1 is compatible with the generic rcar-gen3-xhci controller. This patch adds the compatibility flag, to support the xHCI controller. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| | * | usb: xhci: convert to readx_poll_sleep_timeout()Chunfeng Yun2020-10-011-14/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use readx_poll_sleep_timeout() to poll the register status Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: use macros with parameter to fill ep_info2Chunfeng Yun2020-10-013-20/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use macros with parameter to fill ep_info2, then some macros for MASK and SHIFT can be removed Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to TRB_TX_TYPE()Chunfeng Yun2020-10-012-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to TRB_LEN() and TRB_INTR_TARGET()Chunfeng Yun2020-10-012-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For normal TRB fields: use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK); and use TRB_INTR_TARGET(x) instead of (((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to TRB_TYPE()Chunfeng Yun2020-10-013-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TRB_TYPE(p) instead of ((p) << TRB_TYPE_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to HCS_MAX_PORTS()Chunfeng Yun2020-10-012-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use HCS_MAX_PORTS(p) instead of ((p & HCS_MAX_PORTS_MASK) >> HCS_MAX_PORTS_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: add quirks flag to support MediaTek xHCI 0.96Chunfeng Yun2020-10-014-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There some vendor quirks for MTK xHCI 0.96 host controller: 1. It defines some extra SW scheduling parameters for HW to minimize the scheduling effort for synchronous and interrupt endpoints. The parameters are put into reserved DWs of slot context and endpoint context. 2. Its TDS in Normal TRB defines a number of packets that remains to be transferred for a TD after processing all Max packets in all previous TRBs. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: create one unified function to calculate TRB TD remainderChunfeng Yun2020-10-012-55/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xhci versions 1.0 and later report the untransferred data remaining in a TD a bit differently than older hosts. We used to have separate functions for these, and needed to check host version before calling the right function. Now Mediatek host has an additional quirk on how it uses the TD Size field for remaining data. To prevent yet another function for calculating remainder we instead want to make one quirk friendly unified function. Porting from the Linux: c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.") 124c39371114("xhci: use boolean to indicate last trb in td remainder calculation") Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: add a member hci_version in xhci_ctrl structChunfeng Yun2020-10-013-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a member to save xHCI version, it's used some times. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | Revert "net: smc911x: Automatically Update ethaddr with MAC"Tom Rini2020-10-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon further discussion on the mailing list, we should not get in the situation where the generic code path to set ethaddr/etc correctly does not work. Revert this until someone can further debug the smc911x driver regarding this issue. This reverts commit 387cbf096e443705fa66776027273ed257ec6ca3. Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit (git 2.34.1) at 2025-05-21 13:50:11 +0000