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* rtc: mx27rtc: remove redundant code in rtc_resetChris Packham2018-04-061-5/+1
| | | | | | | | | As of commit 1a1fa2406689 ("rtc: Set valid date after reset") the command "date reset" will set the date/time to 2000-01-01 0:00:00 after calling rtc_reset(). This means that the mx27rtc implementation of rtc_reset() can be an empty stub function. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* rtc: ds1374: remove redundant code in rtc_resetChris Packham2018-04-061-15/+0
| | | | | | | | | As of commit 1a1fa2406689 ("rtc: Set valid date after reset") the command "date reset" will set the date/time to 2000-01-01 0:00:00 after calling rtc_reset(). This means that the ds1374 implementation of rtc_reset() doesn't need to call rtc_set(). Signed-off-by: Chris Packham <judge.packham@gmail.com>
* rtc: ds1307: remove redundant code in rtc_resetChris Packham2018-04-061-33/+0
| | | | | | | | | | As of commit 1a1fa2406689 ("rtc: Set valid date after reset") the command "date reset" will set the date/time to 2000-01-01 0:00:00 after calling rtc_reset(). This means that the ds1307 implementation of rtc_reset() doesn't need to call rtc_set(). Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* bootvx: use program header for loadingChristian Gmeiner2018-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The section header address is a VMA whereas the address found in the program header is a physical one. With this change it is possible to load and start a vx7 intel generic based image. $ readelf -l /tmp/vx7 Elf file type is EXEC (Executable file) Entry point 0x408000 There are 2 program headers, starting at offset 52 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00408000 0x00408000 0x04000 0x04000 RWE 0x1000 LOAD 0x005000 0xe040c000 0x0040c000 0x583a84 0x5ccc70 RWE 0x1000 Section to Segment mapping: Segment Sections... 00 .text.locore .data.locore 01 .text .eh_frame .wrs_build_vars .data .tls_data .tls_vars .bss $ readelf -S /tmp/vx7 There are 13 section headers, starting at offset 0x588af8: Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text.locore PROGBITS 00408000 001000 00011e 00 AX 0 0 16 [ 2] .data.locore PROGBITS 00409000 002000 003000 00 WA 0 0 4096 [ 3] .text PROGBITS e040c000 005000 4802a0 00 WAX 0 0 32 [ 4] .eh_frame PROGBITS e088c2a0 4852a0 0a1ed0 00 A 0 0 4 [ 5] .wrs_build_vars PROGBITS e092e170 527170 000190 00 Ax 0 0 1 [ 6] .data PROGBITS e092f000 528000 060a70 00 WA 0 0 4096 [ 7] .tls_data PROGBITS e098fa70 588a70 000004 00 A 0 0 4 [ 8] .tls_vars PROGBITS e098fa78 588a78 00000c 00 WA 0 0 4 [ 9] .bss NOBITS e098faa0 588a84 0491d0 00 WA 0 0 32 [10] .shstrtab STRTAB 00000000 588a84 000074 00 0 0 1 [11] .symtab SYMTAB 00000000 588d00 056ee0 10 12 9758 4 [12] .strtab STRTAB 00000000 5dfbe0 05f48a 00 0 0 1 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) For completeness here are the same information for an old vx5 based image. After this change it is possible to boot vx5 and vx7 (intel generic) images. $ readelf -l /tmp/vx5 Elf file type is EXEC (Executable file) Entry point 0x308000 There are 1 program headers, starting at offset 52 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000060 0x00308000 0x00308000 0x3513a0 0x757860 RWE 0x20 Section to Segment mapping: Segment Sections... 00 .text .data .bss [christian@chgm-pc ~]$ readelf -S /tmp/vx5 There are 12 section headers, starting at offset 0x356580: Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 00308000 000060 319b10 00 WAX 0 0 32 [ 2] .data PROGBITS 00621b20 319b80 037880 00 WA 0 0 32 [ 3] .bss NOBITS 006593a0 351400 4064c0 00 WA 0 0 16 [ 4] .debug_aranges PROGBITS 00000000 351400 000060 00 0 0 1 [ 5] .debug_pubnames PROGBITS 00000000 351460 00018b 00 0 0 1 [ 6] .debug_info PROGBITS 00000000 3515eb 003429 00 0 0 1 [ 7] .debug_abbrev PROGBITS 00000000 354a14 000454 00 0 0 1 [ 8] .debug_line PROGBITS 00000000 354e68 0016a4 00 0 0 1 [ 9] .shstrtab STRTAB 00000000 35650c 000071 00 0 0 1 [10] .symtab SYMTAB 00000000 356760 0440e0 10 11 8574 4 [11] .strtab STRTAB 00000000 39a840 03e66c 00 0 0 1 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* stm32mp: handle SYSRESETPatrick Delaunay2018-04-065-4/+14
| | | | | | | Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp: add syscon for STGENPatrick Delaunay2018-04-064-0/+36
| | | | | | | Add STGEN as SYSCON device: allow access to device address defined in device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: change STGEN clock source to HSEPatrick Delaunay2018-04-062-1/+1
| | | | | | | | | | | | | | No more use static frequency HSI = 64MHz for STGEN clock but HSE (with higher accurency) by default. Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency is provided at boot by BootRom and cp15 cntfrq and modified during clock tree initialization if needed. When HSI is no more used by any device, this internal oscillator can be switched off to reduce consumption. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* clock: stm32mp1: add stgen clock source change supportPatrick Delaunay2018-04-061-1/+45
| | | | | | | | The STGEN is the clock source for the Cortex A7 arch timer. So after modification of its frequency, CP15 cntfreq is updated and a new timer init is performed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arm: timer: get frequency for arch timer armv7 in cp15 cntfrqPatrick Delaunay2018-04-061-1/+15
| | | | | | | | | Manage dynamic value for armv7 arch clock timer, when CONFIG_SYS_HZ_CLOCK is not defined. Get frequency from CP15 cntfrq information, initialized for example by first boot stage, clock driver or by BootRom. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* Allow providing default environment from fileRasmus Villemoes2018-04-063-0/+38
| | | | | | | | | | | | | | | | | Modifying the default environment via CONFIG_EXTRA_ENV_SETTINGS is somewhat inflexible, partly because the cpp language does not allow appending to an existing macro. This prevents reuse of "environment fragments" for different boards, which in turn makes maintaining that environment consistently tedious and error-prone. This implements a Kconfig option for allowing one to define the entire default environment in an external file, which can then, for example, be generated programmatically as part of a Yocto recipe, or simply be kept in version control separately from the U-boot repository. Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* stm32mp1: select boot device and partitionPatrick Delaunay2018-04-063-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bootrom loads SPL from SDCARD or eMMC according BootPin selection. Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning: on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: get boot mode from BootRomPatrick Delaunay2018-04-063-0/+146
| | | | | | | | | | | | SPL copy BootRom boot mode information in TAMP register 21. This TAMP register information is used after relocation to set 2 env variables - boot_device - boot_instance Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp1: add eMMC support for ED1Patrick Delaunay2018-04-066-24/+147
| | | | | | | | | | Add command GPT support Add EMMC boot support Add the 2 other SDMMC instances for ED1: - SDMMC2 = mmc 1, eMMC on the ED1 board - SDMMC3 = extension connector, deactivated by default Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* spl: spl_mmc: provide one weak function spl_boot_partitionPatrick Delaunay2018-04-062-2/+14
| | | | | | | | | | | | | | The spl_boot_partition function has been added in order to have the possibility to boot on a same binary from different mmc devices with different partitions. By default keep the current behavior, SPL use the partition defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* rtc: rewrite isl1208 to support DMKlaus Goger2018-04-062-55/+98
| | | | | | | | | | Adds devicemodel support to the ISL1208 driver. This patch drops the non-dm API as no board was using it anyway. Also add it to Kconfig. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* stm32mp: add check of cpu identifierPatrick Delaunay2018-04-062-1/+63
| | | | | | | Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* stm32mp: cleanup cpu.cPatrick Delaunay2018-04-061-23/+21
| | | | | | Move all defines at the beginning of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* tools/mxsimage: Support building with LibreSSLHauke Mehrtens2018-04-061-1/+2
| | | | | | | | | | | | | | | | | | The mxsimage utility fails to compile against LibreSSL version < 2.7.0 because LibreSSL says it is OpenSSL 2.0, but it does not support the complete OpenSSL 1.1 interface. LibreSSL defines OPENSSL_VERSION_NUMBER with 0x20000000L and therefor claims to have an API compatible with OpenSSL 2.0, but it implements EVP_MD_CTX_new(), EVP_MD_CTX_free() and EVP_CIPHER_CTX_reset() only starting with version 2.7.0, which is not yet released. OpenSSL implements this function since version 1.1.0. This commit will activate the compatibility code meant for OpenSSL < 1.1.0 also for LibreSSL version < 2.7.0. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
* regulator: pbias: don't evaluate variable before assignmentHeinrich Schuchardt2018-04-061-3/+3
| | | | | | | We should not evaluate the value of reg before its value is set. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* omap3_logic: Fix FDT ADDR for ramdisk bootingAdam Ford2018-04-061-2/+2
| | | | | | | | | | The boot scripts for booting from ramdisk are using ${fdtimage} when they really should be using ${fdtaddr} This patch will fix it so the RAMdisk bootscripts operate correctly. Signed-off-by: Adam Ford <aford173@gmail.com>
* input: Drop PS/2 keyboard supportSimon Glass2018-04-0610-1173/+0
| | | | | | | This is not used by any current board and has not been converted to driver model. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* fs: btrfs: Remove unused debug code left from developmentMarek Behún2018-04-062-14/+0
| | | | Signed-off-by: Marek Behun <marek.behun@nic.cz>
* ARM: am33xx: Inhibit re-initialization of DDR during RTC-onlyRuss Dill2018-04-062-2/+30
| | | | | | | | | | This inhibits the re-inititialization of DDR during an RTC-only resume. If this is not done, an L3 NOC error is produced as the DDR gets accessed before the re-init has time to complete. Tested on AM437x GP EVM. Signed-off-by: Russ Dill <Russ.Dill@ti.com> [j-keerthy@ti.com Ported to Latest Master branch] Signed-off-by: Keerthy <j-keerthy@ti.com>
* am43xx: Do not allow EMIF to control DDR_RESET in rtconly configDave Gerlach2018-04-061-0/+5
| | | | | | | | | | | Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for am43xx_evm_rtconly_config. Without this DDR is unstable and can become corrupted after multiple iterations of RTC+DDR mode. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [j-keerthy@ti.com Ported to latest master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: AM43xx: Add support for RTC only + DDR in self-refresh modeTero Kristo2018-04-068-8/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers for wakeup from RTC-only mode with DDR in self-refresh. Parse these registers during SPL boot and jump to the kernel resume vector if the device is waking up from RTC-only modewith DDR in Self-refresh. The RTC scratch register layout used is: SCRATCH0 : bits00-31 : kernel resume address SCRATCH1 : bits00-15 : RTC magic value used to detect valid config SCRATCH1 : bits16-31 : board type information populated by bootloader During the normal boot path the SCRATCH1 : bits16-31 are updated with the eeprom read board type data. In the rtc_only boot path the rtc scratchpad register is read and the board type is determined and correspondingly ddr dpll parameters are set. This is done so as to avoid costly i2c read to eeprom. RTC-only +DRR in self-refresh mode support is currently only enabled for am43xx_evm_rtconly_config. This is not to be used with epos evm builds. Signed-off-by: Tero Kristo <t-kristo@ti.com> [j-keerthy@ti.com Rebased to latest u-boot master branch] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: serial: remove nonexisting initialisation functionsChristophe Leroy2018-04-062-95/+0
| | | | | | | This patch removes call of serial initialisation functions that are not implemented anymore. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* am335x: am335x_evm_usbspl_defconfig: NETCONSOLEJason Kridner2018-04-061-0/+7
| | | | | | | | | Enable NETCONSOLE by default. Still requires changes to the boot environment to enable on the platform. Signed-of-by: Jason Kridner <jdk@ti.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Handle NETCONSOLE and SPL enabledJason Kridner2018-04-061-3/+3
| | | | | | | | | NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize that. Signed-off-by: Jason Kridner <jdk@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Add support for BeagleBoard.org PocketBeagleJason Kridner2018-04-064-5/+17
| | | | | | | | | | | | | | | | | | | | Texas Instruments AM3358 based low-cost board using Octavo Systems OSD3358 SIP with built-in TPS65217 PMIC and 512MB DDR3. Board features small 35mm x 55mm size, high-speed USB OTG, microSD and 72 0.1" expansion header pins with 2xSPI, 2xI2C, 2xUART, USB, 8xADC, up-to-44 GPIO, PRU pins and much more. https://beagleboard.org/pocket This was tested using the am335x_evm_usbspl_defconfig. Note that MII pins are enabled despite not having Ethernet on this board. This avoids an issue where otherwise many timeout errors would be generated. See https://e2e.ti.com/support/arm/sitara_arm/f/791/t/298976 for some related discussion. Signed-off-by: Jason Kridner <jdk@ti.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Migrate CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSCAlex Kiernan2018-04-0623-12/+19
| | | | | | This converts CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC to Kconfig Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
* powerpc: mpc8xx: move watchdog into drivers/watchdogChristophe Leroy2018-04-065-13/+27
| | | | | | In preparation of DM watchdog, move basic actions into drivers/watchdog Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: cleaning up watchdogChristophe Leroy2018-04-065-27/+9
| | | | | | | | | | | | In preparation of migration to DM watchdog, clean up a bit. The 8xx watchdog really is a HW watchdog, so declare it as is then it goes through Kconfig And the watchdog reset doesn't mind getting interrupted, so no need to disable interrupts Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: refactorise reginfoChristophe Leroy2018-04-063-72/+20
| | | | | | | reginfo is redundant with some of the commands in immap.c, so move reginfo into that file and remove duplicated info. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* board: MCR3000: Use smaller flash sector for environmentChristophe Leroy2018-04-062-6/+6
| | | | | | | | | | | | | | | | | | | | | Latest versions of u-boot have increased in size and require more than the 256kb allocated to it. The MCR3000 board is equipped with an AM29LV160DB boot flash which is organised as follows: - One 16kb block - Two 8kb block - One 32kb block - Thirty one 64kb blocks At the time being, u-boot is a single piece occupying the 256 first kbytes, then the environment is stored in the following 64kb block The environment being quite tiny, we save one 64kb block by embedding the environment in the first 8kb block, hence allowing to increase the monitor size to 320kb. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* common: env_embedded: allow fine placement of environment objectChristophe Leroy2018-04-062-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7653942b10e9e ("common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV") dropped the .ppcenv section which was used in linking scripts to allow fine placement of embedded environment sections. This implies that GCC randomly places objects from env/embedded.o and environment is not guaranteed to be located at the correct address: 04003df8 g F .text 00000038 mii_init 04004000 g O .text 00000004 env_size 04004004 g O .text 00002000 environment 04006004 g F .text 00000040 .hidden __lshrdi3 This patch restores this capability by allocating each object marked with __UBOOT_ENV_SECTION__ into a different section. Hence 'environment' will be alone in .text.environment, allowing a fine placement in u-boot.lds with: . = DEFINED(env_offset) ? env_offset : .; env/embedded.o (.text.environment) Fixes: 7653942b10e9e ("common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV") Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* board: MCR3000: cleanup configChristophe Leroy2018-04-064-33/+8
| | | | | | | | | | | | | | | | | | | | Some config is redundant with Kconfig. Fix it. Also remove unused configs Move SDRAM_MAX_SIZE in the only place it is used include/environment.h already defines CONFIG_ENV_SIZE from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) remove BOOTARGS as bootargs is set by the different boot commands Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in line with CPM DPRAM organisation Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and CONFIG_SYS_INIT_SP_OFFSET which are unused Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* board: MCR3000: replace mtd->priv by mtd_to_nand()Christophe Leroy2018-04-061-1/+1
| | | | | | | | Since commit 17cb4b8f327eb ("mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data"), mtd_to_nand() has to be used instead of mtd->priv Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: initialisation of initial RAMChristophe Leroy2018-04-061-7/+20
| | | | | | | | | | u-boot requires some RAM at startup, to store global data structure. RAM is also needed when we migrate to DM for some initial malloc This patch implements the proper init of that RAM by calling board_init_f_alloc_reserve() and board_init_f_init_reserve() Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: redistribute data in CPM dpramChristophe Leroy2018-04-061-8/+8
| | | | | | | | | | | | | | | | | | | | Some malloc memory is needed at startup for DM model. Lets reorganise the use of the CPM dpram. The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as: IMMR + 0x2000..0x2800: BD/Data/Microcode IMMR + 0x2800..0x2e00: BD/Data IMMR + 0x2e00..0x3800: BD/Data/Microcode IMMR + 0x3800..0x3a00: BD/Data IMMR + 0x3a00..0x3c00: BD/Data/Microcode IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers Lets reallocate all BDs in the 3800..3a00 area and give the full 2800..2e00 for dynamic RAM allocation including global data That way, the microcode areas remain available if needed one day. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powercp: mpc8xx: move commproc.hChristophe Leroy2018-04-068-7/+7
| | | | | | | include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xxChristophe Leroy2018-04-0619-24/+24
| | | | | | | | | CONFIG_8xx doesn't mean much outside of arch/powerpc/ This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ... It also renames 8xx_immap.h to immap_8xx.h to be consistent with other file names. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: remove get_immr() argumentChristophe Leroy2018-04-063-6/+4
| | | | | | get_immr() is always called with 0 as an argument, so it is useless. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: make get_immr() independent of CONFIG_8xxChristophe Leroy2018-04-061-2/+1
| | | | | | | | | | SPRN_IMMR is defined regardless of the CPU. Therefore, there is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx As it a static inline function, it will in any case only be compiled in functons using it. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: get rid of the multiple PVR_ valuesChristophe Leroy2018-04-062-5/+3
| | | | | | | | | | Avoid hardcoding the PVR values in C since they are defined in processor.h At the same time, remove those multiple PVR values for 8xx and keep only one that we call PVR_8xx Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* powerpc: mpc8xx: harmonise initialisation of the immap local pointerChristophe Leroy2018-04-062-5/+3
| | | | | | | | | | | | | | In most places, immap local pointer is defined as immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; In a few places, it is defined as immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000); This patch replaces the few of the latest form by the other one. The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR very early in start.S Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* soft_i2c: cleanup - no mpc8xx supportChristophe Leroy2018-04-061-3/+0
| | | | | | | commit 907208c452999 ("powerpc: Partialy restore core of mpc8xx") didn't bring back support for I2C on the mpc8xx Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
* spi: atmel: default y if DM_SPI && ARCH_AT91Jagan Teki2018-04-0658-58/+1
| | | | | | | | | ATMEL_SPI is now fully converted to driver-model and respective boards switch to DM_SPI as well, so make default y for ARCH_AT91 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
* spi: atmel: Drop atmel_spi.hJagan Teki2018-04-062-93/+88
| | | | | | | | | atmel_spi.h has register offsets, and atmel_spi_slave structure, move it into .c file for better readability and drop atmel_spi.h Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
* spi: atmel: Drop non-dm codeJagan Teki2018-04-065-220/+0
| | | | | | | | All board configs are now enabled DM_SPI for SPL and U-Boot proper, so now its time to drop non-dm code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
* at91: ma5d4evk: Enable SPL_DM and SPL_OF_CONTROLJagan Teki2018-04-062-1/+3
| | | | | | Enable SPL Driver model and FDT support for AT91 ma5d4evk boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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